JP2000216405A - Thin-film transistor and electrooptic device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To establish clear gradation levels in an electrooptic device by applying an analog signal whose amplitude varies with time to one of the input terminals of an active element, while a digital signal for control is applied to another input terminal at an arbitrary timing. SOLUTION: An N-channel TFT and a P-channel TFT are formed at a crossing between a first signal line 3 and a second signal line 4. As for the NTFT, the drain 10 is connected to the second signal line 4 through an input terminal contact and the gate 9 is connected to the first signal line 3, while the source 12 is connected to a pixel electrode 17 through an output terminal contact. On the other hand, as for the PTFT, the drain 20 is connected to the second signal line 4 through an input terminal contact and the gate 21 is connected to the first signal line 3, while the source 18 is connected to the pixel electrode 17 through an output terminal. By repeating such a structure in right-to-left and upper-to-lower, a liquid crystal display device having a large number of pixels can be produced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active electro-optical device and, more particularly, to an image display method for an active liquid crystal electro-optical device. According to the present invention, a voltage (analog signal) whose magnitude changes with time is applied to one input terminal of an active element, and a control signal voltage (digital signal) is applied to another input terminal at an arbitrary timing. By generating an arbitrary voltage from the output terminal,
The present invention relates to an analog / digital gray scale image display method capable of setting a clear gray level in an electro-optical device.

[0002]

2. Description of the Related Art Liquid crystal compositions have different dielectric constants in a horizontal direction and a vertical direction with respect to a molecular axis due to their material properties. Therefore, liquid crystal compositions may be horizontally or vertically aligned with an external electric field. Can be easily done. The liquid crystal electro-optical device displays ON / OFF by controlling the amount of transmitted light or the amount of dispersion by utilizing the anisotropy of the dielectric constant.

FIG. 3 shows the electro-optical characteristics of a nematic liquid crystal, which is a typical liquid crystal material. Low applied voltage V
At a (point A), the amount of transmitted light is almost 0%, at Vb (point B), about 20%, at Vc (point C), about 70%, and at Vd (point D).
In this case, the amount of transmitted light changes with the voltage, such as 100%. In other words, if only points A and D are used, black and white 2
If the gradation display uses the rising part of the electro-optical characteristic as at points B and C, an intermediate gradation display becomes possible.

Conventionally, in the case of gradation display of a liquid crystal electro-optical device using a TFT, in an active matrix type liquid crystal electro-optical device, a thin film transistor (TFT) is used as an active element, and a gate applied voltage of the TFT or a voltage between a source and a drain is applied. The voltage applied to the liquid crystal is adjusted in an analog manner by changing the applied voltage to perform gradation display.

[0005]

However, when actually manufacturing such a liquid crystal electro-optical device, a TFT
Characteristic is remarkably large, and the conventional gradation display method has a limit of 16 gradations. Therefore, a completely new gradation method has been demanded.

[0006]

Accordingly, in the present invention, in order to clarify the voltage level applied to the liquid crystal, an indeterminate analog value is not applied between the gate or the source / drain as in the prior art. By applying a universal voltage that changes with time that is repeated in the cycle of between the source and the drain, the image information signal is transformed into a digital pulse, and applied to the gate at the appropriate timing, so that the desired It is characterized by utilizing a completely innovative image display method of applying a voltage.

FIG. 2 shows an example of an active matrix circuit of a liquid crystal display device necessary for implementing the present invention.
In the present invention, since the active element is required to respond in a short time of 100 nsec or less, it is necessary to form a circuit that operates at high speed. For this purpose, switching is not performed by using only an N-channel thin film transistor (NTFT) or a P-type thin film transistor (PTFT) as in the related art, but as shown in FIG.
It is necessary to use a modified transfer gate type circuit configuration in which T operates in a complementary manner.

In this example, a matrix of N rows and M columns is configured, but for the sake of simplicity, FIG. 2 shows only the vicinity of elements of n rows and m columns in the matrix. If you expand the same thing up, down, left and right, you will get a complete one.

As shown in the figure, four modified transfer gates are drawn, and the source of each modified transfer gate is connected to _Ym or Ym _{+ 1} (hereinafter collectively referred to as Y line). The gate of the modified transfer gate is connected to _Xn or _{Xn + 1} (hereinafter, collectively referred to as X-ray). In addition, transformation transfer
The gate drains the liquid crystal pixels Zn _{, m} , Zn _{, m + 1} , Z
_{n + 1, m} and Z _{n + 1, m + 1} . Since the NTFT and PTFT are symmetric in the modified tonsfar gate, their positions may be interchanged.

Next, an example of operation of a circuit using such a circuit will be described with reference to FIG. Hereinafter, V _Ym and V _Xn mean potentials applied to Y _m and X _n , respectively.
Also, V _Zn, and _m, the liquid crystal pixel Z _n shown in FIG. _2, means the TFT side of the potential of the _m. For simplicity, if the potential of the counter electrode of the liquid crystal pixel is set to 0 V, V _{Zn, m} is
It means a voltage applied to a liquid crystal pixel.

[0011] First, the Y ₁ line, applying a half wave of a sine wave as shown in FIG. Then, while the sine wave continues, a pulse signal (hereinafter, referred to as a bipolar pulse) whose polarity is inverted is intentionally applied to each X-ray at an arbitrary timing as shown in the figure. You.

At this time, the liquid crystal pixels Zn _{, m} , Zn _{, m + 1} , Z
Looking at _{n + 1, m} and Zn _{+ 1, m + 1} , it is understood that no voltage is applied to any of the pixels. This voltage also Y _{m + 1} to Y _m is because not supplied. At this stage, the pixels to which any voltage may be applied are the pixels in the first column, that is, Z ₁₁ , Z ₂₁ , _... Z _N1 . Then, a similar half-wave is applied to Y ₂ , and a bipolar pulse is applied to each X-ray again. At this time, a voltage is applied to the pixels in the second column, and an image in the second column is obtained.

In this way, voltages are applied one after another,
Eventually, a voltage is applied to the Y _m. Then, a bipolar pulse is applied to the X-ray. At this time, the timing (start time) of the pulse applied to each X-ray is not the same. For example, a pulse is applied to X _{n + 1} earlier than X _n . The voltage of the Y line when the pulse is applied becomes the output voltage of the modified transfer gate, and the capacitor of the liquid crystal pixel is charged with the voltage. As a result, the voltage of pixel Z _{n + 1, m} is
smaller than _nm . Here, the time required to charge the capacitor of the liquid crystal pixel is neglected.
The time constant of the FT and the capacitor is at most several nsec, whereas the width of the bipolar pulse is several hundreds of seconds.
Since it is nsec, it can be sufficiently ignored.

Next, a sine wave voltage is applied to Y _{m + 1} . Then, a bipolar pulse is applied to the X-ray. At this time, if attention is paid to the pixels Z _nm and Zn _{+ 1, m} , the charges stored therein will be discharged. This is because, although no voltage is applied to Y _m , a voltage is applied to the gate, and the electric charge leaks from the liquid crystal pixel to Y _{m at} the moment of application. On the other hand, in the case, Y m _{+ 1} pixel Z _n as shown in FIG. Since the voltage is applied _{to, m + 1} and the charge on Z _{n + 1, m + 1} are accumulated.

In this way, the voltage is sequentially applied up to Y _M to form one screen (also called a frame). At this time, it should be noted that the images are displayed in a so-called dynamic mode in which the images appear one after another in each column, and disappear when the image in the next column appears. However, by connecting a diode in series with the transfer gate, for example, it is possible to prevent loss of charge and consequently to a static mode, such as a normal active matrix. Also, for example, in parallel with the liquid crystal pixels,
It is also possible to connect a capacitor made of a ferroelectric material and retain the charge of the liquid crystal pixel by utilizing the hysteresis of the electrostatic characteristics of the ferroelectric material.

As is apparent from the above example, gradation display can be performed. The gradation accuracy is obtained by dividing the time width of the signal voltage applied to the Y line by the width of the bipolar pulse. It is considered to be about the same. Of course, strictly speaking, the non-linearity of the electrical characteristics of the liquid crystal must be taken into account as shown in FIG. The time required to form one screen is usually about 30 msec. In the example of FIG. 1, the time is the time from when the voltage is applied to Y ₁ to when the voltage is applied to Y _M and again when the voltage is applied to Y ₁ . In the case of a display device having a screen time of 30 msec and M = 480, that is, a display device having 480 columns of lines, the bipolar pulse must be 250 nsec to achieve 256 gradations. At this time, the voltage is applied to the liquid crystal for several tens of microseconds.

[0017]

[Embodiment 1] In this embodiment, a wall-mounted television was manufactured using a liquid crystal display device having a circuit configuration as shown in FIG. The TF at that time
T is polycrystalline silicon using laser annealing.

FIG. 4 shows an actual arrangement of electrodes and the like corresponding to this circuit configuration for one pixel. First, a method for manufacturing a liquid crystal panel used in this embodiment will be described with reference to FIGS. In FIG. 5A, a magnetron RF (high frequency) is placed on a glass 50, such as quartz glass, which can withstand heat treatment at an inexpensive temperature of 700 ° C. or less, for example, about 600 ° C.
A silicon oxide film as the blocking layer 51 is formed to a thickness of 1000 to 3000 ° by using a sputtering method. The process conditions are 100% oxygen atmosphere, film formation temperature 15 ° C, output 4
The pressure was set to 00 to 800 W and the pressure to 0.5 Pa. The deposition rate using quartz or single crystal silicon as the target is 30 to 1
00 ° / min.

A silicon film 52 was formed thereon by a plasma CVD method. The film formation temperature is from 250 ° C to 35
In this example, the temperature was set to 320 ° C., and monosilane (SiH
₄ ) was used. Not only monosilane (SiH ₄ ) but also disilane (Si ₂
H ₆ ) Alternatively, trisilane (Si ₃ H ₈ ) may be used. These were introduced into the PCVD apparatus at a pressure of 3 Pa, and 13.56 M
The film was formed by applying a high frequency power of Hz. At this time, an appropriate high frequency power is 0.02 to 0.10 W / cm ² , and in this example, 0.055 W / cm ² was used. The flow rate of monosilane (SiH ₄ ) was set to 20 SCCM, and the deposition rate at that time was about 120 ° / min. In order to control the threshold voltage (Vth) of the PTFT and the NTFT to be substantially the same, boron is used in a concentration of 1 × 10 ¹⁵ to 1 × 10 ¹⁸ cm using diborane.
^-3 may be added during film formation. In addition, not only the plasma CVD but also a sputtering method and a low pressure CVD method may be used for forming the silicon layer to be a channel region of the TFT, and the method will be briefly described below.

When the sputtering method is used, the back pressure before the sputtering is set to 1 × 10 ⁻⁵ Pa or less, and single crystal silicon is used as a target in an atmosphere in which hydrogen is mixed with 20 to 80% of argon. For example, argon was 20% and hydrogen was 80%.
The film formation temperature was 150 ° C., the frequency was 13.56 MHz, the sputter output was 400 to 800 W, and the pressure was 0.5 Pa.

In the case of forming by a reduced pressure gas phase method, 450 to 550 ° C. lower than the crystallization temperature by 100 to 200 ° C., for example, 5 to 5 ° C.
Disilane (Si ₂ H ₆ ) or trisilane (Si ₃ H ₈ ) was supplied to the CVD apparatus at 30 ° C. to form a film. The reactor pressure is 30 ~
It was set to 300 Pa. The deposition rate was 50-250 ° / min. Suresshuho the PTFT and NTFT - for controlling field voltage (Vth) in substantially the same, boron may be added during deposition as the concentration of ^{1 × 10 15 ~1 × 10 18} cm -3 by using diborane .

The coatings formed by these methods are:
It is preferable that oxygen is 5 × 10 ²¹ cm ⁻³ or less. In order to promote crystallization, the oxygen concentration should be 7 × 10 ¹⁹ cm ⁻³ or less,
Preferably, it is desirable to be 1 × 10 ¹⁹ cm ⁻³ or less,
If the amount is too small, the leakage current in the off state increases due to the backlight, so this concentration was selected. If the oxygen concentration is high, crystallization is difficult, and the laser annealing temperature must be increased or the laser annealing time must be increased. Hydrogen is 4 × 10 ²⁰ cm ⁻³ and silicon 4 × 10 ²²
When compared with cm ^-3 , it was 1 atomic%.

In order to further promote crystallization of the source and the drain, the oxygen concentration is set to 7 × 10 ¹⁹ cm ⁻³ or less, preferably 1 × 10 ¹⁹ cm ⁻³ or less,
Oxygen may be added only to the T channel formation region by ion implantation so as to have a concentration of 5 × 10 ^{20 to} 5 × 10 ²¹ cm ⁻³ .

According to the above method, an amorphous silicon film was formed to a thickness of 500 to 5000 Å, in this embodiment, 1000 Å.

Thereafter, as shown in FIG. 5B, a pattern was formed by opening only the source / drain regions of the photoresist 53 using the mask P1. A silicon film 54 serving as an n-type active layer was formed thereon by a plasma CVD method. The film was formed at a temperature of 250 ° C. to 350 ° C. In this embodiment, the temperature was set to 320 ° C., and monosilane (SiH ₄ ) and monosilane-based phosphine (PH ₃ ) having a concentration of 3% were used. These are introduced into the PCVD apparatus at a pressure of 5 Pa, and 13.56
The film was formed by applying a high frequency power of MHz. At this time, the high-frequency power is suitably 0.05~0.20W / cm ^2, in this embodiment using 0.120W / cm ^2.

The specific conductivity of the n-type silicon layer completed by this method was about 2 × 10 ⁻¹ [Ωcm ⁻¹ ]. The film thickness was 50 °. Thereafter, the resist 53 is removed by a lift-off method, and the source / drain region 5 is removed.
5, 56 were formed.

Using a similar process, a p-type active layer was formed. The gas introduced at that time used monosilane (SiH ₄ ) and monosilane-based diborane (B ₂ H ₆ ) at a concentration of 5%. These were introduced into a PCVD apparatus at a pressure of 4 Pa, and high-frequency power of 13.56 MHz was applied to form a film.
At this time, the high-frequency power is suitably 0.05~0.20W / cm ^2, in this embodiment using 0.120W / cm ^2. The specific conductivity of the p-type silicon layer obtained by this method was about 5 × 10 ^-2 [Ωcm ^-1 ]. The film thickness was 50 °. Thereafter, source / drain regions 59 and 60 were formed by using a lift-off method as in the case of the N-type region.
Thereafter, the silicon film 52 was removed by etching using the mask P3 to form an N-channel type thin film transistor island region 63 and a P-channel thin film transistor island region 64.

After that, using a XeCl excimer laser, the source / drain / channel regions were laser-annealed, and at the same time, the active layer was laser-doped. At this time, the laser energy has a threshold energy of 130 mJ / cm ^2.
mJ / cm ² is required. However, 220m from the beginning
When energy of J / cm ² or more is irradiated, hydrogen contained in the film is rapidly released, and the film is destroyed. For this purpose, it is necessary to first displace hydrogen and then melt it with low energy. In this embodiment, first 150 m
After purging hydrogen at J / cm ² , 230mJ
The crystallization was carried out at / cm ² .

Due to the annealing, the silicon film shifts from an amorphous structure to a highly ordered state, and a part of the silicon film exhibits a crystalline state. In particular, a region having a relatively high order in a state after the formation of silicon is particularly likely to be crystallized to be in a crystalline state. However, since the silicon existing between these regions is bonded to each other, silicon mutually pulls each other. When measured by laser Raman spectroscopy, a single crystal silicon peak 522 is obtained.
A peak shifted to a lower frequency side than cm ⁻¹ is observed. Its apparent particle size is 50 to 5 when calculated from the half width.
Although the area is 00 °, there are actually a large number of regions having high crystallinity and a cluster structure, and a film having a structure in which each cluster is bonded to each other by silicon (anchoring) can be formed. .

As a result, the coating exhibits a state substantially free of grain boundaries (hereinafter referred to as GB). Carriers can easily move from one cluster to another through anchored locations, resulting in higher carrier mobility than so-called GB polycrystalline silicon. That is, hole mobility (μh) = 10 to ²⁰⁰ cm ² /
VSec, electron mobility (μe) = 15 to 300 cm ² / V
Sec is obtained.

On top of this, a silicon oxide film was formed as a gate insulating film to a thickness of 500 to 2000 {for example, 1000}. This was made under the same conditions as those for forming the silicon oxide film as the blocking layer. During the film formation, a small amount of fluorine may be added to fix the sodium ions.

After this, 1-5 × 10 ²¹ cm of phosphorus is placed on the upper side.
^-3 silicon film or molybdenum (Mo), tungsten (W), MoSi ₂ or
A multilayer film with WSi ₂ was formed. This was patterned using a fourth photomask P4 to obtain FIG. 7E. A gate electrode 66 for NTFT and a gate electrode 67 for PTFT were formed. For example, the channel length is 7 μm, and the gate electrode is 0.2 μm of phosphorus silicon, and 0.3 μm of molybdenum is placed thereon.
It was formed to a thickness of μm.

When aluminum (Al) is used as a gate electrode material, the surface is anodically oxidized after patterning with a fourth photomask 69, so that the self-alignment method can be applied. In addition, since the source / drain contact holes can be formed at positions closer to the gate, the characteristics of the TFT can be further improved by reducing the mobility and the threshold voltage.

Thus, a C / TFT can be manufactured without applying a temperature to 400 ° C. or more in all steps. Therefore, it is not necessary to use an expensive substrate such as quartz as a substrate material, and it can be said that the process is very suitable for the large-screen liquid crystal display device of the present invention.

In FIG. 5F, a silicon oxide film was formed on the interlayer insulator 68 by the above-described sputtering method. This silicon oxide film is formed by LPCVD, optical CVD
Or a normal pressure CVD method. For example, 0.2-0.
6 μm thick, and then a fifth photomask P
5 was used to form an electrode window 79. After that, further, aluminum is formed on the entire surface to a thickness of 0.3 μm by a sputtering method, and leads 74 and contacts 73 and 75 are formed using a sixth photomask P6.
The surface was coated with an organic resin 77 for flattening, for example, a translucent polyimide resin, and the electrode drilling was performed again using the seventh photomask P7. Further, ITO (indium tin oxide) was formed on the entire surface by sputtering to a thickness of 0.1 μm, and a pixel electrode 71 was formed using an eighth photomask P8. This ITO is deposited at room temperature to 150 ° C.
Fulfilled by oxygen at 0-400 ° C. or by annealing in air.

The electrical characteristics of the obtained TFT are PTFT
And the mobility is 40 (cm ² / Vs), Vth is -5.9 (V),
NTFT has a mobility of 80 (cm ² / Vs) and a Vth of 5.0
(V).

One substrate for a liquid crystal electro-optical device manufactured according to the method described above was obtained.

FIG. 4 shows the arrangement of the electrodes and the like of the liquid crystal display device. N-channel type thin film transistor and P
The channel type thin film transistor is connected to the first signal line 3 and the second signal line.
At the intersection with the signal line 4. A matrix configuration using such a C / TFT is provided. NT
The FT is connected to the second terminal through the contact at the input terminal of the drain 10.
And the gate 9 is connected to the first signal line 3. The output terminal of the source 12 is connected to the pixel electrode 17 via a contact.

On the other hand, the PTFT has the input terminal of the drain 20 connected to the second signal line 4 via a contact, the gate 21 connected to the signal line 3 and the output terminal of the source 18 connected to the same as the NTFT via the contact. Are connected to the pixel electrode 17.
By repeating such a structure left and right, up and down, 640
A liquid crystal display device having a large pixel size such as × 480 or 1280 × 960 can be obtained. In this embodiment, 1920 × 40
0 was set. Thus, a first substrate was obtained.

FIG. 6 shows a method for manufacturing the other substrate. A polyimide resin obtained by mixing a black pigment with polyimide is formed on a glass substrate to a thickness of 1 μm using a spin coating method,
Black stripe 8 using ninth photomask P9
1 was produced. After that, a film of a polyimide resin mixed with a red pigment was formed to a thickness of 1 μm using a spin coating method,
Red filter 8 using tenth photomask P10
3 was produced. Similarly, a green filter 85 and a blue filter 86 were manufactured using the masks P11 and P12. During the production, each filter was fired at 350 ° C. in nitrogen for 60 minutes. After that, the leveling layer 89 was formed using a transparent polyimide, also using the spin coating method.

Thereafter, ITO (indium tin oxide) was formed on the entire surface to a thickness of 0.1 μm by sputtering, and a common electrode 90 was formed using a fifth photomask 91. This ITO is deposited at room temperature to 150 ° C.
Fulfilled by oxygen at 300 ° C. or annealing in air,
A second substrate was obtained.

A polyimide precursor was printed on the substrate by using an offset method, and baked at 350 ° C. for 1 hour in a non-oxidizing atmosphere such as nitrogen. Thereafter, a known rubbing method was used to modify the surface of the polyimide, and at least initially, a means for aligning liquid crystal molecules in a certain direction was provided.

Thereafter, the nematic liquid crystal composition was sandwiched between the first substrate and the second substrate, and the periphery was fixed with an epoxy adhesive. A drive IC having a TAB shape and a PCB having common signals and potential wiring were connected to leads on the substrate, and a polarizing plate was adhered on the outside to obtain a transmissive liquid crystal electro-optical device. This was connected to a rear lighting device in which three cold cathode tubes were arranged, and a tuner for receiving TV radio waves to complete a wall-mounted TV. Compared to a conventional CRT system television, the device has a flat shape, so that it can be installed on a wall or the like. The operation of this LCD TV is shown in FIG.
Were confirmed by applying a signal substantially equivalent to that shown in FIG.

[Embodiment 2] In this embodiment, a viewfinder for a video camera using a liquid crystal electro-optical device having a diagonal of 1 inch is manufactured, and the present invention is implemented.

In this embodiment, a viewfinder was formed by forming a device using a high mobility TFT by a low-temperature process with a configuration of 387 × 128 pixels. FIG. 4 shows the arrangement of the active elements on the substrate of the liquid crystal display device used in this embodiment, and FIG.
FIG. 7 illustrates a manufacturing process showing a section taken along the line -B '.

In FIG. 7A, a silicon oxide film as a blocking layer 51 is formed on a glass 50 which is inexpensive and can withstand heat treatment at 700 ° C. or less, for example, about 600 ° C. by using a magnetron RF (high frequency) sputtering method. ~ 300
It is made to a thickness of 0 °. The process conditions were a 100% oxygen atmosphere, a film formation temperature of 15 ° C., an output of 400 to 800 W, and a pressure of 0.5 Pa. The film formation rate using quartz or single crystal silicon as a target was 30 to 100 ° / min.

On this, a silicon film was formed by LPCVD (low pressure gas phase), sputtering or plasma CVD. When formed by the reduced pressure gas phase method, the temperature is 1
450-550 ° C lower by 00-200 ° C, for example 530 ° C
CVD of disilane (Si ₂ H ₆ ) or trisilane (Si ₃ H ₈ )
The film was supplied to the apparatus to form a film. Reactor pressure is 30 ~ 300
Pa. The deposition rate was 50-250 ° / min.
Threshold voltage (Vt) between PTFT and NTFT
In order to control substantially the same as in h), boron may be added at a concentration of 1 × 10 ¹⁵ to 1 × 10 ¹⁸ cm ⁻³ during film formation using diborane.

In the case of performing the sputtering method, the back pressure before the sputtering was set to 1 × 10 ⁻⁵ Pa or less, single-crystal silicon was used as a target, and an atmosphere in which 20 to 80% of hydrogen was mixed with argon was used. For example, argon was 20% and hydrogen was 80%.
The film formation temperature was 150 ° C., the frequency was 13.56 MHz, the sputter output was 400 to 800 W, and the pressure was 0.5 Pa.

When a silicon film is formed by the plasma CVD method, the temperature is, for example, 300 ° C., and monosilane (SiH ₄ ) or disilane (Si ₂ H ₆ ) is used. These were introduced into a PCVD apparatus, and a high-frequency power of 13.56 MHz was applied to form a film.

The coating formed by these methods is:
Oxygen is 5 × 10^{twenty one}cm^-3The following is preferred. This acid
If the element concentration is high, it is difficult to crystallize and the thermal annealing temperature
High or long thermal annealing times must be used.
If the amount is too small, the lamp is turned off by the backlight.
Current increases. Therefore 4 × 10¹⁹~ 4 × 10 ^{twenty one}
cm^-3Range. Hydrogen is 4 × 10²⁰cm^-3And silicon 4
× 10^{twenty two}cm^-3Was 1 atomic%.

After a silicon film in an amorphous state is formed to a thickness of 500 to 5000 °, for example, 1500 ° by the above method, heat treatment is performed at 450 to 700 ° C. for 12 to 70 hours in a non-oxide atmosphere at a medium temperature. For example, it was kept at a temperature of 600 ° C. in a hydrogen atmosphere. Since a silicon oxide film having an amorphous structure is formed on the surface of the substrate under the silicon film, no specific nucleus is present in this heat treatment, and the whole is annealed uniformly. That is, it has an amorphous structure at the time of film formation, and hydrogen is simply mixed therein.

Due to the annealing, the silicon film shifts from an amorphous structure to a highly ordered state, and a part of the silicon film exhibits a crystalline state. In particular, a region having a relatively high order in a state after the formation of silicon is particularly likely to be crystallized to be in a crystalline state. However, since the silicon existing between these regions is bonded to each other, silicon mutually pulls each other. When measured by laser Raman spectroscopy, a single crystal silicon peak 522 is obtained.
A peak shifted to a lower frequency side than cm ⁻¹ is observed. Its apparent particle size is 50 to 5 when calculated from the half width.
Although it is a microcrystal with a size of 00Å, there are actually a large number of regions with high crystallinity and a cluster structure, and a semi-amorphous structure film in which each cluster is bonded to each other by silicon (anchoring). Could be formed.

As a result, the coating exhibits a state that can be said to be substantially free of grain boundaries (hereinafter referred to as GB). Carriers can easily move from one cluster to another through anchored locations, resulting in higher carrier mobility than so-called GB polycrystalline silicon. That is, hole mobility (μh) = 10 to ²⁰⁰ cm ² /
VSec, electron mobility (μe) = 15 to 300 cm ² / V
Sec is obtained.

On the other hand, when the film is polycrystallized by high-temperature annealing at 900 to 1200 ° C. instead of annealing at the above-mentioned medium temperature, impurities in the film are segregated due to solid phase growth from nuclei. , GB contain many impurities such as oxygen, carbon, and nitrogen, and have a high mobility in the crystal. However, a barrier is formed in the GB to hinder the movement of carriers there. As a result, a mobility of 10 cm ² / Vsec or more cannot be easily obtained. That is, in this embodiment, a silicon semiconductor having a semi-amorphous or semi-crystalline structure is used for such a reason.

In FIG. 7A, the silicon film is subjected to photoetching using a first photomask, and an NTFT region 13 (channel width 20 μm) is placed on the AA ′ cross-sectional side of the drawing to form a PTFT region. No. 22 was formed on the BB 'cross section side.

On this, a silicon oxide film was formed as a gate insulating film to a thickness of 500 to 2000 {for example, 1000}. This was made under the same conditions as those for forming the silicon oxide film as the blocking layer. During the film formation, a small amount of fluorine may be added to fix the sodium ions.

Thereafter, 1 to 5 × 10 ²¹ cm of phosphorus is placed on the upper side.
^-3 silicon film or molybdenum (Mo), tungsten (W), MoSi ₂ or
A multilayer film with WSi ₂ was formed. This was patterned using a second photomask to obtain FIG. 7 (B). A gate electrode 9 for NTFT and a gate electrode 21 for PTFT were formed. In this embodiment, the channel length for NTFT is 10 μm.
m, the channel length for the PTFT was 7 μm, and the gate electrode was formed of 0.2 μm of silicon-doped silicon and 0.3 μm of molybdenum thereon.

In FIG. 7 (C), boron is applied to the source 18 drain 20 for PTFT by 1 to 5 × 10 ¹⁵ cm ^−2.
Was added by ion implantation.

Next, as shown in FIG.
1 was formed using a photomask. Phosphorus 1 to 5 × 10 ¹⁵ cm as source 10 and drain 12 for NTFT
A dose of ^-2 was added by ion implantation.

When aluminum (Al) is used as the gate electrode material, the surface is anodized after patterning with a second photomask, so that the self-alignment method can be applied. Since the source / drain contact hole can be formed at a position closer to the gate, the characteristics of the TFT can be further improved in terms of reduction in mobility and threshold voltage.

Next, annealing was performed again at 600 ° C. for 10 to 50 hours. The source 10 and the drain 12 of the NTFT and the source 18 and the drain 20 of the PTFT were formed as P ⁺ and N ⁺ by activating impurities. Channel formation regions 19 and 11 are formed below the gate electrodes 21 and 9 as semi-amorphous semiconductors.

In this way, a C / TFT can be manufactured without applying a temperature to 700 ° C. or more in all steps, even though it is a self-aligned system. Therefore, it is not necessary to use an expensive substrate such as quartz as a substrate material, and this is a process very suitable for the large pixel liquid crystal display device of the present invention.

In this embodiment, the thermal annealing is performed as shown in FIG.
(D) was performed twice. However, the annealing in FIG. 7A may be omitted depending on the desired characteristics, and both may be replaced by the annealing in FIG. 7D to shorten the manufacturing time. In FIG. 7E, a silicon oxide film was formed on the interlayer insulator 65 by the above-described sputtering method. This silicon oxide film may be formed by an LPCVD method, a photo CVD method, or a normal pressure CVD method. For example, it was formed to a thickness of 0.2 to 0.6 μm, and then a window 66 for an electrode was formed using a photomask. Further, as shown in FIG. 7 (F), aluminum is formed on the entire surface by sputtering, and leads 71 and contacts 72 are formed using a photomask.
The surface was coated with an organic resin 69 for flattening, for example, a translucent polyimide resin, and the electrode was drilled again using a photomask.

An ITO (indium tin oxide film) was formed by a sputtering method in order to make the two TFTs complementary and to connect the output terminals thereof to the electrodes of one pixel of the liquid crystal device as transparent electrodes. . It was etched using a photomask to form the electrode 17. This I
TO was formed at room temperature to 150 ° C. and achieved by oxygen at 200 to 400 ° C. or in air. In this manner, the NTFT 13, the PTFT 22, and the electrode 17 of the transparent conductive film were formed on the same glass substrate 50. The obtained T
The electrical characteristics of FT are PTFT and the mobility is 20 (cm ² / V
s), Vth is -5.9 (V), and the mobility is 4 for NTFT.
0 (cm ² / Vs) and Vth were 5.0 (V).

One substrate for a liquid crystal device was manufactured according to the method described above. FIG. 4 shows the arrangement of the electrodes and the like of the liquid crystal display device. A matrix configuration using such a C / TFT is provided.

Next, as a second substrate, an ITO (indium oxide) was formed on a blue glass plate by sputtering using a sputtering method on a substrate having a silicon oxide film laminated thereon by 2000 mm.
Tin oxide film). This ITO is between room temperature and 15
Films were formed at 0 ° C. and achieved with oxygen at 200-400 ° C. or in air. A color filter was formed on this substrate using the same method as in "Example 1" to obtain a second substrate.

A polyimide precursor was printed on the substrate by an offset method, and baked at 350 ° C. for 1 hour in a non-oxidizing atmosphere, for example, nitrogen. Thereafter, the surface of the polyimide was modified using a known rubbing method, and at least initially, means for aligning the liquid crystal molecules in a certain direction was provided to obtain first and second substrates.

Thereafter, the nematic liquid crystal composition was sandwiched between the first substrate and the second substrate, and the periphery was fixed with an epoxy adhesive. Since the pitch of the leads on the substrate was as fine as 46 μm, they were connected using the COG method. In this embodiment, a method is used in which gold bumps provided on an IC chip are connected with an epoxy-based silver-palladium resin, and the IC chip and the substrate are filled and fixed with an epoxy-modified acrylic resin for the purpose of fixing and sealing. Was. Thereafter, a polarizing plate was attached on the outside to obtain a transmission type liquid crystal display device.

FIG. 8 shows a driving waveform used in this embodiment.
A ramp waveform was used instead of the sine wave used in the first embodiment.
The ramp wave has advantages in that it has a simple configuration and is easy to convert gradation data into Δt. The operation is almost the same as that described with reference to FIG. In FIG. 8, the analog voltage applied to the pixel can be digitally obtained as in FIG. 1. For example, while the voltage of the pixel A is low, the time during which the voltage is applied to the pixel is long. Although a high voltage is applied, the time is shorter than that of the pixel A. Therefore, visually, the difference in density between the pixel A and the pixel B may be smaller than expected. To overcome this difficulty, the time during which no voltage is applied to any of the Y lines may be made longer than the time during which the voltage is applied, as shown in FIG.
For example, if the time is the same as the time for applying a voltage, the maximum time for applying a voltage to each pixel is theoretically three times as long as the minimum time, and is actually about twice. Further, as shown in FIG. 9, if the time during which no voltage is applied to any of the Y lines is set to be twice the time during which the voltage is applied, for example, the pixel Z _{m, n}
Is only 40% longer than the voltage applied to the pixel Zn _{, m + 1} . Accordingly, the visual density error caused by the voltage applied to the pixel, besides the voltage of the pixel, can be greatly improved.

For example, 384 × 128 dots 49, 15
Two sets of TFTs are placed in a 50 mm square (36 mm from a 300 mm square substrate).
When a normal analog gray scale display is performed on a liquid crystal electro-optical device prepared in a multi-panel display, 16 gray scale display is the limit because there is about ± 10% variation in TFT characteristics. . However, when the digital gradation display according to the present invention is performed, since it is hard to be affected by the characteristic variation of the TFT element, it is possible to display up to 128 gradations, and in the color display, 2,097,152 colors are various and delicate. Color display has been realized.

In the case of displaying software such as a television image, for example, even a "rock" of the same color has a slightly different color due to the degree of light corresponding to the minute depressions. When an attempt is made to display a color close to the natural colors, it is difficult to perform the display with 16 gradations, and it is not suitable for expressing these subtle depressions. With the gradation display according to the present invention, it is possible to impart these minute color changes.

This embodiment is characterized in that digital gray scale display is performed in contrast to conventional pure analog gray scale display. The effect is, for example, 640 ×
Assuming a liquid crystal electro-optical device having a pixel number of 400 dots, it is very difficult to produce all 256,000 TFTs without any variation in characteristics.
In reality, considering mass productivity and yield, 16 gray scale display is considered to be the limit, but in order to clarify the applied voltage level, the controller side uses not the analog value but the reference voltage value as a signal. Input and its reference signal to T
By controlling the timing of connection to the FT with a digital value and controlling the voltage applied to the TFT,
The present invention is characterized in that a method for covering the variation in the characteristics of the TFT is adopted, so that a clear digital gradation display is possible.

Example 3 In this example, a wall-mounted television was manufactured using a liquid crystal display device having a circuit configuration as shown in FIG. 2, and a description thereof will be given. Also T at that time
FT was polycrystalline silicon using laser annealing.

Hereinafter, a method for manufacturing the TFT portion will be described with reference to FIG. In FIG. 10A,
Inexpensive 700 ° C or less such as quartz glass, for example, about 60
The blocking layer 10 is formed on the glass 100 capable of withstanding the heat treatment at 0 ° C. by using the magnetron RF (high frequency) sputtering method.
A silicon oxide film as No. 1 is formed to a thickness of 1000 to 3000 °. The process conditions were a 100% oxygen atmosphere, a film formation temperature of 15 ° C., an output of 400 to 800 W, and a pressure of 0.5 Pa. The film formation rate using quartz or single crystal silicon as a target was 30 to 100 ° / min.

A silicon film 102 was formed thereon by a plasma CVD method. Film formation temperature is 250 ° C-3
In this example, the temperature was set to 320 ° C.
iH ₄ ) was used. Not only monosilane (SiH ₄ ), but disilane (S
i ₂ H ₆ ) Alternatively, trisilane (Si ₃ H ₈ ) may be used. These were introduced into the PCVD apparatus at a pressure of 3 Pa, and 13.56
The film was formed by applying a high frequency power of MHz. At this time, an appropriate high frequency power is 0.02 to 0.10 W / cm ² , and in this example, 0.055 W / cm ² was used. The flow rate of monosilane (SiH ₄ ) was set to 20 SCCM, and the deposition rate at that time was about 120 ° / min. In order to control the threshold voltage (Vth) of the PTFT and the NTFT to be substantially the same, boron is used in a concentration of 1 × 10 ¹⁵ to 1 × 10 ¹⁸ using diborane.
It may be added during film formation as a concentration of cm ^-3 . Also TFT
In addition to the plasma CVD, the silicon layer serving as the channel region may be formed by a sputtering method or a low-pressure CVD method. The method will be briefly described below.

In the case of performing the sputtering method, the back pressure before the sputtering was set to 1 × 10 ⁻⁵ Pa or less, the single crystal silicon was used as a target, and an atmosphere in which 20 to 80% of hydrogen was mixed with argon was used. For example, argon was 20% and hydrogen was 80%.
The film formation temperature was 150 ° C., the frequency was 13.56 MHz, the sputter output was 400 to 800 W, and the pressure was 0.5 Pa.

In the case of forming by a reduced pressure gas phase method, 450 to 550 ° C. lower by 100 to 200 ° C. than the crystallization temperature, for example, 5
Disilane (Si ₂ H ₆ ) or trisilane (Si ₃ H ₈ ) was supplied to the CVD apparatus at 30 ° C. to form a film. The reactor pressure is 30 ~
It was set to 300 Pa. The deposition rate was 50-250 ° / min. Suresshuho the PTFT and NTFT - for controlling field voltage (Vth) in substantially the same, boron may be added during deposition as the concentration of ^{1 × 10 15 ~1 × 10 18} cm -3 by using diborane .

The coatings formed by these methods are:
It is preferable that oxygen is 5 × 10 ²¹ cm ⁻³ or less. In order to promote crystallization, the oxygen concentration should be 7 × 10 ¹⁹ cm ⁻³ or less,
Preferably, it is desirable to be 1 × 10 ¹⁹ cm ⁻³ or less,
If the amount is too small, the leakage current in the off state increases due to the backlight, so this concentration was selected. If the oxygen concentration is high, crystallization is difficult, and the laser annealing temperature must be increased or the laser annealing time must be increased. Hydrogen is 4 × 10 ²⁰ cm ⁻³ and silicon 4 × 10 ²²
When compared with cm ^-3 , it was 1 atomic%.

Further, in order to promote crystallization of the source and the drain, the oxygen concentration is set to 7 × 10 ¹⁹ cm ⁻³ or less, preferably 1 × 10 ¹⁹ cm ⁻³ or less,
Oxygen may be added only to the T channel formation region by ion implantation so as to have a concentration of 5 × 10 ^{20 to} 5 × 10 ²¹ cm ⁻³ .
According to the above method, the amorphous silicon film is
The film was formed to have a thickness of 5000 to 5000 Å, and 1000 Å in this embodiment.

After that, the photoresist 103 is
Should be used as source / drain region of NTFT using 1
A pattern in which only the region was opened was formed. And Regis
Using ion 103 as an ion implantation method with mask 103
Than 2 × 10¹⁴~ 5 × 10 ¹⁶cm^-2, Preferably 2x
10¹⁶cm^-2Only to form the n-type impurity region 104.
Done. After that, the resist 103 was removed.

Similarly, a pattern was formed by applying a resist 105 and using a mask P3 to open only the regions that would be the source / drain regions of the PTFT. Then, using the resist 105 as a mask, a p-type impurity region was formed. Boron was used as the impurity, and the impurity was introduced by ion implantation again in an amount of 2 × 10 ^{14 to} 5 × 10 ¹⁶ cm ⁻² , preferably 2 × 10 ¹⁶ cm ⁻² . Like this. FIG. 10B is obtained.

Thereafter, a thickness of 50 to 3 is formed on the silicon film 102.
00 nm, for example, 100 nm silicon oxide film 107
Was formed by the above-mentioned RF sputtering method. And
Using a XeCl excimer laser, the source, drain and channel regions are crystallized by laser annealing.
Activated. At this time, the threshold energy of the laser energy is 130 mJ / cm ² , and 220 mJ / cm ² is required to melt the entire film thickness. However, when an energy of 220 mJ / cm ² or more is irradiated from the beginning, hydrogen contained in the film is rapidly released, and the film is destroyed. For this purpose, it is necessary to first displace hydrogen and then melt it with low energy. In this embodiment, first
After purging hydrogen at 50 mJ / cm ² , 23
Crystallization was performed at 0 mJ / cm ² . Further, after the end of the laser annealing, the silicon oxide film 107 was removed.

Thereafter, an island-like NTFT region 111 and a PTFT region 112 were formed using a photomask P3. On this, a silicon oxide film 108 was formed as a gate insulating film to a thickness of 500 to 2000 {for example, 1000}. This was made under the same conditions as those for forming the silicon oxide film as the blocking layer. During the film formation, a small amount of fluorine may be added to fix the sodium ions.

Thereafter, 1 to 5 × 10 ²¹ cm of phosphorus is placed on the upper side.
^-3 silicon film or molybdenum (Mo), tungsten (W), MoSi ₂ or
A multilayer film with WSi ₂ was formed. This was patterned using a fourth photomask P4 to obtain FIG. 10 (D). NTFT
Gate electrode 109 for PTFT, gate electrode 110 for PTFT
Was formed. For example, a channel length is 7 μm, and a gate electrode is formed of 0.2 μm of phosphorus silicon, and a molybdenum is formed thereon with a thickness of 0.3 μm.

In the case where aluminum (Al) is used as a gate electrode material, the surface is anodized after patterning with a fourth photomask P4, so that the self-alignment method can be applied. In addition, since the source / drain contact holes can be formed at positions closer to the gate, the characteristics of the TFT can be further improved by reducing the mobility and the threshold voltage.

Thus, a C / TFT can be manufactured without applying a temperature to 400 ° C. or more in all steps. Therefore, it is not necessary to use an expensive substrate such as quartz as a substrate material, and it can be said that the process is very suitable for the large-screen liquid crystal display device of the present invention.

In FIG. 10E, an interlayer insulator 113 is formed.
Was performed to form a silicon oxide film by the above-described sputtering method. This silicon oxide film is formed by LPCVD, optical CVD
Or a normal pressure CVD method. For example, 0.2-0.
6 μm thick, and then a fifth photomask P
5 was used to form a window 117 for an electrode. Thereafter, aluminum is further formed on the entire surface by a sputtering method to a thickness of 0.3 μm, and leads 116 and contacts 114 and 115 are formed using a sixth photomask P6. 119, for example, a translucent polyimide resin was applied and formed, and an electrode hole was formed again using the seventh photomask P7. In addition, these
TO (indium tin oxide) was formed to a thickness of 0.1 μm by a sputtering method, and a pixel electrode 118 was formed using an eighth photomask P8. This ITO film is formed at room temperature to 150 ° C., and oxygen at 200 to 400 ° C. or annealed in air.
Fulfilled by Le.

The electrical characteristics of the obtained TFT are PTFT
And the mobility is 35 (cm ² / Vs), Vth is -5.9 (V),
The mobility of NTFT is 90 (cm ² / Vs) and Vth is 4.8.
(V).

One substrate for a liquid crystal electro-optical device manufactured according to the method described above was obtained. The method for fabricating the other substrate is the same as that in the first embodiment, and will not be described.
Thereafter, the nematic liquid crystal composition was sandwiched between the first substrate and the second substrate, and the periphery was fixed with an epoxy adhesive. A drive IC having a TAB shape and a PCB having common signals and potential wiring were connected to leads on the substrate, and a polarizing plate was adhered on the outside to obtain a transmissive liquid crystal electro-optical device. This was connected to a rear lighting device in which three cold cathode tubes were arranged, and a tuner for receiving TV radio waves to complete a wall-mounted TV. Compared to a conventional CRT system television, the device has a flat shape, so that it can be installed on a wall or the like. The operation of this LCD television is the same as that shown in FIG.
This was confirmed by applying substantially equivalent signals to the liquid crystal pixels.

[0090]

The present invention is characterized in that digital gray scale display is performed in contrast to the conventional pure analog gray scale display. The effect is, for example, 640 ×
Assuming a liquid crystal electro-optical device having a pixel number of 400 dots, it is very difficult to produce all 256,000 TFTs without any variation in characteristics.
In reality, 16-gradation display is considered to be the limit in consideration of mass productivity and yield. On the other hand, as in the present invention, gradation display is performed purely by digital control without adding an analog signal at all. By displaying, gray scale display of 256 gray scale display or more is possible. Since it is a complete digital display, there is no ambiguity of gradation due to variation in TFT characteristics. Therefore, even if there is little variation in TFT, extremely uniform gradation display was possible. Therefore, while the yield has been extremely low in order to obtain a TFT having a small variation, the yield of the TFT is no longer a problem according to the present invention. Was completed.

For example, 256,0 dots of 640 × 400 dots
When a normal analog gradation display is performed on a liquid crystal electro-optical device in which 00 sets of TFTs are formed in a 300 mm square,
Since there is about ± 10% variation in TFT characteristics,
Six gradation display was the limit. However, when the digital gradation display according to the present invention is performed, the display is hardly affected by the variation in the characteristics of the TFT elements, so that it is possible to display up to 256 gradations.
A variety of 16 colors can be displayed in subtle colors. In the case of displaying software such as television images, for example, even a “rock” made of the same color has a slightly different color due to its minute dents and the like. If you try to display something close to the colors of nature,
Difficulty is required for 16 gradations. With the gradation display according to the present invention, it is possible to impart these minute color changes.

In the embodiment of the present invention, T using silicon is used.
The explanation has been added focusing on FT.
FT can be used as well. In particular, the electron mobility of single crystal germanium is 3600 cm ² / Vs and the hole mobility is 1800 cm ² / Vs, which is the value of single crystal silicon (1350 cm ² / Vs in electron mobility and 480 c in hole mobility).
m ² / Vs), which is an excellent material for implementing the present invention that requires high-speed operation. In addition, germanium has a lower transition temperature from an amorphous state to a crystalline state than silicon, and is suitable for a low-temperature process. In addition, the nucleation rate during crystal growth is low, and therefore, generally, large crystals are obtained when polycrystals are grown. Thus, germanium has characteristics comparable to those of silicon.

In order to explain the technical idea of the present invention, an electro-optical device using a liquid crystal, especially a display device has been described as an example. However, in order to apply the idea of the present invention, no display device is required. It is not necessary to use a so-called projection type television, another optical switch, or an optical shutter. Further, it is apparent that the present invention can be applied to electro-optical materials that are not limited to liquid crystals, as long as optical characteristics change due to electric influences such as electric fields and voltages.

[Brief description of the drawings]

FIG. 1 shows a driving waveform according to the present invention.

FIG. 2 shows an example of a matrix configuration according to the invention.

FIG. 3 shows electro-optical characteristics of a nematic liquid crystal.

FIG. 4 shows a planar structure of a device according to an example.

FIG. 5 shows a TFT process according to an embodiment.

FIG. 6 shows a process of a color filter according to an example.

FIG. 7 illustrates a TFT process according to an embodiment.

FIG. 8 shows another example of a driving waveform according to the present invention.

FIG. 9 shows an example of another drive waveform according to the present invention.

FIG. 10 shows a manufacturing process of the example.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 21/336 H01L 29/78 627G (72) Inventor Yasuhiko Takemura 398 Hase, Atsugi-shi, Kanagawa Pref. Inside the body energy research institute

Claims (16)

[Claims] A semiconductor film having a channel formation region and an impurity region; a gate insulating film formed on the semiconductor film; and a gate electrode provided via the gate insulating film. Wherein the thin film transistor overlaps the gate electrode via the gate insulating film. 2. A semiconductor film having a channel forming region and an N-type impurity region, a gate insulating film formed on the semiconductor film, and a gate electrode provided with the gate insulating film interposed therebetween. The thin film transistor according to claim 1, wherein the N-type impurity region overlaps with the gate electrode via the gate insulating film. 3. A semiconductor film having a channel formation region and a P-type impurity region, a gate insulating film formed on the semiconductor film, and a gate electrode provided with the gate insulating film interposed therebetween. The thin film transistor according to claim 1, wherein the P-type impurity region overlaps with the gate electrode via the gate insulating film. 4. A semiconductor film having a channel formation region and an impurity region containing phosphorus, a gate insulating film formed on the semiconductor film, and a gate electrode provided with the gate insulating film interposed therebetween. The thin film transistor according to claim 1, wherein the impurity region containing phosphorus overlaps the gate electrode with the gate insulating film interposed therebetween. 5. The channel forming region according to claim 1, wherein the concentration of boron is 1 × 10 ¹⁵ to 1 × 10 ¹⁵ .
A thin film transistor having a ^density of 1 × 10 ¹⁸ cm ⁻³ . 6. The thin film transistor according to claim 1, wherein the semiconductor film is silicon crystallized by being melted by laser irradiation. 7. An electro-optical device having a circuit using a thin film transistor, wherein: a semiconductor film having a channel formation region and an impurity region; a gate insulating film formed over the semiconductor film; An electro-optical device, wherein the impurity region overlaps the gate electrode with the gate insulating film interposed therebetween. 8. An electro-optical device having a circuit using a thin film transistor, comprising: a semiconductor film having a channel formation region and an N-type impurity region; a gate insulating film formed on the semiconductor film; An electro-optical device, comprising: a gate electrode provided through the gate insulating film; and the N-type impurity region overlaps the gate electrode through the gate insulating film. 9. An electro-optical device having a circuit using a thin film transistor, comprising: a semiconductor film having a channel formation region and a P-type impurity region; a gate insulating film formed on the semiconductor film; An electro-optical device, comprising: a gate electrode provided through the gate insulating film; and the P-type impurity region overlaps the gate electrode via the gate insulating film. 10. An electro-optical device having a circuit using a thin film transistor, comprising: a semiconductor film having a channel formation region and an impurity region containing phosphorus; a gate insulating film formed over the semiconductor film; An electro-optical device, comprising: a gate electrode provided through the gate electrode; and the impurity region containing phosphorus overlaps the gate electrode through the gate insulating film. 11. The channel formation region according to claim 7, wherein the concentration of boron in the channel formation region is 1 × 10 ¹⁵ to 10 × 10 ¹⁵ .
An electro-optical device having a size of 1 × 10 ¹⁸ cm ⁻³ . 12. The electro-optical device according to claim 7, wherein the semiconductor film is silicon crystallized by laser irradiation. 13. The electro-optical device according to claim 7, wherein a flattening film covers the thin film transistor. 14. The electro-optical device according to claim 13, wherein the flattening film is made of polyimide. 15. A projection type display device using the electro-optical device according to claim 14. 16. A television using the electro-optical device according to claim 14.