JP2000181763A5 - - Google Patents

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Publication number
JP2000181763A5
JP2000181763A5 JP1998358625A JP35862598A JP2000181763A5 JP 2000181763 A5 JP2000181763 A5 JP 2000181763A5 JP 1998358625 A JP1998358625 A JP 1998358625A JP 35862598 A JP35862598 A JP 35862598A JP 2000181763 A5 JP2000181763 A5 JP 2000181763A5
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JP
Japan
Prior art keywords
cache
cache module
information
module
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1998358625A
Other languages
English (en)
Japanese (ja)
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JP2000181763A (ja
JP4036992B2 (ja
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Publication date
Application filed filed Critical
Priority to JP35862598A priority Critical patent/JP4036992B2/ja
Priority claimed from JP35862598A external-priority patent/JP4036992B2/ja
Priority to US09/337,252 priority patent/US6470419B2/en
Priority to EP99305511A priority patent/EP1011048A3/en
Publication of JP2000181763A publication Critical patent/JP2000181763A/ja
Publication of JP2000181763A5 publication Critical patent/JP2000181763A5/ja
Application granted granted Critical
Publication of JP4036992B2 publication Critical patent/JP4036992B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP35862598A 1998-12-17 1998-12-17 キャッシュモジュール間でデータを動的に管理するキャッシュ制御装置および方法 Expired - Fee Related JP4036992B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP35862598A JP4036992B2 (ja) 1998-12-17 1998-12-17 キャッシュモジュール間でデータを動的に管理するキャッシュ制御装置および方法
US09/337,252 US6470419B2 (en) 1998-12-17 1999-06-22 Cache controlling apparatus for dynamically managing data between cache modules and method thereof
EP99305511A EP1011048A3 (en) 1998-12-17 1999-07-12 cache controlling apparatus for dynamically managing data between cache modules and method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP35862598A JP4036992B2 (ja) 1998-12-17 1998-12-17 キャッシュモジュール間でデータを動的に管理するキャッシュ制御装置および方法

Publications (3)

Publication Number Publication Date
JP2000181763A JP2000181763A (ja) 2000-06-30
JP2000181763A5 true JP2000181763A5 (enExample) 2004-12-09
JP4036992B2 JP4036992B2 (ja) 2008-01-23

Family

ID=18460288

Family Applications (1)

Application Number Title Priority Date Filing Date
JP35862598A Expired - Fee Related JP4036992B2 (ja) 1998-12-17 1998-12-17 キャッシュモジュール間でデータを動的に管理するキャッシュ制御装置および方法

Country Status (3)

Country Link
US (1) US6470419B2 (enExample)
EP (1) EP1011048A3 (enExample)
JP (1) JP4036992B2 (enExample)

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US6845395B1 (en) * 1999-06-30 2005-01-18 Emc Corporation Method and apparatus for identifying network devices on a storage network
US7509404B2 (en) * 2000-03-08 2009-03-24 Oracle International Corporation Methods and systems for partial page caching of dynamically generated content
US6738865B1 (en) * 2000-06-09 2004-05-18 International Business Machines Corporation Method, system, and program for demoting data from cache based on least recently accessed and least frequently accessed data
US6745295B2 (en) * 2001-04-19 2004-06-01 International Business Machines Corporation Designing a cache with adaptive reconfiguration
US6748491B2 (en) * 2001-04-19 2004-06-08 International Business Machines Corporation Designing a cache using an LRU-LFU array
US20040158687A1 (en) * 2002-05-01 2004-08-12 The Board Of Governors For Higher Education, State Of Rhode Island And Providence Plantations Distributed raid and location independence caching system
WO2002088961A1 (en) * 2001-05-01 2002-11-07 The Board Of Governors For Higher Education, State Of Rhode Island And Providence Plantations Distributed raid and location independence caching system
KR20030055482A (ko) * 2001-12-26 2003-07-04 한국전자통신연구원 선택적인 캐시관리방법 및 장치
KR100496159B1 (ko) * 2002-06-29 2005-06-20 주식회사 케이티 유용성 기반의 질의 결과 캐쉬 관리 방법
JP2005115603A (ja) 2003-10-07 2005-04-28 Hitachi Ltd 記憶デバイス制御装置及びその制御方法
JP4245021B2 (ja) * 2006-09-06 2009-03-25 日本電気株式会社 ストレージ装置、ストレージシステム、ストレージ装置の制御方法
US20080126674A1 (en) * 2006-09-13 2008-05-29 Xiaohua Cheng Portable storage device and method for improving data access speed
KR100979750B1 (ko) * 2009-11-06 2010-09-03 (주)피스페이스 분산 저장 시스템에서 파일을 관리하는 장치 및 방법
JP2015169956A (ja) * 2014-03-04 2015-09-28 富士通株式会社 ストレージ装置、情報処理装置、キャッシュ制御プログラム及びキャッシュ制御方法
JP6350162B2 (ja) 2014-09-18 2018-07-04 富士通株式会社 制御装置
US10691614B1 (en) * 2016-11-18 2020-06-23 Tibco Software Inc. Adaptive page replacement
CN109992402B (zh) * 2017-12-29 2021-07-09 Oppo广东移动通信有限公司 内存处理方法和装置、电子设备、计算机可读存储介质
JP6950551B2 (ja) * 2018-02-01 2021-10-13 セイコーエプソン株式会社 画像表示装置及びその制御方法

Family Cites Families (14)

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Publication number Priority date Publication date Assignee Title
US4437155A (en) * 1980-11-14 1984-03-13 Sperry Corporation Cache/disk subsystem with dual aging of cache entries
JPS63211041A (ja) * 1987-02-25 1988-09-01 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン データのブロツクの転送方法
US5247687A (en) * 1990-08-31 1993-09-21 International Business Machines Corp. Method and apparatus for determining and using program paging characteristics to optimize system productive cpu time
CA2078310A1 (en) * 1991-09-20 1993-03-21 Mark A. Kaufman Digital processor with distributed memory system
US5381539A (en) * 1992-06-04 1995-01-10 Emc Corporation System and method for dynamically controlling cache management
JPH0628108A (ja) * 1992-07-09 1994-02-04 Hitachi Ltd データ記憶システム
US5437022A (en) * 1992-12-17 1995-07-25 International Business Machines Corporation Storage controller having additional cache memory and a means for recovering from failure and reconfiguring a control unit thereof in response thereto
US5504882A (en) * 1994-06-20 1996-04-02 International Business Machines Corporation Fault tolerant data storage subsystem employing hierarchically arranged controllers
US5692152A (en) * 1994-06-29 1997-11-25 Exponential Technology, Inc. Master-slave cache system with de-coupled data and tag pipelines and loop-back
US5655100A (en) * 1995-03-31 1997-08-05 Sun Microsystems, Inc. Transaction activation processor for controlling memory transaction execution in a packet switched cache coherent multiprocessor system
US5909697A (en) * 1997-09-30 1999-06-01 Sun Microsystems, Inc. Reducing cache misses by snarfing writebacks in non-inclusive memory systems
US6073212A (en) * 1997-09-30 2000-06-06 Sun Microsystems, Inc. Reducing bandwidth and areas needed for non-inclusive memory hierarchy by using dual tags
US6327644B1 (en) * 1998-08-18 2001-12-04 International Business Machines Corporation Method and system for managing data in cache
US6141731A (en) * 1998-08-19 2000-10-31 International Business Machines Corporation Method and system for managing data in cache using multiple data structures

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