JP2000164630A - Method and substrate for mounting electronic components - Google Patents

Method and substrate for mounting electronic components

Info

Publication number
JP2000164630A
JP2000164630A JP10335705A JP33570598A JP2000164630A JP 2000164630 A JP2000164630 A JP 2000164630A JP 10335705 A JP10335705 A JP 10335705A JP 33570598 A JP33570598 A JP 33570598A JP 2000164630 A JP2000164630 A JP 2000164630A
Authority
JP
Japan
Prior art keywords
substrate
electronic component
bump
metal
pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10335705A
Other languages
Japanese (ja)
Inventor
Kazuji Azuma
和司 東
Shozo Minamitani
昌三 南谷
Hiroshi Wada
浩 和田
Hiroyuki Otani
博之 大谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP10335705A priority Critical patent/JP2000164630A/en
Publication of JP2000164630A publication Critical patent/JP2000164630A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide an electronic component mounting method by which electronic components can be mounted on a substrate, without requiring sealing material by bonding the components to substrate electrodes using Au and electronic component pads to the substrate electrodes by using an intermetallic compound, so as to reduce the connection resistance values between the components and pads and the electrodes and an electronic component mounting substrate manufactured by the method. SOLUTION: After Au bumps 3 are formed on the pads 2 of electronic components, in such a way that the heights of the bumps 3 are made uniform, the bumps 3 are aligned with substrate electrodes 5, the components are stuck to a bonding tool through vacuum and mounted on a substrate 4 while a temperature, load, and ultrasonic waves are applied. Since an intermetallic compound is formed between the metallic pads 2 of the components or the metallic electrodes of the substrate 4 and the Au bumps 3, when the pads 2 are connected to the electrodes through the Au bumps 3, the connection resistance between the parts and substrate 4 is reduced and an electronic component mounting method which requires no sealing material and an electronic component mounting substrate manufactured by the method can be realized.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、IC又はSAWフ
ィルター又はLED等の機能デバイスを含む電子部品の
金属パッドと基板の金属電極とをバンプを介在させて接
合する電子部品の実装方法及びその電子部品の実装方法
により製造される電子部品実装基板に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of mounting an electronic component and a method of bonding a metal pad of an electronic component including a functional device such as an IC or a SAW filter or an LED to a metal electrode of a substrate with a bump interposed therebetween. The present invention relates to an electronic component mounting board manufactured by a component mounting method.

【0002】[0002]

【従来の技術】近年、電子部品であるIC(半導体)の
生産量は増加し続け、様々な実装方法が提案されてい
る。その中でフリップチップ実装工法は商品の小型化、
軽量化には欠かせないものとなっている。従来、フリッ
プチップ実装工法には接合材としてAgペーストを用い
るもの、半田を用いるもの、金属微粒子を用いるものが
あった。以下、図面を説明しながら、上述した従来のI
Cの実装方法について説明する。図4(a)は従来のI
Cの実装方法を実施することにより形成されたICの実
装状態を示す。図において、1はIC、2はIC1のI
Cパッド、3はICパッド2上のAuバンプ、4は基
板、5は基板4の基板電極、7は封止材、8はAgペー
スト、9は半田、10は金属微粒子である。この従来の
ICの実装方法は、以下のようになされている。まず、
図4(b)に示すように、IC1のICパッド2上にA
uバンプ3を形成し、接合材としてAgペースト8、半
田9、金属微粒子10を供給して基板4上の基板電極5
に実装した後、加熱して接合を終了する。最後に、図4
(c)に示すように、上記IC1と基板4との間の接合
部に封止材7を注入して温度を加えて、封止材7を硬化
させる。この結果、図4(a)に示すようなIC1の実
装状態を形成する。
2. Description of the Related Art In recent years, the production of ICs (semiconductors), which are electronic components, continues to increase, and various mounting methods have been proposed. Among them, flip chip mounting method is downsizing of products,
It is indispensable for weight reduction. Conventionally, the flip chip mounting method includes a method using an Ag paste as a bonding material, a method using solder, and a method using metal fine particles. Hereinafter, the conventional I described above will be described with reference to the drawings.
A method of mounting C will be described. FIG. 4A shows the conventional I
3 shows a mounting state of an IC formed by implementing the mounting method C. In the figure, 1 is an IC, 2 is an I of IC1.
The C pad, 3 are Au bumps on the IC pad 2, 4 is the substrate, 5 is the substrate electrode of the substrate 4, 7 is the sealing material, 8 is the Ag paste, 9 is the solder, and 10 is the fine metal particles. The conventional IC mounting method is as follows. First,
As shown in FIG. 4 (b), A is placed on IC pad 2 of IC1.
After forming the u bump 3, the Ag paste 8, the solder 9, and the metal fine particles 10 are supplied as the bonding material, and the substrate electrode 5 on the substrate 4 is supplied.
After mounting, heating is performed to complete the bonding. Finally, FIG.
As shown in (c), the sealing material 7 is injected into the junction between the IC 1 and the substrate 4 and the temperature is applied to cure the sealing material 7. As a result, the mounting state of the IC 1 as shown in FIG.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、上記の
ような構成では、Auバンプ3と基板電極5との間に接
合材7が存在するため、接続抵抗値が高いことや、接合
材8,9,10及び封止材7の硬化時間が長いという問
題点を有していた。従って、本発明の目的は、上記問題
を解決することにあって、電子部品と基板電極をAuを
用いて、電子部品パッド、基板電極との間に金属間化合
物を用いて接合し、接続抵抗値が低く、封止材の必要が
ない電子部品の実装方法及びその電子部品の実装方法に
より製造される電子部品実装基板を提供することにあ
る。
However, in the above configuration, since the bonding material 7 exists between the Au bump 3 and the substrate electrode 5, the connection resistance is high, and the bonding materials 8, 9 , 10 and the sealing material 7 have a problem that the curing time is long. SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to solve the above-mentioned problems, and to connect an electronic component and a substrate electrode using Au and an electronic component pad and a substrate electrode using an intermetallic compound to form a connection resistance. It is an object of the present invention to provide an electronic component mounting method which has a low value and does not require a sealing material, and an electronic component mounting board manufactured by the electronic component mounting method.

【0004】[0004]

【課題を解決するための手段】上記目的を達成するため
に、本発明は以下のように構成する。本発明の第1態様
によれば、電子部品の金属パッドと基板の金属電極とを
Auバンプを介在させて接合することによって上記金属
パッドと上記金属電極とのいずれかと上記Auバンプと
の間に金属間化合物を形成して、上記電子部品の上記金
属パッドと上記基板の上記金属電極とを上記Auバンプ
を介して電気的に接合して上記電子部品と上記基板を実
装することを特徴とする電子部品の実装方法を提供す
る。本発明の第2態様によれば、上記Auバンプは上記
電子部品の上記パッド上に形成される第1態様記載の電
子部品の実装方法を提供する。本発明の第3態様によれ
ば、上記Auバンプは上記基板側に形成される第1態様
記載の電子部品の実装方法を提供する。本発明の第4態
様によれば、上記Auバンプの高さを揃えるために、接
合前にレベリングを行う第1〜3のいずれかの態様に記
載の電子部品の実装方法を提供する。本発明の第5態様
によれば、上記金属パッド又は上記金属電極の電極材料
をAu又はAlとする第1〜4のいずれかの態様に記載
の電子部品の実装方法を提供する。本発明の第6態様に
よれば、上記金属間化合物を形成するときに超音波を用
いて上記パッド又は上記電極と上記Auバンプとの接合
部を振動させて摩擦エネルギーで両者を接合しつつ上記
金属間化合物を形成する第1〜4のいずれかの態様に記
載の電子部品の実装方法を提供する。本発明の第7態様
によれば、上記金属パッドと上記金属電極とのいずれか
と上記Auバンプとの接合時に上記基板のみを加熱する
第1〜6のいずれかの態様に記載の電子部品の実装方法
を提供する。本発明の第8態様によれば、第1〜8のい
ずれかの態様に記載の電子部品の実装方法により上記電
子部品が上記基板に実装された封止材無しの電子部品実
装基板を提供する。本発明の第9態様によれば、上記電
子部品としては、IC又はSAWフィルター又はLED
等の機能デバイスを実装する第1〜9のいずれかの態様
に記載の電子部品の実装方法を提供する。
In order to achieve the above object, the present invention is configured as follows. According to the first aspect of the present invention, the metal pad of the electronic component and the metal electrode of the substrate are joined with the Au bump interposed therebetween, so that one of the metal pad and the metal electrode and the Au bump are interposed. Forming an intermetallic compound, and electrically bonding the metal pad of the electronic component and the metal electrode of the substrate via the Au bump to mount the electronic component and the substrate. An electronic component mounting method is provided. According to a second aspect of the present invention, there is provided the electronic component mounting method according to the first aspect, wherein the Au bump is formed on the pad of the electronic component. According to a third aspect of the present invention, there is provided the electronic component mounting method according to the first aspect, wherein the Au bump is formed on the substrate side. According to a fourth aspect of the present invention, there is provided the electronic component mounting method according to any one of the first to third aspects, wherein leveling is performed before joining in order to make the heights of the Au bumps uniform. According to a fifth aspect of the present invention, there is provided the electronic component mounting method according to any one of the first to fourth aspects, wherein the electrode material of the metal pad or the metal electrode is Au or Al. According to the sixth aspect of the present invention, when the intermetallic compound is formed, the bonding portion between the pad or the electrode and the Au bump is vibrated using ultrasonic waves to join the two with frictional energy, An electronic component mounting method according to any one of the first to fourth aspects, wherein the electronic component forms an intermetallic compound. According to the seventh aspect of the present invention, the electronic component according to any one of the first to sixth aspects, wherein only the substrate is heated at the time of bonding one of the metal pad and the metal electrode to the Au bump. Provide a way. According to an eighth aspect of the present invention, there is provided an electronic component mounting board without a sealing material, wherein the electronic component is mounted on the board by the electronic component mounting method according to any one of the first to eighth aspects. . According to a ninth aspect of the present invention, the electronic component includes an IC or a SAW filter or an LED.
The electronic component mounting method according to any one of the first to ninth aspects for mounting a functional device such as the above.

【0005】[0005]

【発明の実施の形態】以下、本発明の実施形態にかかる
電子部品の実装方法について、図面を参照しながら説明
する。図1は本発明の下記の実施形態における電子部品
の実装方法を実施することにより製造された電子部品実
装基板の側面図である。図1において、1は電子部品の
一例としてのIC、2はIC1の金属製のICパッド、
3はAuバンプ、4は基板、5は基板4の金属製の基板
電極である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an electronic component mounting method according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a side view of an electronic component mounting board manufactured by implementing an electronic component mounting method according to the following embodiment of the present invention. In FIG. 1, 1 is an IC as an example of an electronic component, 2 is a metal IC pad of the IC 1,
3 is an Au bump, 4 is a substrate, and 5 is a metal substrate electrode of the substrate 4.

【0006】上記第1の実施形態におけるICの実装方
法について、以下図2を用いてその動作を説明する。ま
ず、第1工程として、図2(a)に示すように、金属製
のICパッド2上にAuバンプ3を形成し、バンプ高さ
をレベリングにより揃えたのち、Auバンプ3を基板4
の金属製の基板電極5とアライメント(位置決め)す
る。このアライメントはレベリング有無にかかわらず必
要である。アライメント時には、ボンディングツール6
によりIC1を吸着している。
The operation of the IC mounting method according to the first embodiment will be described below with reference to FIG. First, as a first step, as shown in FIG. 2A, an Au bump 3 is formed on a metal IC pad 2 and the bump heights are aligned by leveling.
(Positioning) with the metal substrate electrode 5 described above. This alignment is necessary regardless of the leveling. At the time of alignment, the bonding tool 6
IC1 is sucked.

【0007】次いで、第2工程として、図2(b)に示
すように、上記第1工程で形成されたIC1を真空吸引
装置19の吸引によりボンディングツール6に吸着させ
て、IC1の金属パッド1と基板4の金属電極5とをA
uバンプ3を介在させて接合するようにボンディングツ
ール6によりIC1を基板4に押し付ける。このとき、
ボンディングツール6側から加熱装置20、加圧装置2
1、超音波振動装置22により温度、荷重、超音波を基
板4に対して加える。このようにして、IC1の金属パ
ッド1と基板4の金属電極5とをAuバンプ3を介在さ
せて接合することによって上記金属電極5と上記Auバ
ンプ3との間に金属間化合物を形成して、上記IC1の
上記金属パッド1と上記基板4の上記金属電極5とを上
記Auバンプ3を介して電気的に接合、IC1を基板4
に実装する。このように上記金属間化合物を形成すると
き超音波を用いることにより、上記上記電極5と上記A
uバンプ3との接合部を振動させて摩擦エネルギーで両
者を接合して上記金属間化合物を形成する。なお、この
とき、IC実装時に上記基板4のみを加熱装置20で加
熱するようにしてもよい。
Next, as a second step, as shown in FIG. 2B, the IC 1 formed in the first step is sucked to the bonding tool 6 by suction of the vacuum suction device 19, and the metal pad 1 of the IC 1 is drawn. And the metal electrode 5 of the substrate 4
The IC 1 is pressed against the substrate 4 by the bonding tool 6 so that the bonding is performed with the u bumps 3 interposed therebetween. At this time,
Heating device 20, pressing device 2 from the bonding tool 6 side
1. A temperature, a load, and an ultrasonic wave are applied to the substrate 4 by the ultrasonic vibration device 22. In this way, by joining the metal pad 1 of the IC 1 and the metal electrode 5 of the substrate 4 with the Au bump 3 interposed therebetween, an intermetallic compound is formed between the metal electrode 5 and the Au bump 3. The metal pad 1 of the IC 1 and the metal electrode 5 of the substrate 4 are electrically connected via the Au bump 3, and the IC 1 is connected to the substrate 4.
To be implemented. By using ultrasonic waves when forming the intermetallic compound, the electrode 5 and the A
By vibrating the joint with the u-bump 3 and joining the two with frictional energy, the intermetallic compound is formed. At this time, only the substrate 4 may be heated by the heating device 20 when the IC is mounted.

【0008】この第1実施形態において、金属間化合物
を形成するための条件として、1つの目安として、例え
ば、150℃以上、50(g/バンプ)以上、超音波の
振幅が0.5μm以上とすることが好ましい。
In the first embodiment, one condition for forming an intermetallic compound is, for example, 150 ° C. or more, 50 (g / bump) or more, and the ultrasonic wave amplitude is 0.5 μm or more. Is preferred.

【0009】次に、本発明の第2の実施形態における電
子部品の実装方法について、以下図3を用いてその動作
を説明する。まず、第1工程として、図3(a)に示す
ように、基板4の金属製の基板電極5上にAuバンプ3
を形成し、バンプ高さをレベリングにより揃えたのち、
Auバンプ3を電子部品の一例としてのIC1の金属製
のICパッド2とアライメント(位置決め)する。この
アライメントはレベリング有無にかかわらず必要であ
る。アライメント時には、ボンディングツール6により
IC1を吸着している。次いで、第2工程として、図3
(b)に示すように、上記第1工程で形成されたIC1
を真空吸引装置19の吸引によりボンディングツール6
に吸着させて、IC1の金属パッド1と基板4の金属電
極5とをAuバンプ3を介在させて接合するようにボン
ディングツール6によりIC1を基板4に押し付ける。
このとき、ボンディングツール6側から加熱装置20、
加圧装置21、超音波振動装置22により温度、荷重、
超音波を基板4に対して加える。このようにして、IC
1の金属パッド1と基板4の金属電極5とをAuバンプ
3を介在させて接合することによって上記IC1の金属
パッド1と上記Auバンプ3との間に金属間化合物を形
成して、上記IC1の上記金属パッド1と上記基板4の
上記金属電極5とを上記Auバンプ3を介して電気的に
接合して、IC1を基板4に実装する。このように上記
金属間化合物を形成するとき超音波を用いることによ
り、上記上記ICパッド2と上記Auバンプ3との接合
部を振動させて摩擦エネルギーで両者を接合して上記金
属間化合物を形成する。なお、このとき、IC実装時に
上記基板4のみを加熱装置20で加熱するようにしても
よい。
Next, the operation of the electronic component mounting method according to the second embodiment of the present invention will be described with reference to FIG. First, as a first step, as shown in FIG. 3A, an Au bump 3 is formed on a metal substrate electrode 5 of a substrate 4.
After the bump height is adjusted by leveling,
The Au bump 3 is aligned (positioned) with the metal IC pad 2 of the IC 1 as an example of the electronic component. This alignment is necessary regardless of the leveling. At the time of alignment, the IC 1 is sucked by the bonding tool 6. Next, as a second step, FIG.
As shown in (b), the IC 1 formed in the first step
The bonding tool 6 is sucked by the vacuum suction device 19.
The IC 1 is pressed against the substrate 4 by the bonding tool 6 so that the metal pad 1 of the IC 1 and the metal electrode 5 of the substrate 4 are joined together with the Au bump 3 interposed therebetween.
At this time, the heating device 20 from the bonding tool 6 side,
The pressure, the load,
Ultrasonic waves are applied to the substrate 4. Thus, the IC
The first metal pad 1 and the metal electrode 5 of the substrate 4 are joined together with the Au bump 3 interposed therebetween to form an intermetallic compound between the first metal pad 1 of the IC 1 and the Au bump 3, thereby forming the first metal pad 1. The metal pad 1 is electrically connected to the metal electrode 5 of the substrate 4 via the Au bump 3, and the IC 1 is mounted on the substrate 4. By using ultrasonic waves when forming the intermetallic compound in this way, the junction between the IC pad 2 and the Au bump 3 is vibrated to join them with frictional energy to form the intermetallic compound. I do. At this time, only the substrate 4 may be heated by the heating device 20 when the IC is mounted.

【0010】この第2実施形態において、金属間化合物
を形成するための条件としては、1つの目安として、例
えば、150℃以上、50(g/バンプ)以上、超音波
の振幅が0.5μm以上とすることが好ましい。
In the second embodiment, one condition for forming an intermetallic compound is, for example, 150 ° C. or more, 50 (g / bump) or more, and the ultrasonic wave amplitude is 0.5 μm or more. It is preferable that

【0011】上記各実施形態によれば、IC1の金属パ
ッド2と基板4の金属電極5とをAuバンプ3を介在さ
せて接合し、金属パッド2又は金属電極5とAuバンプ
3との間に金属間化合物(言いかえれば、異種金属が一
定の割合で混じり合った状態)で接合することによって
接続抵抗値を下げ(例えば、4端子測定で2〜4mΩ程
度も接続抵抗値を下げることができ、接続抵抗値が例え
ば20mΩの場合には16mΩとなる。)、接合強度を
向上させることにより、IC1と基板4との間の隙間を
絶縁樹脂で封止をしなくても接合信頼性を得ることがで
きる。また、IC1の金属パッド2と基板4の金属電極
5の電極材料として、Au又はAlを用いることによっ
て、200℃以下の低温で容易に接合することができ
る。上記金属間化合物は、接合前に、バンプを予めパッ
ド又は基板電極に形成するときにも形成される。
According to each of the above embodiments, the metal pad 2 of the IC 1 and the metal electrode 5 of the substrate 4 are joined with the Au bump 3 interposed therebetween, and the metal pad 2 or the metal electrode 5 and the Au bump 3 are interposed. The connection resistance is reduced by joining with an intermetallic compound (in other words, a state in which different metals are mixed at a certain ratio) (for example, the connection resistance can be reduced by about 2 to 4 mΩ in a four-terminal measurement). If the connection resistance value is, for example, 20 mΩ, the resistance is 16 mΩ.) By improving the bonding strength, the bonding reliability can be obtained without sealing the gap between the IC 1 and the substrate 4 with an insulating resin. be able to. Further, by using Au or Al as an electrode material of the metal pad 2 of the IC 1 and the metal electrode 5 of the substrate 4, it is possible to easily join at a low temperature of 200 ° C. or less. The intermetallic compound is also formed when a bump is previously formed on a pad or a substrate electrode before joining.

【0012】上記第1実施形態及び第2実施形態におい
て、ICにバンプを形成した場合、ICパッドを基準に
すれば、接合回数は2回となる。又、基板にバンプを形
成した場合、ICパッドを基準にすれば、接合回数は1
回となる。よって、ICへのダメージを考えた場合、で
きるだけ少ないストレスで接合したほうが良いため、基
板側にバンプを形成した方が、接続信頼性は高く、接合
条件範囲は広くなる。なお、本発明は上記実施形態に限
定されるものではなく、その他種々の態様で実施でき
る。例えば、電子部品の一例としてのICの代わりに、
電子部品の他の例としてSAW(Surface Acoustic Wav
edevice)フィルター又はLED等の機能デバイスにも
適用することができる。
In the first and second embodiments, when bumps are formed on an IC, the number of times of bonding is two based on the IC pad. Also, when bumps are formed on a substrate, the number of times of bonding is 1 based on IC pads.
Times. Therefore, in consideration of damage to the IC, it is better to perform bonding with as little stress as possible. Therefore, forming bumps on the substrate side provides higher connection reliability and a wider range of bonding conditions. Note that the present invention is not limited to the above embodiment, and can be implemented in other various aspects. For example, instead of an IC as an example of an electronic component,
Another example of electronic components is SAW (Surface Acoustic Wav).
edevice) It can also be applied to functional devices such as filters or LEDs.

【0013】[0013]

【発明の効果】以上のように電子部品の金属パッドと基
板の金属電極とをAuバンプを介在させて接合し、金属
パッド又は金属電極とAuバンプとの間に金属間化合物
を形成することによって、電子部品と基板との接続抵抗
値が低く、封止材の必要がない、電子部品の実装方法及
びそれにより製造された電子部品実装基板を実現するこ
とができる。
As described above, the metal pad of the electronic component and the metal electrode of the substrate are joined with the Au bump interposed therebetween, and an intermetallic compound is formed between the metal pad or the metal electrode and the Au bump. In addition, it is possible to realize an electronic component mounting method and an electronic component mounting substrate manufactured by the method, in which a connection resistance value between the electronic component and the substrate is low and a sealing material is not required.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明の第1又は第2の実施形態にかかる電
子部品の実装方法を実施することにより電子部品の一例
としてのICが基板に実装された状態の電子部品実装基
板の側面図である。
FIG. 1 is a side view of an electronic component mounting board in a state where an IC as an example of an electronic component is mounted on a board by performing an electronic component mounting method according to the first or second embodiment of the present invention. is there.

【図2】 (a)は本発明の第1の実施形態の電子部品
の実装方法の第1工程においてIC上にバンプを形成し
た後、当該バンプを基板電極にアライメントしたときの
状態を示す側面図、(b)は上記第1の実施形態の電子
部品の実装方法の第2工程において上記ICと上記基板
をAu電極により接合したIC実装状態を示す側面図で
ある。
FIG. 2A is a side view showing a state in which a bump is formed on an IC in a first step of a method of mounting an electronic component according to a first embodiment of the present invention, and the bump is aligned with a substrate electrode. FIG. 2B is a side view showing an IC mounted state in which the IC and the substrate are joined by an Au electrode in a second step of the electronic component mounting method of the first embodiment.

【図3】 (a)は本発明の第2の実施形態の電子部品
の実装方法の第1工程において基板上にバンプを形成し
た後、当該バンプをICパッドにアライメントしたとき
の状態を示す側面図、(b)は上記第2の実施形態の電
子部品の実装方法の第2工程において上記ICと上記基
板をAu電極により接合したIC実装状態を示す側面図
である。
FIG. 3A is a side view showing a state in which a bump is formed on a substrate in a first step of an electronic component mounting method according to a second embodiment of the present invention, and the bump is aligned with an IC pad. FIG. 7B is a side view showing an IC mounting state in which the IC and the substrate are joined by Au electrodes in a second step of the electronic component mounting method of the second embodiment.

【図4】 (a)は従来のICと基板をAgペーストで
接合した状態を示す側面図、(b)は従来のICと基板
を半田で接合した状態を示す側面図、(c)は従来のI
Cと基板を金属微粒子で接合した状態を示す側面図であ
る。
4A is a side view showing a state in which a conventional IC and a substrate are joined with an Ag paste, FIG. 4B is a side view showing a state in which the conventional IC and a board are joined with solder, and FIG. I
It is a side view which shows the state which joined C and the board | substrate with the metal fine particle.

【符号の説明】[Explanation of symbols]

1…IC、2…ICパッド、3…Auバンプ、4…基
板、5…基板電極、6…ボンディングツール、7…封止
材、8…Agペースト、9…半田、10…金属微粒子、
19…真空吸引装置、20…加熱装置、21…加圧装
置、22…超音波振動装置。
DESCRIPTION OF SYMBOLS 1 ... IC, 2 ... IC pad, 3 ... Au bump, 4 ... Substrate, 5 ... Board electrode, 6 ... Bonding tool, 7 ... Sealing material, 8 ... Ag paste, 9 ... Solder, 10 ... Metal fine particle,
19: vacuum suction device, 20: heating device, 21: pressurizing device, 22: ultrasonic vibration device.

フロントページの続き (72)発明者 和田 浩 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 (72)発明者 大谷 博之 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 Fターム(参考) 5F044 KK17 KK18 LL01 LL04 QQ02 QQ03 Continued on the front page (72) Inventor Hiroshi Wada 1006 Kazuma Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. ) 5F044 KK17 KK18 LL01 LL04 QQ02 QQ03

Claims (9)

【特許請求の範囲】[Claims] 【請求項1】 電子部品(1)の金属パッド(1)と基
板(4)の金属電極(5)とをAuバンプ(3)を介在
させて接合することによって上記金属パッド(1)と上
記金属電極(5)とのいずれかと上記Auバンプ(3)
との間に金属間化合物を形成して、上記電子部品(1)
の上記金属パッド(1)と上記基板(4)の上記金属電
極(5)とを上記Auバンプ(3)を介して電気的に接
合して上記電子部品と上記基板を実装することを特徴と
する電子部品の実装方法。
1. A metal pad (1) of an electronic component (1) and a metal electrode (5) of a substrate (4) are joined together with an Au bump (3) interposed therebetween so that the metal pad (1) and the metal pad (1) are joined together. One of the metal electrodes (5) and the Au bump (3)
To form an intermetallic compound between the first and second electronic components (1)
Electrically connecting said metal pad (1) and said metal electrode (5) of said substrate (4) via said Au bump (3) to mount said electronic component and said substrate. Electronic component mounting method.
【請求項2】 上記Auバンプは上記電子部品の上記パ
ッド上に形成される請求項1記載の電子部品の実装方
法。
2. The method according to claim 1, wherein the Au bump is formed on the pad of the electronic component.
【請求項3】 上記Auバンプは上記基板側に形成され
る請求項1記載の電子部品の実装方法。
3. The method according to claim 1, wherein the Au bump is formed on the substrate.
【請求項4】 上記Auバンプの高さを揃えるために、
接合前にレベリングを行う請求項1〜3のいずれかに記
載の電子部品の実装方法。
4. In order to make the height of the Au bump uniform,
The method for mounting an electronic component according to claim 1, wherein leveling is performed before joining.
【請求項5】 上記金属パッド(2)又は上記金属電極
(5)の電極材料をAu又はAlとする請求項1〜4の
いずれかに記載の電子部品の実装方法。
5. The electronic component mounting method according to claim 1, wherein an electrode material of said metal pad (2) or said metal electrode (5) is Au or Al.
【請求項6】 上記金属間化合物を形成するときに超音
波を用いて上記パッド又は上記電極と上記Auバンプと
の接合部を振動させて摩擦エネルギーで両者を接合しつ
つ上記金属間化合物を形成する請求項1〜4のいずれか
に記載の電子部品の実装方法。
6. A method of forming the intermetallic compound by vibrating a bonding portion between the pad or the electrode and the Au bump using ultrasonic waves when forming the intermetallic compound, and joining the two with frictional energy to form the intermetallic compound. The method for mounting an electronic component according to claim 1.
【請求項7】 上記金属パッド(1)と上記金属電極
(5)とのいずれかと上記Auバンプ(3)との接合時
に上記基板のみを加熱する請求項1〜6のいずれかに記
載の電子部品の実装方法。
7. The electronic device according to claim 1, wherein only the substrate is heated when one of the metal pad (1) and the metal electrode (5) is bonded to the Au bump (3). Component mounting method.
【請求項8】 請求項1〜8のいずれかに記載の電子部
品の実装方法により上記電子部品が上記基板に実装され
た封止材無しの電子部品実装基板。
8. An electronic component mounting board without a sealing material, wherein the electronic component is mounted on the board by the electronic component mounting method according to claim 1.
【請求項9】 上記電子部品としては、IC又はSAW
フィルター又はLED等の機能デバイスを実装する請求
項1〜9のいずれかに記載の電子部品の実装方法。
9. The electronic component may be an IC or a SAW.
The method for mounting an electronic component according to claim 1, wherein a functional device such as a filter or an LED is mounted.
JP10335705A 1998-11-26 1998-11-26 Method and substrate for mounting electronic components Pending JP2000164630A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10335705A JP2000164630A (en) 1998-11-26 1998-11-26 Method and substrate for mounting electronic components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10335705A JP2000164630A (en) 1998-11-26 1998-11-26 Method and substrate for mounting electronic components

Publications (1)

Publication Number Publication Date
JP2000164630A true JP2000164630A (en) 2000-06-16

Family

ID=18291567

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10335705A Pending JP2000164630A (en) 1998-11-26 1998-11-26 Method and substrate for mounting electronic components

Country Status (1)

Country Link
JP (1) JP2000164630A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006006817A1 (en) * 2004-07-14 2006-01-19 Ixelon Co., Ltd. Junction structure of display driver chip and ic chip and flexible substrate using au flat bump, and junction metheod thereof

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63288031A (en) * 1987-05-20 1988-11-25 Matsushita Electric Ind Co Ltd Flip chip bonding
JPH07169875A (en) * 1993-03-11 1995-07-04 Toshiba Corp Electronic circuit device, manufacture thereof, circuit board, liquid crystal display device, thermal head, and printer
JPH09293760A (en) * 1996-04-26 1997-11-11 Matsushita Electron Corp Leveling device and manufacture of semiconductor device
JPH10107078A (en) * 1996-09-30 1998-04-24 Toshiba Electron Eng Corp Manufacture of electronic parts and electronic parts
JPH10163215A (en) * 1996-12-05 1998-06-19 Matsushita Electric Ind Co Ltd Bump leveling device and its method

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63288031A (en) * 1987-05-20 1988-11-25 Matsushita Electric Ind Co Ltd Flip chip bonding
JPH07169875A (en) * 1993-03-11 1995-07-04 Toshiba Corp Electronic circuit device, manufacture thereof, circuit board, liquid crystal display device, thermal head, and printer
JPH09293760A (en) * 1996-04-26 1997-11-11 Matsushita Electron Corp Leveling device and manufacture of semiconductor device
JPH10107078A (en) * 1996-09-30 1998-04-24 Toshiba Electron Eng Corp Manufacture of electronic parts and electronic parts
JPH10163215A (en) * 1996-12-05 1998-06-19 Matsushita Electric Ind Co Ltd Bump leveling device and its method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006006817A1 (en) * 2004-07-14 2006-01-19 Ixelon Co., Ltd. Junction structure of display driver chip and ic chip and flexible substrate using au flat bump, and junction metheod thereof

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