JP3347911B2 - Semiconductor device mounting method - Google Patents

Semiconductor device mounting method

Info

Publication number
JP3347911B2
JP3347911B2 JP10275995A JP10275995A JP3347911B2 JP 3347911 B2 JP3347911 B2 JP 3347911B2 JP 10275995 A JP10275995 A JP 10275995A JP 10275995 A JP10275995 A JP 10275995A JP 3347911 B2 JP3347911 B2 JP 3347911B2
Authority
JP
Japan
Prior art keywords
electrode
semiconductor device
gold wire
circuit board
fine particles
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP10275995A
Other languages
Japanese (ja)
Other versions
JPH08298271A (en
Inventor
一博 登
一人 西田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP10275995A priority Critical patent/JP3347911B2/en
Publication of JPH08298271A publication Critical patent/JPH08298271A/en
Application granted granted Critical
Publication of JP3347911B2 publication Critical patent/JP3347911B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
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    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
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    • H01L2224/8319Arrangement of the layer connectors prior to mounting
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE: To provide a method of mounting a semiconductor device on a circuit board, wherein the semiconductor device is kept free from an electrical connection failure and capable of being replaced with a new one when it becomes defective. CONSTITUTION: A golden ball formed on the tip of a gold wire is pressed against the electrode 2 of a semiconductor device 1 by a capillary and electrically and mechanically bonded to it by heating and ultrasonic vibrations, and then a golden wire protrudent electrode 3 possessed of a protrudent top formed by moving the capillary in loops is formed. An anisotropic conductive film 7 composed of an insulating adhesive resin layer 7a and a mall amount of conductive fine particles 6 so dispersed in the resin layer 7a as not to deteriorate it in insulating properties is pasted on a circuit board 9, recesses 5 which are so recessed smaller than the diameter of the fine particle 6 and capable of trapping the conductive fine particles 6 are provided to the nearly flattened surface of the protrudent top of the golden wire protrudent electrode 3 when the protrudent top of the protrudent electrode 3 is flattened by a leveling plate, and the semiconductor device 1 is pressed against the circuit board 9, and the anisotropically conductive film 7 is cured by heating.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、半導体装置と回路基板
とを電気的機械的に接続する半導体装置の実装方法に関
するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device mounting method for electrically and mechanically connecting a semiconductor device and a circuit board.

【0002】[0002]

【従来の技術】従来から、公知のメッキ技術によって電
極上に突起電極(以下、バンプという)を形成した半導
体装置を回路基板に電気的機械的に接続する方法とし
て、エレクトロニクス実装技術1994年1月号の66
頁に記載のように、異方性導電膜を使用する方法が知ら
れている。この方法は、図10に示すように、先ず、絶
縁性接着樹脂7aに導電性微粒子6を絶縁性を損なわな
い程度に少量分散させたものからなる異方性導電膜7を
入出力電極8を有する回路基板9の上に貼り付ける。こ
の場合、導電性微粒子6の直径は5μm程度であり、1
00μm3 に25個程度が混入されており、又、導電性
微粒子6には、外面に絶縁被覆が施されたものもある。
次いで、半導体装置1のアルミ電極2上に公知のメッキ
技術によってメッキバンプ18を形成し、次いで、前記
メッキバンプ18を形成した半導体装置1を前記の回路
基板9上に位置決めして重ね合わせ、最後に、加熱と加
圧とを同時に行って、前記メッキバンプ18と入出力電
極8との間の距離を前記導電性微粒子6の直径以下に維
持した状態にして前記異方性導電膜7を硬化する。この
ようにすると、前記メッキバンプ18と前記入出力電極
8との間は、前記メッキバンプ18と前記入出力電極8
との間の直接接触と、両者間で押しつぶされた前記導電
性微粒子6aを介しての接触とによって、電気的に接続
することになる。
2. Description of the Related Art Heretofore, as a method of electrically and mechanically connecting a semiconductor device having a bump electrode (hereinafter referred to as a bump) formed on an electrode by a known plating technique to a circuit board, an electronic packaging technique, January 1994. Issue 66
As described on page, a method of using an anisotropic conductive film is known. In this method, as shown in FIG. 10, first, an anisotropic conductive film 7 made of a material obtained by dispersing a small amount of conductive fine particles 6 in an insulating adhesive resin 7a so as not to impair the insulating property is used to form the input / output electrode 8 And pasted on the circuit board 9. In this case, the diameter of the conductive fine particles 6 is about 5 μm,
Approximately 25 particles are mixed in 00 μm 3 , and some of the conductive fine particles 6 have an outer surface coated with an insulating material.
Next, a plating bump 18 is formed on the aluminum electrode 2 of the semiconductor device 1 by a known plating technique, and then the semiconductor device 1 on which the plating bump 18 is formed is positioned and superimposed on the circuit board 9. At the same time, the anisotropic conductive film 7 is cured by heating and pressurizing at the same time while maintaining the distance between the plating bump 18 and the input / output electrode 8 to be equal to or less than the diameter of the conductive fine particles 6. I do. In this way, between the plating bump 18 and the input / output electrode 8, the plating bump 18 and the input / output electrode 8
Are electrically connected by the direct contact between the two and the contact via the conductive fine particles 6a crushed between the two.

【0003】ところで、前記メッキバンプ18と前記入
出力電極8との間の直接接触は、前記接着樹脂による機
械的接着保持力で維持されるものであり、メッキバンプ
18には弾力性が無いので電気的接続を維持する能動的
な加圧力が存在せず、ヒートサイクルを加えた場合に電
気的接続の信頼性が低い。しかし、両者間で押しつぶさ
れた前記導電性微粒子6aを介する電気的接触には、前
記の押しつぶされた導電性微粒子6aの弾力性による能
動的な加圧力が存在するので、ヒートサイクルを加えて
も電気的接続の信頼性を維持できるとされている。
The direct contact between the plating bump 18 and the input / output electrode 8 is maintained by the mechanical adhesive holding force of the adhesive resin, and the plating bump 18 has no elasticity. There is no active pressing force to maintain the electrical connection, and the reliability of the electrical connection is low when a heat cycle is applied. However, the electrical contact via the crushed conductive fine particles 6a between the two has an active pressing force due to the elasticity of the crushed conductive fine particles 6a. It is said that the reliability of the electrical connection can be maintained.

【0004】[0004]

【発明が解決しようとする課題】しかし、上記の従来例
では、メッキバンプ18は、平面部が広いので、メッキ
バンプ18の平面部と入出力電極8との間に多くの押し
つぶされた導電性微粒子6aが存在するように思われる
が、実際には、メッキバンプ18の角が図10に示すよ
うな曲面になっていること等にもより、絶縁性接着樹脂
7aと導電性微粒子6とが、メッキバンプ18の平面部
と入出力電極8との間から共に流れ出てしまい、メッキ
バンプ18の平面部と入出力電極8との間には、僅かの
導電性微粒子6しか残らず、導電性微粒子6が全く残ら
ない入出力電極8も発生する。この場合には、ヒートサ
イクルには耐えられず、電気的接続不良になるという問
題点がある。
However, in the above-described conventional example, since the plating bump 18 has a large flat portion, a large amount of crushed conductive material exists between the flat portion of the plating bump 18 and the input / output electrode 8. Although the fine particles 6a seem to be present, the insulating adhesive resin 7a and the conductive fine particles 6 are actually separated by the fact that the corners of the plated bumps 18 are curved as shown in FIG. , Flows out from between the flat portion of the plating bump 18 and the input / output electrode 8, leaving only a small amount of the conductive fine particles 6 between the flat portion of the plating bump 18 and the input / output electrode 8. An input / output electrode 8 in which no fine particles 6 remain is also generated. In this case, there is a problem that it cannot withstand the heat cycle, resulting in poor electrical connection.

【0005】又、半導体装置1を実装し、実装後の検査
でその半導体装置1が不良と判明した場合、その不良半
導体装置1を良品に取替えようとしても、入出力電極8
上には、導電性微粒子6が存在しないか、存在していて
も押しつぶされ過ぎて、半導体装置1を取り外した後に
は弾力性を失っているので、取り替えた半導体装置1が
電気的接続不良になるという問題点がある。
When the semiconductor device 1 is mounted, and the semiconductor device 1 is found to be defective in the inspection after mounting, even if the defective semiconductor device 1 is replaced with a non-defective product, the input / output electrode 8
The conductive fine particles 6 are not present on the top, or are crushed too much even if present, and lose elasticity after the semiconductor device 1 is removed. There is a problem that becomes.

【0006】又、位置決めして重ね合わせた後に、加熱
と加圧とを行う工程が必要なので、工程に時間がかか
り、生産性向上に限界があるという問題点がある。
Further, since a step of heating and pressing is required after positioning and superposition, there is a problem that the process is time-consuming, and there is a limit to improvement in productivity.

【0007】本発明は、上記の問題点を解決し、電気的
接続不良が起きることが無く、不良半導体装置の取替え
が可能であり、更には、加圧・加熱工程が不要である半
導体装置の実装方法を提供することを課題としている。
[0007] The present invention solves the above-mentioned problems, eliminates the problem of electrical connection, allows replacement of defective semiconductor devices, and further eliminates the need for a pressurizing and heating process. The task is to provide a mounting method.

【0008】[0008]

【課題を解決するための手段】本願第1発明の半導体装
置の実装方法は、上記の課題を解決するために、金線の
先端に熱エネルギにより金ボールを形成し、前記金ボー
ルをキャピラリーにより半導体装置の電極上に接合した
後、前記キャピラリーをループ移動させて突起形状頂部
を有する金線突起電極を形成する金線突起電極形成工程
と、回路基板上に、絶縁性接着樹脂に導電性微粒子を絶
縁性を損なわない程度に少量分散させたものからなる異
方性導電膜を貼り付ける異方性導電膜貼付工程と、レベ
リング板を前記半導体装置の金線突起電極の突起形状頂
部に押し当て、前記突起形状頂部を略平坦化する際に、
前記の略平坦化された面に対して前記導電性微粒子の直
径より少し小さい段差を有する凹部を前記略平坦化され
た面に残すレベリング工程と、前記金線突起電極と前記
回路基板の入出力電極とを位置合わせした後、前記半導
体装置を前記回路基板に押圧し加熱して前記異方性導電
膜を硬化させる押圧加熱工程とを有することを特徴とす
る。 又、本願第1発明の半導体装置の実装方法は、上
記の課題を解決するために、導電性微粒子の直径より少
し小さい段差を有する凹部は、金線突起電極上に残った
キャピラリーの先端跡からなることが好適である。
According to a first aspect of the present invention, there is provided a method for mounting a semiconductor device, comprising the steps of forming a gold ball at the tip of a gold wire by thermal energy, and forming the gold ball by a capillary. After bonding on the electrode of the semiconductor device, the capillary is loop-moved to form a gold projection electrode having a projection-shaped top, and a conductive fine particle is formed on the insulating adhesive resin on the circuit board. Anisotropic conductive film sticking step of sticking an anisotropic conductive film made of a material in which a small amount is dispersed so as not to impair insulation, and pressing a leveling plate against the top of the protruding shape of the gold wire protruding electrode of the semiconductor device. When substantially flattening the top of the projection shape,
A leveling step of leaving a recess having a step slightly smaller than the diameter of the conductive fine particles with respect to the substantially flattened surface on the substantially flattened surface; and inputting and outputting the gold wire projecting electrode and the circuit board. And pressing and heating the semiconductor device against the circuit board after the electrodes are aligned with each other to cure the anisotropic conductive film. In order to solve the above-mentioned problem, the mounting method of the semiconductor device according to the first aspect of the present invention is configured such that the concave portion having a step slightly smaller than the diameter of the conductive fine particles is formed from the trace of the tip of the capillary remaining on the gold wire projection electrode. Preferably.

【0009】又、本願第1発明の半導体装置の実装方法
は、上記の課題を解決するために、導電性微粒子の直径
より少し小さい段差を有する凹部は、レベリング板に設
けた円柱状の凸部により形成されることが好適である。
Further, in order to solve the above-mentioned problems, in the method of mounting a semiconductor device according to the first invention, the concave portion having a step slightly smaller than the diameter of the conductive fine particles is formed by a columnar convex portion provided on the leveling plate. Is preferably formed.

【0010】本願第2発明の半導体装置の実装方法は、
上記の課題を解決するために、金線の先端に熱エネルギ
により金ボールを形成し、前記金ボールをキャピラリー
により半導体装置の電極上に接合した後、前記キャピラ
リーをループ移動させて突起形状頂部を有する金線突起
電極を形成する金線突起電極形成工程と、回路基板上
に、絶縁性接着樹脂に導電性微粒子を絶縁性を損なわな
い程度に少量分散させたものからなる異方性導電膜を貼
り付ける異方性導電膜貼付工程と、レベリング板を前記
半導体装置の金線突起電極の突起形状頂部に押し当て、
前記突起形状頂部を略平坦化する際に、前記の略平坦化
された面に対して前記導電性微粒子の直径より少し小さ
い段差を有する凹部を前記略平坦化された面に残すレベ
リング工程と、前記金線突起電極と前記回路基板の入出
力電極とを位置合わせした後、仮加圧仮硬化する仮加圧
硬化工程と、電気特性を検査する検査工程と、検査結果
が良の場合に本加圧本硬化する本加圧硬化工程と、検査
結果が不良の場合に不良半導体装置を取り替える取替え
工程とを有することを特徴とする。
The mounting method of the semiconductor device according to the second invention of the present application is as follows.
In order to solve the above-mentioned problem, a gold ball is formed at the tip of a gold wire by thermal energy, and the gold ball is bonded onto an electrode of a semiconductor device by a capillary. A gold wire projection electrode forming step of forming a gold wire projection electrode having, and an anisotropic conductive film formed by dispersing a small amount of conductive fine particles in an insulating adhesive resin on the circuit board so as not to impair the insulating property. Anisotropic conductive film sticking step to be stuck, and a leveling plate is pressed against the top of the protruding shape of the gold wire protruding electrode of the semiconductor device,
When substantially flattening the projection-shaped top, a leveling step of leaving a recess having a step slightly smaller than the diameter of the conductive fine particles with respect to the substantially flattened surface on the substantially flattened surface, After aligning the gold wire protruding electrodes with the input / output electrodes of the circuit board, a temporary pressurizing and curing step, and an inspecting step of inspecting electrical characteristics. The present invention is characterized by including a main pressure hardening step of main hardening under pressure and a replacement step of replacing a defective semiconductor device when an inspection result is defective.

【0011】本願第3発明の半導体装置の実装方法は、
上記の課題を解決するために、金線の先端に熱エネルギ
により金ボールを形成し、前記金ボールをキャピラリー
により半導体装置の電極上に接合した後、前記キャピラ
リーをループ移動させて突起形状頂部を有する金線突起
電極を形成する金線突起電極形成工程と、回路基板上
に、絶縁性接着樹脂からなる絶縁性接着樹脂膜を貼り付
ける絶縁性接着樹脂膜貼付工程と、前記金線突起電極と
前記回路基板の入出力電極とを位置合わせした後、前記
半導体装置を前記回路基板に押圧し加熱又は光線により
前記絶縁性接着樹脂膜を硬化させる押圧硬化工程とを有
することを特徴とする。
The mounting method of the semiconductor device according to the third invention of the present application is as follows.
In order to solve the above-mentioned problem, a gold ball is formed at the tip of a gold wire by thermal energy, and the gold ball is bonded onto an electrode of a semiconductor device by a capillary. A gold wire projection electrode forming step of forming a gold wire projection electrode having, an insulating adhesive resin film sticking step of sticking an insulating adhesive resin film made of an insulating adhesive resin on a circuit board; A step of pressing the semiconductor device against the circuit board after the input and output electrodes of the circuit board are aligned, and curing the insulating adhesive resin film by heating or light rays.

【0012】本願第4発明の半導体装置の実装方法は、
上記の課題を解決するために、金線の先端に熱エネルギ
により金ボールを形成し、前記金ボールをキャピラリー
により半導体装置の全電極上にそれぞれ押圧し、加圧と
加熱と超音波振動とにより前記金ボールと前記電極とを
金属間結合で電気的機械的に接合した後、前記キャピラ
リーをループ移動させて突起形状頂部を有する金線突起
電極を形成する金線突起電極形成工程と、回路基板の入
出力電極上にアルミ電極を形成するアルミ電極形成工程
と、前記金線突起電極と前記回路基板の入出力電極とを
位置合わせした後、前記半導体装置を前記回路基板に押
圧し加熱と超音波振動とにより前記金線突起電極と前記
入出力電極上のアルミ電極とを金属間結合で電気的機械
的に接合する接合工程とを有することを特徴とする。
[0012] A method of mounting a semiconductor device according to a fourth aspect of the present invention is as follows.
In order to solve the above-mentioned problem, a gold ball is formed at the tip of a gold wire by thermal energy, and the gold ball is pressed onto all the electrodes of the semiconductor device by a capillary, and is pressed, heated and ultrasonically vibrated. A step of forming a wire projection electrode in which the gold ball and the electrode are electrically and mechanically joined by metal-to-metal bonding, and then the capillary is loop-moved to form a gold wire projection electrode having a projection-shaped top; An aluminum electrode forming step of forming an aluminum electrode on the input / output electrode, and after aligning the gold wire protruding electrode and the input / output electrode of the circuit board, pressing the semiconductor device against the circuit board to heat and A bonding step of electrically and mechanically bonding the gold wire protruding electrode and the aluminum electrode on the input / output electrode by metal-to-metal bonding by sonic vibration.

【0013】[0013]

【作用】本願第1〜第3発明は、半導体装置の電極と回
路基板の入出力電極間に接触による電気的接合を得よう
とする場合に、接触し合う導電材の少なくとも一方に弾
力性を持たせると、ヒートサイクルが加えられても高い
信頼性を維持できるということを利用している。
According to the first to third inventions of the present application, at least one of the conductive materials that are in contact with each other has elasticity when electrical connection is to be obtained by contact between the electrode of the semiconductor device and the input / output electrode of the circuit board. Utilizing the fact that it can maintain high reliability even if a heat cycle is added if it is given.

【0014】本願第1発明の半導体装置の実装方法は、
絶縁性接着樹脂に導電性微粒子を絶縁性を損なわない程
度に少量分散させたものからなる異方性導電膜を回路基
板の入出力電極上に貼付し、半導体装置の電極上に突起
形状頂部を有する金線突起電極を形成し、レベリング工
程において、前記の突起形状頂部を略平坦化し、その際
に、略平坦化した面に対して前記導電性微粒子の直径よ
り少し小さい段差を有する凹部を前記の略平坦化された
面に残しているので、前記半導体装置を前記回路基板に
対して加圧し同時に加熱し前記異方性導電膜を硬化させ
て前記金線突起電極と前記入出力電極とを接触させて電
気的に接合する場合に、前記導電性微粒子が、少し圧縮
されただけで弾力性を維持している状態で、前記凹部に
捕捉されて、前記金線突起電極と前記入出力電極との間
を電気的に接合する。このように、前記導電性微粒子が
弾力性を維持していることにより、ヒートサイクルが加
えられても、前記金線突起電極と前記入出力電極間の電
気的接合が低下せず、電気的接合の信頼性が高い半導体
装置の実装が可能になる。
The mounting method of the semiconductor device according to the first invention of the present application is as follows.
An anisotropic conductive film made of a small amount of conductive fine particles dispersed in an insulating adhesive resin so as not to impair the insulating property is stuck on the input / output electrodes of the circuit board, and the projection-shaped top is formed on the electrode of the semiconductor device. Forming a gold wire protruding electrode having, in the leveling step, substantially flattening the top of the protruding shape, and forming a recess having a step slightly smaller than the diameter of the conductive fine particles with respect to the substantially flattened surface. Since the semiconductor device is left on the substantially flattened surface, the semiconductor device is pressed against the circuit board and simultaneously heated to cure the anisotropic conductive film, and the gold wire projection electrode and the input / output electrode are connected to each other. In the case where the conductive fine particles are brought into contact with each other and electrically connected, the conductive fine particles are captured by the concave portion while maintaining the elasticity only by being slightly compressed, and the gold wire projection electrode and the input / output electrode are captured. Electrical connection between . As described above, since the conductive fine particles maintain elasticity, even when a heat cycle is applied, the electrical connection between the gold wire projecting electrode and the input / output electrode does not decrease, and the electrical connection does not occur. The semiconductor device with high reliability can be mounted.

【0015】又、本願第1発明の半導体装置の実装方法
は、導電性微粒子の直径より少し小さい段差を有する凹
部を、金線突起電極上に残ったキャピラリーの先端跡に
よって形成すると、形成が簡単、容易である。
The method of mounting a semiconductor device according to the first aspect of the present invention is simple in that the recess having a step slightly smaller than the diameter of the conductive fine particles is formed by the trace of the tip of the capillary remaining on the gold wire projection electrode. Is easy.

【0016】又、本願第1発明の半導体装置の実装方法
は、導電性微粒子の直径より少し小さい段差を有する凹
部を、レベリング板に設けた円柱状の凸部により形成す
ると、前記凹部に捕捉される導電性微粒子の数が多くな
り、電気的接合の信頼性が、更に、向上する。
In the method of mounting a semiconductor device according to the first aspect of the present invention, when a concave portion having a step slightly smaller than the diameter of the conductive fine particles is formed by a columnar convex portion provided on a leveling plate, the concave portion is trapped by the concave portion. Thus, the number of conductive fine particles increases, and the reliability of electrical bonding is further improved.

【0017】本願第2発明の半導体装置の実装方法は、
本願第1発明の作用に加えて、導電性微粒子の直径より
少し小さい段差を有する凹部に捕捉されている導電性微
粒子が、少し圧縮されただけで弾力性を維持している状
態であることを利用し、仮加圧仮硬化する仮加圧硬化工
程を加えて、実装された半導体装置の電気特性を検査
し、良品のみを本加圧本硬化し、不良品を取り替えるこ
とができる。
The mounting method of the semiconductor device according to the second invention of the present application is as follows.
In addition to the effect of the first invention of the present application, the conductive fine particles trapped in the concave portion having a step slightly smaller than the diameter of the conductive fine particles are in a state of maintaining elasticity by being slightly compressed. A temporary pressure curing step of temporary pressure temporary curing using the semiconductor device is performed, the electrical characteristics of the mounted semiconductor device are inspected, only non-defective products are fully pressurized and fully cured, and defective products can be replaced.

【0018】本願第3発明の半導体装置の実装方法は、
半導体装置の電極上に突起形状頂部を有する金線突起電
極を形成し、金線によって構成される前記突起形状頂部
が有する弾力性を利用して、前記金線突起電極と回路基
板の入出力電極間に接触による電気的接合を構成するも
のであり、絶縁性接着樹脂膜貼付工程において、回路基
板上に、絶縁性接着樹脂からなる絶縁性接着樹脂膜を貼
り付け、押圧硬化工程において、前記金線突起電極と前
記回路基板の入出力電極とを位置合わせした後、前記半
導体装置を前記回路基板に押圧すると同時に加熱又は光
線により前記絶縁性接着樹脂膜を硬化させるので、金線
によって構成される前記突起形状頂部が有する弾力性
が、半導体装置の電極と回路基板の入出力電極間の接触
による電気的接合を維持し、ヒートサイクルが加えられ
ても高い信頼性を維持する電気的接合が得られる。又、
絶縁性接着樹脂膜は混入微粒子が無いので光線の透過率
が維持され、光線等によって硬化する樹脂を接着樹脂膜
に使用し、且つ、電極に透明なITOを使用すれば光線
による硬化が可能で、耐熱性が無い回路基板にも適用で
きる。
The method for mounting a semiconductor device according to the third invention of the present application is as follows.
A gold wire projection electrode having a projection-shaped top is formed on an electrode of a semiconductor device, and the gold wire projection electrode and an input / output electrode of a circuit board are used by utilizing the elasticity of the projection-shaped top formed by a gold wire. In the step of applying an insulating adhesive resin film, an insulating adhesive resin film made of an insulating adhesive resin is attached on a circuit board in the step of applying an insulating adhesive resin film, and in the pressing and curing step, the gold is used. After the linear projection electrodes and the input / output electrodes of the circuit board are aligned, the semiconductor device is pressed against the circuit board, and at the same time, the insulating adhesive resin film is cured by heating or light rays. The elasticity of the top of the protrusion shape maintains electrical connection due to contact between the electrode of the semiconductor device and the input / output electrode of the circuit board, and maintains high reliability even when a heat cycle is applied. Electrical connection to be obtained. or,
Since the insulating adhesive resin film does not contain mixed fine particles, the transmittance of light is maintained, and if a resin that cures with light or the like is used for the adhesive resin film, and if transparent ITO is used for the electrodes, curing with light can be performed. Also, it can be applied to a circuit board having no heat resistance.

【0019】本願第4発明の半導体装置の実装方法は、
超音波振動を利用して、従来例では必要な別工程におけ
る加熱硬化時間を不要にするものである。
The mounting method of the semiconductor device according to the fourth invention of the present application is as follows.
Utilizing ultrasonic vibration, the conventional example eliminates the need for a heating and curing time in a separate step which is necessary.

【0020】加圧と加熱と超音波振動とによって、多点
で接触している金属間に金属間結合を発生させ均一で良
好な電気的機械的接合を得るには、多点の各接触圧が均
一であることが必要である。このためには、多点が弾力
性圧力で接触していると都合が良い。本願第4発明はこ
のことを利用している。
In order to generate a metal-to-metal bond between the metals in contact at multiple points by pressurization, heating and ultrasonic vibration to obtain a uniform and good electrical-mechanical bond, it is necessary to use various contact pressures at multiple points. Must be uniform. For this purpose, it is advantageous if the multiple points are in contact with elastic pressure. The fourth invention of the present application utilizes this fact.

【0021】半導体装置の電極上に突起形状頂部を有す
る金線突起電極を形成する。金線によって構成された前
記突起形状頂部は弾力性を有している。そして、アルミ
電極形成工程において回路基板の入出力電極上にアルミ
電極を形成し、接合工程において、前記半導体装置の金
線突起電極と前記回路基板の入出力電極とを位置合わせ
した後、前記半導体装置を前記回路基板に押圧し加熱と
超音波振動とを加えて、前記金線突起電極と前記入出力
電極上のアルミ電極との間に金属間結合を形成する。こ
の場合、前記半導体装置は多数の電極を有するので、多
数の金線突起電極が多数の入出力電極に押圧されること
になる。しかし、前記金線突起電極の頂部に設けられた
突起形状頂部が弾力性を有するので、前記半導体装置と
前記回路基板との平行度に多少の狂いがあっても、又、
各電極の高さに多少の不揃いがあっても、前記弾力性が
前記の多数の電極間の各接触圧を均一に調整する作用を
果たし、接合すべき電極が多数であっても、必要容量が
ある超音波発振子と増幅ホーンとを使用しさえすれば、
加圧と加熱と超音波振動とによって前記金線突起電極と
前記入出力電極上のアルミ電極との間に均一で良好な金
属間結合を形成することができる。
A gold projecting electrode having a projecting top is formed on an electrode of a semiconductor device. The protrusion-shaped top formed by a gold wire has elasticity. Forming an aluminum electrode on the input / output electrode of the circuit board in an aluminum electrode forming step, and aligning the gold wire projection electrode of the semiconductor device with the input / output electrode of the circuit board in the bonding step; The apparatus is pressed against the circuit board and heated and ultrasonically oscillated to form an intermetallic bond between the gold wire protruding electrode and the aluminum electrode on the input / output electrode. In this case, since the semiconductor device has a large number of electrodes, a large number of gold wire protruding electrodes are pressed by a large number of input / output electrodes. However, since the projection-shaped top provided on the top of the gold wire projection electrode has elasticity, even if there is some deviation in the parallelism between the semiconductor device and the circuit board,
Even if there is some irregularity in the height of each electrode, the elasticity acts to uniformly adjust each contact pressure between the large number of electrodes. As long as there is an ultrasonic oscillator and an amplification horn,
By applying pressure, heating, and ultrasonic vibration, a uniform and good intermetallic connection can be formed between the gold wire protruding electrode and the aluminum electrode on the input / output electrode.

【0022】[0022]

【実施例】本発明の半導体装置の実装方法の第1実施例
を図1〜図6に基づいて説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of a method for mounting a semiconductor device according to the present invention will be described with reference to FIGS.

【0023】本実施例は、図1に示すように、金線突起
電極3と異方性導電膜7とを使用し、金線突起電極3の
凹部5によって、異方性導電膜7に混入されている導電
性微粒子6をその弾力性を維持させながら使用して、電
気的接続不良の発生を防止する半導体装置の実装方法で
ある。
In this embodiment, as shown in FIG. 1, a gold wire projection electrode 3 and an anisotropic conductive film 7 are used, and mixed into the anisotropic conductive film 7 by a concave portion 5 of the gold wire projection electrode 3. This is a method of mounting a semiconductor device in which the conductive fine particles 6 used are used while maintaining their elasticity to prevent occurrence of electrical connection failure.

【0024】本実施例は、先ず、絶縁性接着樹脂7aに
導電性微粒子6を絶縁性を損なわない程度に少量分散さ
せたものからなる異方性導電膜7(図1参照)を入出力
電極8を有する回路基板9の上に貼り付ける。
In the present embodiment, first, an anisotropic conductive film 7 (see FIG. 1) composed of a small amount of conductive fine particles 6 dispersed in an insulating adhesive resin 7a so as not to impair the insulation is used as an input / output electrode. 8 on a circuit board 9 having the same.

【0025】他方、図2に示すように、150°C〜3
00°Cに加熱したステージ19上に半導体装置1を真
空吸着により固定し、キャピラリー10により、公知の
ワイヤボンディング方式の1st工程と同じ方法で、金
線11の先端に形成した金ボールをアルミ電極2上に押
し当て、押し当てると同時に超音波振動をキャピラリー
10に加え、金ボールをアルミ電極2に金属間接合して
金線突起電極3を形成する。これによって、図2に示す
ように、金線突起電極3上にキャピラリー10の先端形
状により凹部5が形成される。勿論、必要であれば、以
下に説明する目的に合わせて、キャピラリー10の先端
形状を望ましい形状にすれば良い。
On the other hand, as shown in FIG.
The semiconductor device 1 is fixed on a stage 19 heated to 00 ° C. by vacuum suction, and the gold ball formed at the tip of the gold wire 11 is fixed to the aluminum electrode by the capillary 10 in the same manner as in the first step of a known wire bonding method. 2 and ultrasonic vibration is applied to the capillary 10 at the same time as the pressing, and a gold ball is bonded to the aluminum electrode 2 between the metals to form a gold wire projection electrode 3. Thereby, as shown in FIG. 2, the concave portion 5 is formed on the gold wire projecting electrode 3 by the tip shape of the capillary 10. Of course, if necessary, the tip of the capillary 10 may have a desired shape for the purpose described below.

【0026】次いで、図3に示すように、一般に行われ
ているようにして、キャピラリー10を、少し上昇させ
少し横に移動し再び下降させて、前記の金線突起電極3
に接触させる。金線11は、上記の接触した部分で切断
され、図4に示す形状の金線突起電極3が形成される。
この時点では、金線突起電極3は図4に示すように、底
部3aでアルミ電極に接続し、凹部5と、突起形状頂部
4aとを有する。前記の凹部5があると、異方性導電膜
7に混入されている導電性微粒子6を前記凹部に捕捉し
てその弾力性を維持させながら使用することができ、電
気的接続不良の発生を防止し、且つ、不良半導体装置の
取替えを可能にする。
Next, as shown in FIG. 3, the capillary 10 is slightly raised, moved a little laterally, and lowered again, as is generally done, and the gold wire protruding electrode 3 is turned off.
Contact. The gold wire 11 is cut at the above-mentioned contacted portion, and the gold wire projection electrode 3 having the shape shown in FIG. 4 is formed.
At this time, the gold wire protruding electrode 3 is connected to the aluminum electrode at the bottom 3a, as shown in FIG. 4, and has a concave portion 5 and a protruding top 4a. When the concave portion 5 is provided, the conductive fine particles 6 mixed in the anisotropic conductive film 7 can be used while retaining the elasticity by capturing the conductive fine particle 6 in the concave portion. Prevention and replacement of defective semiconductor devices.

【0027】次いで、図5に示すようにして、突起形状
頂部4aを略平坦化した平坦化頂部4bに形成する。図
4に示す金線突起電極3を、半導体装置1の個々のアル
ミ電極2上に形成すると、各金線突起電極3の夫々の高
さがある許容範囲内で微妙に異なる。この状態では回路
基板に信頼性良く接合出来ないので、図5に示すよう
に、レベリング板12を使用して、一つの半導体装置内
の全ての金線突起電極3を同時に押さえつけ、全ての金
線突起電極3の高さをレベリングして揃える。このレベ
リングの際に、本実施例では、レベリングされた金線突
起電極3に、凹部5を残し、且つ、平坦化頂部4bと凹
部5の底との距離を、異方性導電膜7に混入されている
導電性微粒子6の直径よりも小さくする。そして、小さ
くする程度は、前記導電性微粒子6が押さえられて、金
線突起電極3と入出力電極8との間の電気的接続を維持
し、且つ、前記導電性微粒子6の弾力性が維持される程
度とする。
Next, as shown in FIG. 5, the projection-shaped top 4a is formed on a substantially flattened top 4b. When the gold wire projection electrodes 3 shown in FIG. 4 are formed on the individual aluminum electrodes 2 of the semiconductor device 1, the heights of the gold wire protrusion electrodes 3 are slightly different within a certain allowable range. In this state, it is not possible to join the semiconductor device to the circuit board with high reliability. Therefore, as shown in FIG. 5, all the gold wire protruding electrodes 3 in one semiconductor device are pressed down simultaneously using the leveling plate 12, and The heights of the protruding electrodes 3 are leveled and aligned. At the time of this leveling, in this embodiment, the concave portion 5 is left on the leveled gold wire projection electrode 3 and the distance between the flattened top 4b and the bottom of the concave portion 5 is mixed into the anisotropic conductive film 7. Smaller than the diameter of the conductive fine particles 6. To the extent that the conductive fine particles 6 are reduced, the conductive fine particles 6 are pressed down, the electrical connection between the gold wire projecting electrode 3 and the input / output electrode 8 is maintained, and the elasticity of the conductive fine particles 6 is maintained. It is to the extent that it is done.

【0028】次いで、図1に示すように、図5のレベリ
ングを行った半導体装置1を、先に処理済みの、前記異
方性導電膜7を貼り付けた回路基板9の上に位置決めし
て重ね合わせる。
Next, as shown in FIG. 1, the semiconductor device 1 subjected to the leveling shown in FIG. 5 is positioned on the previously processed circuit board 9 to which the anisotropic conductive film 7 is attached. Overlap.

【0029】最後に、加熱と加圧とを同時に行って、金
線突起電極3の平坦化頂部4bと入出力電極8との間の
距離を前記導電性微粒子6の直径以下に維持した状態で
前記異方性導電膜7を硬化する。このようにすると、前
記金線突起電極3の平坦化頂部4bと入出力電極8との
間では、前記導電性微粒子6の大部分が外に流れ出し、
残った僅かの前記導電性微粒子6は押しつぶされた導電
性微粒子6aになって弾力性を失っているが、前記の流
れ出ようとした導電性微粒子6が前記凹部5と入出力電
極8との間に捕捉され、樹脂の硬化によってそこに弾力
性を維持して固定され、金線突起電極3と入出力電極8
との間に、ヒートサイクルを受けても、信頼性が高い電
気的接続を維持する。
Finally, heating and pressurizing are performed simultaneously to maintain the distance between the flattened top 4b of the gold wire protruding electrode 3 and the input / output electrode 8 equal to or less than the diameter of the conductive fine particles 6. The anisotropic conductive film 7 is cured. By doing so, most of the conductive fine particles 6 flow out between the flattened top 4b of the gold wire projection electrode 3 and the input / output electrode 8, and
The small amount of the remaining conductive fine particles 6 becomes crushed conductive fine particles 6a and loses elasticity. However, the conductive fine particles 6 which are about to flow out are located between the concave portion 5 and the input / output electrode 8. The metal wire projection electrode 3 and the input / output electrode 8
Maintain a highly reliable electrical connection even when subjected to a heat cycle.

【0030】尚、本実施例においては、金線突起電極3
の平坦化頂部4bを形成する際に、図6に示すように、
金線突起電極3の平坦化頂部4bにも、導電性微粒子6
を弾力性を捕捉して存在させるために、レベリング板1
2の、前記各金線突起電極3に対向する位置に、薄い円
柱状凸部13を設ける。これらの円柱状凸部13を設け
たレベリング板12を使用すると、図6に示すように、
金線突起電極3に凹部付平坦化頂部4cが得られる。こ
の凹部付平坦化頂部4cの深さを、前記導電性微粒子6
が押さえられて、金線突起電極3と入出力電極8との間
に接触による電気的接続を維持し、且つ、前記導電性微
粒子6の弾力性が維持される程度とすれば、図1に示す
ようにした場合に、凹部付平坦化頂部4c内に導電性微
粒子6が捕捉され、樹脂の硬化によってそこに弾力性を
維持して固定され、金線突起電極3と入出力電極8との
間に、ヒートサイクルを受けても、信頼性が高い電気的
接続を維持する。尚、本実施例では、レベリング板12
にはガラス板を使用し、薄い円柱状凸部13はインジュ
ム・錫・鉛からなり透明電極に使用されるITOで形成
した。
In this embodiment, the gold wire protruding electrode 3
When forming the flattened top portion 4b, as shown in FIG.
The conductive fine particles 6 are also provided on the flattened top 4b of the gold wire projection electrode 3.
Leveling plate 1 to capture elasticity
2, a thin columnar projection 13 is provided at a position facing each of the gold wire projection electrodes 3. When the leveling plate 12 provided with these columnar projections 13 is used, as shown in FIG.
A flattened top 4c with a recess is obtained in the gold wire projection electrode 3. The depth of the recessed flattened top 4c is determined by the
1 is maintained so as to maintain the electrical connection by contact between the gold wire protruding electrode 3 and the input / output electrode 8 and to maintain the elasticity of the conductive fine particles 6, FIG. In the case shown in the figure, the conductive fine particles 6 are captured in the flattened top portion 4c with the concave portion, are fixed there while maintaining elasticity by curing of the resin, and are formed between the gold wire projecting electrode 3 and the input / output electrode 8. In the meantime, maintain a reliable electrical connection, even during a heat cycle. In this embodiment, the leveling plate 12
, A thin cylindrical projection 13 made of indium, tin, and lead was formed of ITO used for a transparent electrode.

【0031】本発明の半導体装置の実装方法の第2実施
例を図1〜図6に基づいて説明する。
A second embodiment of the method for mounting a semiconductor device according to the present invention will be described with reference to FIGS.

【0032】本実施例は、第1実施例と同様にして半導
体装置1を回路基板9に実装し、実装後の検査でその半
導体装置1が不良と判明した場合、その不良半導体装置
1を良品に取替えることができる半導体装置の実装方法
である。
In the present embodiment, the semiconductor device 1 is mounted on the circuit board 9 in the same manner as in the first embodiment, and if the semiconductor device 1 is found to be defective in the inspection after mounting, the defective semiconductor device 1 This is a method of mounting a semiconductor device that can be replaced with a semiconductor device.

【0033】本実施例では、先ず、第1実施例と同様に
して、図1に示すようにして全体の位置決めを行った後
に、絶縁性接着樹脂7aが仮硬化する程度の低い温度
と、金線突起電極3と入出力電極8との間に検査ができ
る程度の電気的接続が得られる程度の弱い圧力で加圧す
る。この状態では、絶縁性接着樹脂7aは仮硬化の状態
にあり、導電性微粒子6は、金線突起電極3の凹部5、
又は、凹部付平坦化頂部4cにおいて、半導体装置の特
性検査ができる程度の導通が得られる程度に加圧されて
いるが、未だ充分な弾力性を有する状態にある。
In this embodiment, first, in the same manner as in the first embodiment, after the entire positioning is performed as shown in FIG. 1, a temperature low enough to temporarily harden the insulating adhesive resin 7a, Pressurization is performed at such a low pressure that electrical connection between the line-projecting electrode 3 and the input / output electrode 8 can be obtained so that inspection can be performed. In this state, the insulating adhesive resin 7a is in a pre-cured state, and the conductive fine particles 6
Alternatively, the pressure is applied to the flattened top portion 4c with the concave portion so as to obtain a continuity enough to allow the characteristic inspection of the semiconductor device, but still has a sufficient elasticity.

【0034】次いで、上記のように仮実装された半導体
装置1の特性検査を行う。この結果、良との結果が出れ
ば、本硬化して実装を完了する。検査結果が不良であれ
ば、不良の半導体装置1を垂直方向に引っ張って取り外
す。この状態では、絶縁性接着樹脂7aは仮硬化の状態
にあり、導電性微粒子6は、未だ充分な弾力性を有する
状態にある。
Next, a characteristic test of the semiconductor device 1 provisionally mounted as described above is performed. As a result, if a result of "good" is obtained, the main curing is performed and the mounting is completed. If the inspection result is defective, the defective semiconductor device 1 is pulled vertically and removed. In this state, the insulating adhesive resin 7a is in a temporarily cured state, and the conductive fine particles 6 are still in a state having sufficient elasticity.

【0035】従って、次いで、上記と同様に処理した半
導体装置1を、上記と同様にして、仮実装する。
Accordingly, the semiconductor device 1 processed in the same manner as above is provisionally mounted in the same manner as above.

【0036】次いで、上記のように再度仮実装された半
導体装置1の特性検査を再度行い、良好な検査結果がで
るまで、上記を繰り返す。
Next, the characteristic inspection of the semiconductor device 1 temporarily mounted as described above is performed again, and the above operation is repeated until a good inspection result is obtained.

【0037】本発明の半導体装置の実装方法の第3実施
例を図2〜図4と図7とに基づいて説明する。
A third embodiment of the method for mounting a semiconductor device according to the present invention will be described with reference to FIGS.

【0038】本実施例は、第1、第2実施例が、異方性
導電膜7に混入されている導電性微粒子6をその弾力性
を維持させながら使用して、電気的接続不良の発生を防
止し、更に、不良半導体装置の取替えを可能にしている
のとは異なり、金線突起電極3そのものの弾力性を利用
して、電気的接続不良の発生を防止する半導体装置の実
装方法である。
This embodiment is different from the first and second embodiments in that the use of the conductive fine particles 6 mixed in the anisotropic conductive film 7 while maintaining its elasticity causes the occurrence of an electrical connection failure. Is different from that of the first embodiment in that a defective semiconductor device can be replaced, and the elasticity of the gold wire projecting electrode 3 itself is used to prevent the occurrence of electrical connection failure. is there.

【0039】先ず、図7に示すように、絶縁性接着樹脂
7aからなる絶縁性接着樹脂膜7bを入出力電極8を有
する回路基板9の上に張り付ける。
First, as shown in FIG. 7, an insulating adhesive resin film 7b made of an insulating adhesive resin 7a is attached on a circuit board 9 having input / output electrodes 8.

【0040】次いで、図2〜図4において、第1、第2
実施例と同様にして、図4に示す突起形状頂部4aを有
する金線突起電極3を半導体装置1のアルミ電極2上に
形成する。この状態においては、突起形状頂部4aは、
突起形状を有すると共に、金線としての弾力性を持って
いる。
Next, in FIG. 2 to FIG.
In the same manner as in the embodiment, the gold wire protruding electrode 3 having the protruding top 4a shown in FIG. 4 is formed on the aluminum electrode 2 of the semiconductor device 1. In this state, the projection-shaped top 4a is
It has a projection shape and elasticity as a gold wire.

【0041】次いで、図4に示す突起形状頂部4aを有
する金線突起電極3をアルミ電極2上に形成した半導体
装置1を、前記の絶縁性接着樹脂膜7bを貼り付けた回
路基板9の上に位置決めして重ね合わせる。
Next, the semiconductor device 1 in which the gold wire protruding electrode 3 having the protruding top 4a shown in FIG. 4 is formed on the aluminum electrode 2 is placed on the circuit board 9 on which the insulating adhesive resin film 7b is adhered. Position and superimpose.

【0042】最後に、加熱と加圧とを同時に行って、図
7に示すように、前記の突起形状頂部4aを有する金線
突起電極3を押しつぶし、押しつぶされた金線突起電極
4dの形状にして、前記の絶縁性接着樹脂膜7bを硬化
する。この状態では、前記の突起形状頂部4aが押しつ
ぶされる際に、前記の硬化する前の絶縁性接着樹脂膜7
bを貫通して入出力電極8上に達し、金線突起電極3の
突起形状頂部4aは、その形状に固有の弾力性を保持し
て、前記入出力電極8に押しつぶされた金線突起電極4
dとなって固定される。従って、金線突起電極3と入出
力電極8との間に、ヒートサイクルを受けても、信頼性
が高い電気的接続が維持される。電極に透明なITOを
使用し、且つ、紫外線等によって硬化する樹脂を接着樹
脂膜7bに使用すれば、耐熱性が無い回路基板への実装
が可能である。
Finally, heating and pressurizing are performed simultaneously to crush the gold wire protruding electrode 3 having the above-mentioned protrusion-shaped top 4a, as shown in FIG. Then, the insulating adhesive resin film 7b is cured. In this state, when the projection-shaped top 4a is crushed, the insulating adhesive resin film 7 before being cured is hardened.
b, reaches the input / output electrode 8, and the projection-shaped top 4 a of the gold wire projection electrode 3 retains the elasticity inherent to the shape, and the gold wire projection electrode 3 crushed by the input / output electrode 8 4
It is fixed as d. Accordingly, a highly reliable electrical connection is maintained between the gold wire protruding electrode 3 and the input / output electrode 8 even when subjected to a heat cycle. If transparent ITO is used for the electrodes and a resin that is cured by ultraviolet rays or the like is used for the adhesive resin film 7b, it is possible to mount the circuit board having no heat resistance.

【0043】本発明の半導体装置の実装方法の第4実施
例を図2〜図4、図8、図9に基づいて説明する。
A fourth embodiment of the method for mounting a semiconductor device according to the present invention will be described with reference to FIGS. 2 to 4, 8 and 9.

【0044】本実施例は、第1〜第3実施例が、金線突
起電極3と入出力電極8とを弾力的に接触させて、ヒー
トサイクルを受けても、信頼性が高い電気的接続を維持
しているのに対して、金線突起電極3と入出力電極8と
の間に金属間化合物を形成することによって、信頼性が
高い電気的機械的接続を構成すると共に、第1〜第3実
施例が必要な樹脂硬化時間を不要にする半導体装置の実
装方法である。
This embodiment is different from the first to third embodiments in that the gold wire protruding electrode 3 and the input / output electrode 8 are brought into elastic contact with each other, so that a highly reliable electrical connection can be obtained even when subjected to a heat cycle. Is maintained, by forming an intermetallic compound between the gold wire projection electrode 3 and the input / output electrode 8, a highly reliable electromechanical connection is formed, The third embodiment is a method of mounting a semiconductor device which does not require a required resin curing time.

【0045】先ず、図8に示すように、回路基板9の入
出力電極8上にアルミ電極15を形成する。
First, as shown in FIG. 8, an aluminum electrode 15 is formed on the input / output electrode 8 of the circuit board 9.

【0046】次いで、図2〜図4において、第1、第
2、第3実施例と同様にして、図4に示す突起形状頂部
4aを有する金線突起電極3を半導体装置1のアルミ電
極2上に形成する。この状態においては、突起形状頂部
4aは、突起形状を有すると共に、その形状に固有の弾
力性を持っている。
Next, in FIGS. 2 to 4, the gold wire protruding electrode 3 having the protruding top 4a shown in FIG. 4 is replaced with the aluminum electrode 2 of the semiconductor device 1 in the same manner as in the first, second, and third embodiments. Form on top. In this state, the projection-shaped top 4a has a projection shape and elasticity inherent to the shape.

【0047】次いで、回路基板9を加熱されたステージ
19上に真空吸着によって固定する。
Next, the circuit board 9 is fixed on the heated stage 19 by vacuum suction.

【0048】次いで、半導体装置1の突起形状頂部4a
を有する金線突起電極3と回路基板9のアルミ電極15
とを位置合わせし、大きな容量の超音波振動子と増幅ホ
ーンとによる超音波振動を矢印17の方向に加えながら
半導体装置1を回路基板9に加圧して、温度と超音波振
動と加圧とによって金とアルミニウムとの間に金属間結
合を発生させ、金属間結合した金線突起電極4eと入出
力電極8との間の電気的機械的結合を得る。16は上記
の増幅ホーンに取付けられている吸着手段である。
Next, the projection-shaped top 4a of the semiconductor device 1 is formed.
Wire protruding electrode 3 having aluminum and aluminum electrode 15 of circuit board 9
The semiconductor device 1 is pressurized on the circuit board 9 while applying ultrasonic vibrations by the ultrasonic vibrator and the amplification horn having a large capacity in the direction of the arrow 17 so that the temperature, the ultrasonic vibrations and the pressure As a result, an intermetallic bond is generated between gold and aluminum, thereby obtaining an electrical and mechanical connection between the gold wire protruding electrode 4e and the input / output electrode 8 which are intermetallicly connected. Numeral 16 denotes a suction means attached to the amplification horn.

【0049】この場合、加圧と加熱と超音波振動とによ
って、接触している多数の電極間に金属間結合を発生さ
せ均一で良好な電気的機械的接合を得るには、多数の電
極間の各接触圧が均一に調整できることが必要である。
そのためには、多数の電極間が弾力性圧力によって接触
していることが都合が良い。
In this case, in order to generate a metal-to-metal bond between a large number of electrodes in contact with each other by pressurizing, heating and ultrasonic vibration to obtain a uniform and good electrical-mechanical bonding, it is necessary to use a large number of electrodes. It is necessary that each contact pressure can be adjusted uniformly.
For that purpose, it is convenient that many electrodes are in contact with each other by elastic pressure.

【0050】本実施例では、金線によって構成された前
記突起形状頂部4aはその形状に固有の弾力性を有して
いる。前記半導体装置1と前記回路基板9との平行度に
多少の狂いがあり、各電極の高さに多少の不揃いがあっ
ても、この弾力性が、多数の電極間の各接触圧を均一に
調整する作用を果たすので、必要な容量がある超音波発
振子と増幅ホーンとを使用すれば、前記突起形状頂部4
aと前記入出力電極8上のアルミ電極15との間に均一
で良好な金属間結合を形成することができる。
In this embodiment, the projection-shaped top 4a formed of a gold wire has elasticity inherent to the shape. Even if there is some deviation in the parallelism between the semiconductor device 1 and the circuit board 9 and there is some irregularity in the height of each electrode, this elasticity makes each contact pressure between many electrodes uniform. Since an adjusting function is performed, if an ultrasonic oscillator and an amplification horn having a necessary capacity are used, the projection-shaped top 4
A uniform and good intermetallic connection can be formed between a and the aluminum electrode 15 on the input / output electrode 8.

【0051】[0051]

【発明の効果】本願第1発明の半導体装置の実装方法
は、レベリング工程において、前記の突起形状頂部を略
平坦化する際に、前記略平坦化された面に対して前記導
電性微粒子の直径より少し小さい段差を有する凹部を前
記略平坦化された面に残しているので、前記半導体装置
を前記回路基板に対して加圧した場合に、前記導電性微
粒子が、前記凹部に確実に捕捉され、且つ、少し圧縮さ
れて弾力性を保持している状態で、前記金線突起電極と
前記入出力電極とに挟持される。このようにして、前記
導電性微粒子が弾力性を有していることにより、ヒート
サイクルが加えられても、電気的接合の高い信頼性を維
持できる半導体装置の実装が可能になるという効果を奏
する。
According to the first aspect of the present invention, in the leveling step, when the top of the projection is substantially flattened, the diameter of the conductive fine particles with respect to the substantially flattened surface is reduced. Since the concave portion having a slightly smaller step is left on the substantially flattened surface, when the semiconductor device is pressed against the circuit board, the conductive fine particles are reliably captured by the concave portion. And it is sandwiched between the gold wire protruding electrode and the input / output electrode in a state of being slightly compressed and maintaining elasticity. In this way, since the conductive fine particles have elasticity, it is possible to mount a semiconductor device capable of maintaining high reliability of electrical bonding even when a heat cycle is applied. .

【0052】又、本願第1発明の半導体装置の実装方法
は、導電性微粒子の直径より少し小さい段差を有する凹
部を、金線突起電極上に残ったキャピラリーの先端跡に
よって形成すると、形成が簡単、容易であるという効果
を奏する。
The method for mounting a semiconductor device according to the first aspect of the present invention is simple in that the recess having a step slightly smaller than the diameter of the conductive fine particles is formed by the trace of the tip of the capillary remaining on the gold wire projection electrode. The effect is that it is easy.

【0053】又、本願第1発明の半導体装置の実装方法
は、導電性微粒子の直径より少し小さい段差を有する凹
部を、レベリング板に設けた円柱状の凸部により形成す
ると、前記凹部に捕捉される導電性微粒子の数が多くな
り、電気的接合の信頼性が、更に、向上するという効果
を奏する。
In the method of mounting a semiconductor device according to the first aspect of the present invention, when a concave portion having a step slightly smaller than the diameter of the conductive fine particles is formed by a columnar convex portion provided on a leveling plate, the concave portion is trapped by the concave portion. Thus, the number of conductive fine particles increases, and the reliability of electrical bonding is further improved.

【0054】本願第2発明の半導体装置の実装方法は、
本願第1発明の効果に加えて、導電性微粒子が少し圧縮
された状態で弾力性を維持していることを利用し仮加圧
仮硬化して半導体装置の電気特性を検査し、良品のみを
本加圧本硬化し、不良品を取り替えることができるとい
う効果を奏する。
The mounting method of the semiconductor device according to the second invention of the present application is as follows.
In addition to the effect of the first invention of the present application, the electrical characteristics of the semiconductor device are inspected by temporarily pressing and temporarily hardening utilizing the fact that the conductive fine particles maintain elasticity in a slightly compressed state, and only non-defective products are inspected. There is an effect that the main pressurization and main curing can be performed to replace defective products.

【0055】本願第3発明の半導体装置の実装方法は、
金線によって構成される前記突起形状頂部が有する弾力
性を利用して、絶縁性接着樹脂膜を貫通して前記金線突
起電極と回路基板の入出力電極間に接触による電気的接
合を構成できるという効果を奏する。又、絶縁性接着樹
脂膜は光線の透過率が良いので、ITO等の透明電極を
使用すれば、光線による硬化が可能であり、耐熱性が無
い回路基板への実装が可能になるという効果を奏する。
The mounting method of the semiconductor device according to the third invention of the present application is as follows.
Utilizing the elasticity of the projection-shaped top formed by a gold wire, an electrical connection can be formed by contact between the gold-wire projection electrode and the input / output electrode of the circuit board through the insulating adhesive resin film. This has the effect. Also, since the insulating adhesive resin film has a good light transmittance, if a transparent electrode such as ITO is used, it can be cured by light and can be mounted on a circuit board having no heat resistance. Play.

【0056】本願第4発明の半導体装置の実装方法は、
金線によって構成される前記突起形状頂部が有する弾力
性と超音波振動とを利用して、従来例では必要な別工程
における加熱硬化時間を不要にして、生産性を向上でき
るという効果を奏する。
The mounting method of the semiconductor device according to the fourth invention of the present application is as follows.
Utilizing the elasticity and ultrasonic vibration of the top of the protruding shape constituted by the gold wire, the conventional example has the effect of eliminating the necessary heat curing time in a separate step and improving productivity.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の半導体装置の実装方法の第1、第2実
施例を使用して実装された半導体装置の断面図である。
FIG. 1 is a sectional view of a semiconductor device mounted using first and second embodiments of a method of mounting a semiconductor device according to the present invention.

【図2】本発明の半導体装置の実装方法の金線突起電極
形成工程を示す断面図である。
FIG. 2 is a cross-sectional view illustrating a step of forming a gold wire projection electrode in the method of mounting a semiconductor device according to the present invention.

【図3】本発明の半導体装置の実装方法の金線突起電極
形成工程を示す断面図である。
FIG. 3 is a cross-sectional view showing a step of forming a gold wire projection electrode in the semiconductor device mounting method of the present invention.

【図4】本発明の半導体装置の実装方法の金線突起電極
の正面図である。
FIG. 4 is a front view of a gold wire protruding electrode in the semiconductor device mounting method of the present invention.

【図5】本発明の半導体装置の実装方法のレベリング工
程の一例を示す正面図である。
FIG. 5 is a front view showing an example of a leveling step of the semiconductor device mounting method of the present invention.

【図6】本発明の半導体装置の実装方法のレベリング工
程の他の例を示す正面図である。
FIG. 6 is a front view showing another example of the leveling step of the semiconductor device mounting method of the present invention.

【図7】本発明の半導体装置の実装方法の第3実施例を
使用して実装された半導体装置の正面図である。
FIG. 7 is a front view of a semiconductor device mounted using a third embodiment of the semiconductor device mounting method of the present invention.

【図8】本発明の半導体装置の実装方法の第4実施例の
動作を示す正面図である。
FIG. 8 is a front view showing the operation of the fourth embodiment of the method for mounting a semiconductor device according to the present invention.

【図9】本発明の半導体装置の実装方法の第4実施例を
使用して実装された半導体装置の正面図である。
FIG. 9 is a front view of a semiconductor device mounted using a semiconductor device mounting method according to a fourth embodiment of the present invention;

【図10】従来例の半導体装置の実装方法を使用して実
装された半導体装置の正面図である。
FIG. 10 is a front view of a semiconductor device mounted using a conventional semiconductor device mounting method.

【符号の説明】[Explanation of symbols]

1 半導体装置 2 アルミ電極 3 金線突起電極 4a 突起状頂部 4b 平坦化頂部 4c 凹部付平坦化頂部 4d 押しつぶされた金線突起電極 4e 金属間結合した金線突起電極 5 凹部 6 導電性微粒子 6a 押しつぶされた導電性微粒子 7 異方性導電膜 7a 絶縁性接着樹脂 7b 接着樹脂膜 8 入出力電極 9 回路基板 10 キャピラリー 11 金線 12 レベリング板 13 円柱状凸部 DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Aluminum electrode 3 Gold wire projection electrode 4a Protrusion top 4b Flattened top 4c Flattened top with recess 4d Crushed gold wire projection electrode 4e Metal-bonded gold wire projection electrode 5 Depression 6 Conductive fine particles 6a Crushed Conductive fine particles 7 Anisotropic conductive film 7a Insulating adhesive resin 7b Adhesive resin film 8 Input / output electrode 9 Circuit board 10 Capillary 11 Gold wire 12 Leveling plate 13 Columnar projection

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭63−122133(JP,A) 特開 平3−228334(JP,A) 特開 平4−32171(JP,A) 特開 平6−151507(JP,A) 特開 平7−99202(JP,A) (58)調査した分野(Int.Cl.7,DB名) H01L 21/60 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-63-122133 (JP, A) JP-A-3-228334 (JP, A) JP-A-4-32171 (JP, A) JP-A-6-133 151507 (JP, A) JP-A-7-99202 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 21/60

Claims (6)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 金線の先端に熱エネルギにより金ボール
を形成し、前記金ボールをキャピラリーにより半導体装
置の電極上に接合した後、前記キャピラリーをループ移
動させて突起形状頂部を有する金線突起電極を形成する
金線突起電極形成工程と、回路基板上に、絶縁性接着樹
脂に導電性微粒子を絶縁性を損なわない程度に少量分散
させたものからなる異方性導電膜を貼り付ける異方性導
電膜貼付工程と、レベリング板を前記半導体装置の金線
突起電極の突起形状頂部に押し当て、前記突起形状頂部
を略平坦化する際に、前記の略平坦化された面に対して
前記導電性微粒子の直径より少し小さい段差を有する凹
部を前記略平坦化された面に残すレベリング工程と、前
記金線突起電極と前記回路基板の入出力電極とを位置合
わせした後、前記半導体装置を前記回路基板に押圧し加
熱して前記異方性導電膜を硬化させる押圧加熱工程とを
有することを特徴とする半導体装置の実装方法。
A gold wire is formed at the tip of a gold wire by thermal energy, and the gold ball is bonded to an electrode of a semiconductor device by a capillary. An anisotropic conductive film formed by forming a gold wire projecting electrode to form an electrode, and attaching an anisotropic conductive film made of a small amount of conductive fine particles dispersed in an insulating adhesive resin so as not to impair the insulating property on a circuit board. A conductive conductive film sticking step, and pressing a leveling plate against the protruding top of the gold wire protruding electrode of the semiconductor device to substantially flatten the protruding top, the above-mentioned flattened surface is A leveling step of leaving a recess having a step slightly smaller than the diameter of the conductive fine particles on the substantially flattened surface; A pressing and heating step of pressing and heating the conductor device against the circuit board to cure the anisotropic conductive film.
【請求項2】 導電性微粒子の直径より少し小さい段差
を有する凹部は、金線突起電極上に残ったキャピラリー
の先端跡からなる請求項1に記載の半導体装置の実装方
法。
2. The semiconductor device mounting method according to claim 1, wherein the concave portion having a step slightly smaller than the diameter of the conductive fine particles comprises a trace of the tip of the capillary remaining on the gold wire projecting electrode.
【請求項3】 導電性微粒子の直径より少し小さい段差
を有する凹部は、レベリング板に設けた円柱状の凸部に
より形成される請求項1に記載の半導体装置の実装方
法。
3. The semiconductor device mounting method according to claim 1, wherein the recess having a step slightly smaller than the diameter of the conductive fine particles is formed by a columnar protrusion provided on the leveling plate.
【請求項4】 金線の先端に熱エネルギにより金ボール
を形成し、前記金ボールをキャピラリーにより半導体装
置の電極上に接合した後、前記キャピラリーをループ移
動させて突起形状頂部を有する金線突起電極を形成する
金線突起電極形成工程と、回路基板上に、絶縁性接着樹
脂に導電性微粒子を絶縁性を損なわない程度に少量分散
させたものからなる異方性導電膜を貼り付ける異方性導
電膜貼付工程と、レベリング板を前記半導体装置の金線
突起電極の突起形状頂部に押し当て、前記突起形状頂部
を略平坦化する際に、前記の略平坦化された面に対して
前記導電性微粒子の直径より少し小さい段差を有する凹
部を前記略平坦化された面に残すレベリング工程と、前
記金線突起電極と前記回路基板の入出力電極とを位置合
わせした後、仮加圧仮硬化する仮加圧硬化工程と、電気
特性を検査する検査工程と、検査結果が良の場合に本加
圧本硬化する本加圧硬化工程と、検査結果が不良の場合
に不良半導体装置を取り替える取替え工程とを有するこ
とを特徴とする半導体装置の実装方法。
4. A gold wire projection having a projection-shaped top by forming a gold ball at the tip of a gold wire by thermal energy, bonding the gold ball to an electrode of a semiconductor device by a capillary, and moving the capillary in a loop. An anisotropic conductive film formed by forming a gold wire projecting electrode to form an electrode, and attaching an anisotropic conductive film made of a small amount of conductive fine particles dispersed in an insulating adhesive resin so as not to impair the insulating property on a circuit board. A conductive conductive film sticking step, and pressing a leveling plate against the protruding top of the gold wire protruding electrode of the semiconductor device to substantially flatten the protruding top, the above-mentioned flattened surface is A leveling step of leaving a concave portion having a step slightly smaller than the diameter of the conductive fine particles on the substantially flattened surface; and aligning the gold wire protruding electrode with the input / output electrode of the circuit board, and then temporarily applying pressure. Temporary pressure hardening process for temporary hardening, inspection process for inspecting electrical characteristics, main pressure hardening process for final press hardening if the inspection result is good, and defective semiconductor device if the inspection result is bad A method for mounting a semiconductor device, comprising: a replacement step of replacing.
【請求項5】 金線の先端に熱エネルギにより金ボール
を形成し、前記金ボールをキャピラリーにより半導体装
置の電極上に接合した後、前記キャピラリーをループ移
動させて突起形状頂部を有する金線突起電極を形成する
金線突起電極形成工程と、回路基板上に、絶縁性接着樹
脂からなる絶縁性接着樹脂膜を貼り付ける絶縁性接着樹
脂膜貼付工程と、前記金線突起電極と前記回路基板の入
出力電極とを位置合わせ後、前記半導体装置を前記回路
基板に押圧し加熱又は光線により前記絶縁性接着樹脂膜
を硬化させる押圧硬化工程とを有することを特徴とする
半導体装置の実装方法。
5. A gold wire projection having a projection-shaped top by forming a gold ball at the tip of a gold wire by thermal energy, bonding the gold ball to an electrode of a semiconductor device by a capillary, and moving the capillary in a loop. A step of forming a gold wire projection electrode for forming an electrode, an insulating adhesive resin film sticking step of sticking an insulating adhesive resin film made of an insulating adhesive resin on a circuit board, and forming the gold wire projection electrode and the circuit board. Pressing the semiconductor device against the circuit board after the alignment with the input / output electrodes and curing the insulating adhesive resin film by heating or light rays.
【請求項6】 金線の先端に熱エネルギにより金ボール
を形成し、前記金ボールをキャピラリーにより半導体装
置の全電極上にそれぞれ押圧し、加圧と加熱と超音波振
動とにより前記金ボールと前記電極とを金属間結合で電
気的機械的に接合した後、前記キャピラリーをループ移
動させて突起形状頂部を有する金線突起電極を形成する
金線突起電極形成工程と、回路基板の入出力電極上にア
ルミ電極を形成するアルミ電極形成工程と、前記金線突
起電極と前記回路基板の入出力電極とを位置合わせした
後、前記半導体装置を前記回路基板に押圧し加熱と超音
波振動とにより前記金線突起電極と前記入出力電極上の
アルミ電極とを金属間結合で電気的機械的に接合する接
合工程とを有することを特徴とする半導体装置の実装方
法。
6. A gold ball is formed at the tip of a gold wire by thermal energy, and the gold ball is pressed onto all the electrodes of a semiconductor device by a capillary, and the gold ball is pressed by heating, and ultrasonic vibration. A step of forming a gold wire protruding electrode having a protruding top by loop-moving the capillary after electrically and mechanically bonding the electrode and the metal by metal-to-metal bonding; and an input / output electrode of a circuit board. An aluminum electrode forming step of forming an aluminum electrode thereon, and after aligning the gold wire protruding electrode and the input / output electrode of the circuit board, pressing the semiconductor device against the circuit board, and heating and ultrasonic vibration A bonding step of electrically and mechanically bonding the gold wire projection electrode and the aluminum electrode on the input / output electrode by metal-to-metal bonding.
JP10275995A 1995-04-26 1995-04-26 Semiconductor device mounting method Expired - Fee Related JP3347911B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10275995A JP3347911B2 (en) 1995-04-26 1995-04-26 Semiconductor device mounting method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10275995A JP3347911B2 (en) 1995-04-26 1995-04-26 Semiconductor device mounting method

Publications (2)

Publication Number Publication Date
JPH08298271A JPH08298271A (en) 1996-11-12
JP3347911B2 true JP3347911B2 (en) 2002-11-20

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ID=14336133

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Link
JP (1) JP3347911B2 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6204564B1 (en) * 1997-11-21 2001-03-20 Rohm Co., Ltd. Semiconductor device and method for making the same
CN1201383C (en) 1999-01-29 2005-05-11 松下电器产业株式会社 Electronic parts mounting method and device therefor

Also Published As

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