JP2000150557A5 - - Google Patents

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Publication number
JP2000150557A5
JP2000150557A5 JP1998324125A JP32412598A JP2000150557A5 JP 2000150557 A5 JP2000150557 A5 JP 2000150557A5 JP 1998324125 A JP1998324125 A JP 1998324125A JP 32412598 A JP32412598 A JP 32412598A JP 2000150557 A5 JP2000150557 A5 JP 2000150557A5
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JP
Japan
Prior art keywords
terminals
electrode pads
bumps
main surface
plating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1998324125A
Other languages
English (en)
Japanese (ja)
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JP2000150557A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP10324125A priority Critical patent/JP2000150557A/ja
Priority claimed from JP10324125A external-priority patent/JP2000150557A/ja
Publication of JP2000150557A publication Critical patent/JP2000150557A/ja
Publication of JP2000150557A5 publication Critical patent/JP2000150557A5/ja
Pending legal-status Critical Current

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JP10324125A 1998-11-13 1998-11-13 半導体装置およびその製造方法 Pending JP2000150557A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10324125A JP2000150557A (ja) 1998-11-13 1998-11-13 半導体装置およびその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10324125A JP2000150557A (ja) 1998-11-13 1998-11-13 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
JP2000150557A JP2000150557A (ja) 2000-05-30
JP2000150557A5 true JP2000150557A5 (enrdf_load_stackoverflow) 2004-10-28

Family

ID=18162437

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10324125A Pending JP2000150557A (ja) 1998-11-13 1998-11-13 半導体装置およびその製造方法

Country Status (1)

Country Link
JP (1) JP2000150557A (enrdf_load_stackoverflow)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100881389B1 (ko) 2002-12-26 2009-02-05 주식회사 하이닉스반도체 반도체소자의 패키지 구현방법
JP2004273591A (ja) * 2003-03-06 2004-09-30 Seiko Epson Corp 半導体装置及びその製造方法
JP4057017B2 (ja) 2005-01-31 2008-03-05 富士通株式会社 電子装置及びその製造方法
JP4566915B2 (ja) * 2006-01-10 2010-10-20 大日本印刷株式会社 半導体装置の実装体、半導体装置実装体の製造方法
US8742603B2 (en) * 2010-05-20 2014-06-03 Qualcomm Incorporated Process for improving package warpage and connection reliability through use of a backside mold configuration (BSMC)
US8461676B2 (en) 2011-09-09 2013-06-11 Qualcomm Incorporated Soldering relief method and semiconductor device employing same
JP6635328B2 (ja) 2014-11-10 2020-01-22 ローム株式会社 半導体装置およびその製造方法

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