JP2000114313A - Manufacture of solder bump electrode - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce imperfect packaging, lower electric contact resistance, and improve connection strength, by polishing the tip of a solder bump electrode, after electric characteristic is checked by contacting with the solder bump electrode. SOLUTION: After a solder ball pump 14 is formed, electric characteristic of a device chip 30 is checked. A probe trace 21 is inevitably formed in a tip part of the solder ball bump after measurement. A wafer in this state is set in polishing equipment, a bump tip part 14A on the wafer surface part is polished. The probe trace formed on the tip part 14A of the solder bump 14 is polished and eliminated, and the bump surface 14B is smoothed. Thereby electric junction characteristic and adherence are improved in a product device assembled by flip-chip mounting a semiconductor chip polished after electric characteristic check of a solder bump on a printing wiring board.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for treating a surface of a solder bump electrode in the formation of a solder bump electrode such as a solder ball bump, which is applied in the field of manufacturing semiconductor devices, and more particularly to a probe mark in an electrical characteristic test. The present invention relates to a method for manufacturing a solder bump electrode having high reliability, in which a failure due to a residue, contamination, or the like in a wet back process is avoided, and mounting failure on a printed wiring board and electrical connection resistance are reduced.

[0002]

2. Description of the Related Art In order to further reduce the size of electronic devices, it is important to improve the component mounting density. For example, semiconductor IC (integrated circuit)
Also, as a substitute for the conventional package mounting, a so-called flip-chip high-density mounting technology is being developed in the world. As one of flip-chip mounting methods, there is a method in which a solder ball bump is formed on an Al electrode pad of a semiconductor IC and an IC bare chip is directly mounted on a printed wiring board.

As a method of forming the solder bump on a predetermined electrode, there is a method of using electrolytic plating. In this case, the film is formed due to the surface condition of the base and slight variations in electric resistance. Since the thickness of the solder is affected, there is a problem that it is basically difficult to form solder bumps of uniform height within the IC chip. Therefore, as a manufacturing method capable of suppressing the variation in the height of the solder pattern, there is a method using film formation by vacuum evaporation and lift-off of a photoresist film, and the present applicant has proposed it. An example of a manufacturing process of a solder ball bump by this method will be briefly described with reference to FIG.

FIG. 7 shows a junction of a flip chip IC.
As shown in (a), a semiconductor substrate 100 of silicon (Si)
1, an electrode pad 1002 of Al or the like is formed by sputtering etching or the like, and a surface protective film 1003 is entirely covered with polyimide or the like.
An opening is formed thereon. As a result, BLM (Ball Limit
A pattern of a metal multilayer film made of Cr, Cu, Au, or the like, called a “ting metal” film 1004, is formed as shown in FIG. A resist film having an opening 1006 is formed on the BLM film 1004 as shown in FIG. A solder deposition film 1013 is formed on the entire surface of the wafer 1022 as shown in FIG.
After patterning by registry lift-off as shown in FIG. 1D, the solder is melted by heat treatment, so that the solder ball bump 1014 as shown in FIG. It is formed on the BLM film 1004.

[0005]

By this heat treatment,
The process of rounding the solder deposited film into a spherical shape is usually called wet back, and if a natural oxide film is thickly formed on the surface of the solder film after film formation, the melting of the solder will not occur even if heat treatment is applied. The ball bumps cannot be formed without progressing evenly. Therefore, usually, a flux having a reducing action or a surface active action (main component is an amine-based activator, alcohol solvent, resin such as rosin and polyglycol) is uniformly applied on the entire surface of the wafer in advance on the surface of the patterned solder film. By applying a heat treatment from that state, the solder is promoted to be rounded into a spherical shape due to the melting and surface tension of the solder, and a stable ball bump is formed.

[0006] Then, the wafer after the bumps are formed by the heat treatment is washed with an organic chemical solution to remove the flux. At this time, during the heat treatment, the organic components in the flux are carbonized and the surface of the wafer is carbonized. If the flux is adhered or an improper cleaning method is used, defects such as the solid content in the flux cannot be completely removed even after the cleaning and remains as a residue on the solder bump surface or in the vicinity thereof. If contamination during the wet back process remains on the solder bump surface, or if oxidation of the bump surface progresses due to improper storage of the sample after bump formation, a probe is applied to the bump in the subsequent process to obtain electrical characteristics. When the measurement is performed, the contact resistance becomes large, which causes problems such as an inability to accurately evaluate the electric characteristics.

In addition, when these residues and contamination are left on the polyimide film, which is the protective film on the outermost surface of the bump-forming chip, flip-chip mounting is performed on the printed wiring board. The adhesion speed with the sealing resin is weakened, which leads to deterioration of the bonding strength (cracks, etc.) and the reliability life (increase of connection resistance, etc.) of the bumps. In addition, the inspection to guarantee the electrical characteristics of the device chip on which the bumps are formed is usually performed by applying a probe needle to the top of the solder ball bump after finishing, but in order to establish electrical continuity. Therefore, it is inevitable that a trace of the probe remains on the bump surface after measurement.

[0008] In some cases, the entire bump is crushed, causing variations in the height of the bump in the chip. As a result, a defect may be caused when the chip is mounted on a printed wiring board. Under these circumstances, in the formation of solder ball bumps, avoiding mounting defects caused by probe marks formed on the tops of the bumps when conducting electrical characteristic inspections, and cleaning the finished bump surface to clean the printed wiring board. There is an urgent need to establish a high-performance, high-reliability bump manufacturing technique that can reduce contact resistance. Therefore, the present invention solves the above-mentioned problems, and provides a method for manufacturing a solder bump electrode that can reduce mounting defects by making the heights of the solder bump electrodes uniform, reduce electrical connection resistance, and improve connection strength. It is intended to be.

[0009]

According to a first aspect of the present invention, at least a top portion of the solder bump electrode is polished after an electrical characteristic test is performed by contacting the solder bump electrode. This is a method for manufacturing a solder bump electrode. Thereby, when inspecting the electrical characteristics by contact, the mark formed on the top (preferably the top) of the solder bump electrode is polished and smoothed. Thereby, the height of the solder bump electrodes is uniform, and it is possible to reduce defective electrical mounting. According to a second aspect of the present invention, in the first aspect of the present invention, after at least the top portion of the solder bump electrode is polished, a sputter etching process using at least an inert gas discharge plasma is performed. This allows
It is possible to effectively remove a natural oxide film and a process residue formed on the surface of the joint portion of the solder bump electrode to expose a clean surface of the solder bump electrode. By cleaning and activating the joint surface of the solder bump electrode, the connection resistance can be reduced and the connection strength can be improved, so that the reliability can be improved.

According to a third aspect of the present invention, in the method for manufacturing a solder bump electrode according to the first aspect, after at least the top portion of the solder bump electrode is polished, a sputter etching process using at least discharge plasma of a reducing gas is performed. Do. This cleans and activates the surface of the joint of the solder bump electrode, thereby reducing the connection resistance and improving the connection strength, thereby improving the reliability.
According to a fourth aspect of the present invention, in the method for manufacturing a solder bump electrode according to the second aspect, the solder bump electrode is formed on an electronic device chip. As a result, variations in the height of the solder balls are equalized by the polishing process, so that the heights of the finished protruding electrodes in the device chip can be made uniform. Then, a surface layer such as a polyimide film used as a surface protection film of the device chip with the protruding electrodes can be chemically activated.
According to a fifth aspect of the present invention, in the method of the third aspect, the solder bump electrode is formed on an electronic device chip. As a result, variations in the height of the solder balls are equalized by the polishing process, so that the heights of the finished protruding electrodes in the device chip can be made uniform. Then, a surface layer such as a polyimide film used as a surface protection film of the device chip with the protruding electrodes can be chemically activated.

[0011]

Preferred embodiments of the present invention will be described below in detail with reference to the accompanying drawings. Note that the embodiments described below are preferred specific examples of the present invention,
Although various technically preferable limits are given, the scope of the present invention is not limited to these modes unless otherwise specified in the following description. The present invention relates to a surface treatment method of a solder bump electrode in the formation of a solder bump electrode such as a solder ball bump, which is applied in the field of manufacturing semiconductor devices and the like.
In particular, by avoiding the occurrence of defects due to probe marks in electrical characteristics inspection and residues and contamination in the wet back process, defective mounting on printed wiring boards and reduced connection resistance, high reliability solder bump electrodes It is a manufacturing method. In the following embodiments, a solder bump will be described as an example of a solder bump electrode. A bump manufacturing method (a method for manufacturing a solder bump electrode) according to a first aspect of the present invention includes a step of polishing (polishing) at least the top of the bump (top) after performing an electrical property test on the solder ball bump. Features. The point of the present invention is to add a polishing step for the bump top, especially the bump top after the inspection of the electrical characteristics of the solder ball bump.
The quality assurance of ordinary solder ball bumps is assured by measuring the electrical characteristics by applying a measuring probe needle for electrical characteristics inspection to the top of the bumps that have been finished into a ball shape through a solder wet back process. The resulting probe marks and deformation of the bumps sometimes cause various defects (lower adhesion, higher connection resistance) during flip chip mounting on a printed wiring board.

In the present invention, a polishing (polishing) process is applied to the solder ball bump after the electrical characteristic test is performed, so that the measurement probe mark formed on the top of the bump at the time of the test is polished and smoothed. Is done. In addition, since the height variation of the solder balls is equalized by the polishing process, the finished bump height can be made uniform within the device chip. As a result, according to the manufacturing process to which the present invention is applied, it is possible to significantly suppress the occurrence of defects when a device chip having solder ball bumps formed thereon is flip-chip mounted on a printed wiring board.

Furthermore, the reliability and durability of a final product device, which is assembled by mounting a number of bump-forming chips manufactured by employing the process of the present invention, is significantly higher than that of a conventional manufacturing process. Can be improved.

A bump manufacturing method according to a second aspect of the present invention is characterized in that after the top of the bump is polished (polished) in the above-described invention, a sputter etching process is performed using at least an inert gas discharge plasma. . The point of the present invention is to stabilize the solder ball bumps with higher reliability by subjecting the wafer after the above-mentioned polishing (polishing) of the bump surface subjected to the electrical characteristic inspection to the plasma processing. It is to form.

[0015] That is, after the apex of the solder ball bump after the probe inspection is polished, sputter etching is further performed by RF discharge plasma using an inert gas such as Ar so that the solder bump exists on the joint surface of the solder bump. By removing the process residue and the natural oxide film to expose the clean bump surface, and also by applying physical ion irradiation to the polyimide film used as the protective film on the outermost surface of the bumped device chip, The surface layer can be made chemically active.

[0016] As a result, the surface of the joint portion of the finished solder bump is cleaned and activated, so that the connection resistance with the printed wiring board after mounting can be further reduced. Further, by activating the surface of the polyimide film, it becomes possible to improve the adhesiveness with the sealing resin after flip-chip mounting. As a result, the electrical characteristics of the device in which the solder ball bumps are formed are further improved, and the reliability and durability of a product set assembled by flip-chip mounting can be significantly improved as compared with the related art. .

A bump manufacturing method according to a third aspect of the present invention is characterized in that after the top of the bump in the preceding aspect of the invention is polished (polished), sputter etching using at least discharge plasma of a reducing gas is performed. . The present invention provides a means for forming a solder ball bump having higher reliability than the above-mentioned invention. Specifically, similarly to the second aspect of the present invention, the wafer after polishing the top of the solder ball bump after the probe test is subjected to the surface treatment by the discharge plasma. Then, a plasma treatment is performed by introducing a reducing gas such as HF into the processing chamber instead of an inert gas.

Thus, in the manufacturing process, sputter etching proceeds while chemically reducing the natural oxide film layer on the surface of the bump formed due to oxygen and moisture taken in the bump. The surface of the bump joint can be more effectively cleaned than the second invention.

Further, the dangling bonds of the polyimide film surface layer used for the passivation of the bump chip are terminated by F atoms (other halogen elements) having a high electronegativity, thereby maintaining a chemically more active state. can do. In this way, the finished solder bump joint surface is more effectively cleaned, so that the connection resistance with the printed wiring board can be further reduced. Further, as the activation of the surface of the polyimide film proceeds, the adhesiveness with the sealing resin at the time of flip chip mounting can be further improved. As a result, the electrical characteristics of the device on which the solder ball bumps are made are significantly improved, and the reliability and durability of the final product set assembled by flip-chip mounting are greater than those of the above-mentioned inventions. Can be improved. Next, the present invention will be described in more detail with reference to the drawings.

[0020]

Embodiment 1 In Embodiment 1, the first invention of the present invention is applied to a process for manufacturing a solder ball bump as a solder bump electrode. This is an example in which the top (preferably, the top) of the solder bump on which the probe mark is formed in the electrical characteristic test is polished. A method for manufacturing a solder ball bump will be described. FIG. 1 shows an example of forming a junction of a flip chip IC. As shown in FIG. 1 (a), the bonding portion of the flip-chip IC is such that an electrode pad 2 of Al or the like is formed on a semiconductor substrate 1 of silicon or the like by using sputter etching or the like, and the surface protective film 3 is entirely covered with polyimide or the like. And then forming an opening on the electrode pad 2. In this way, BLM (Ball Lim
A pattern of a metal multilayer film made of Cr, Cu, and Au, which is called an itting metal film 4, is formed.

As shown in FIG. 1B, on the BLM film 4,
A resist pattern 6 having an opening 5 is formed. Then, as shown in FIG. 1 (c), a solder vapor-deposited film 13 is formed on the entire surface of the wafer 22, and after patterning by registry lift-off as shown in FIG. 1 (d), the solder is melted by heat treatment. As a result, a solder ball bump 14 as shown in FIG. 1E is finally formed on the BLM film 4 so as to be in close electrical contact therewith.

FIG. 2A shows the solder ball bumps 14 and the like shown in FIG. 1E. In the pattern opening of the polyimide film 3 on the Al electrode pad 2 of the semiconductor IC, the BLM film 4 is interposed. Solder ball bumps 14 are formed.
As shown in FIG. 2B, such a solder ball bump 14
Was formed, an electrical characteristic test was performed on the device chip 30 under the following measurement conditions. Measurement probe diameter: 30 μm φ Overdrive amount: 30 μm Heating temperature: 105 ° C. As a result, as shown in FIG. 2C, a probe mark 21 was inevitably formed on the top of the solder ball bump after measurement. .

Next, the wafer in this state was set in a polishing apparatus 50 as shown in FIG. 3, and as an example, the bump tops 14A on the wafer surface were polished under the following conditions. Wafer rotation speed: 40 rpm Table rotation speed: 40 rpm Polishing pressure: 100 g / cm 2 Oscillating speed: 2 mm / sec Slurry supply speed: 30 ml / min Shaving allowance: 30 μm

As a result, as shown in FIG. 2D, the probe mark formed on the top 14A of the solder ball bump 14 was polished and removed, and the bump surface 14B was smoothed. As described above, the product device (see FIG. 4) assembled by flip-chip mounting the semiconductor chip polished after the inspection of the electrical characteristics of the solder ball bump on the printed wiring board is assembled at the bump / Cu land interface. It was confirmed that the electrical bonding characteristics and adhesion strength of the product set were improved, and the reliability and durability of the final product set were significantly improved as compared with the conventional product set. In FIG. 4, the bump surface 14 </ b> B side of the solder bump (also referred to as a solder ball bump) 14 is spherical, and is electrically connected to the Cu land 42 of the glass epoxy substrate 45 via the eutectic solder 41. The surface of the substrate 45 has a solder resist 44
Is formed, and the Si chip and the glass epoxy substrate 45 are electrically insulated by the sealing resin 43.

The polishing apparatus 50 shown in FIG.
A polishing cloth (cloth) 38 is mounted on 6, and a polishing solvent (slurry) 37 is dropped on the polishing cloth 38. The wafer 22 to be processed is a wafer carrier 3
9 is attached with a detachable metal fitting. Wafer carrier 3
9 is rotated by a motor 40 and the wafer 22
Is pressed against the polishing pad 38 by pressure from above. Since the platen 36 is rotated by the motor 40, the wafer 22 of the wafer carrier 39 is
At the same time, the polishing solvent 37 is supplied. As a result, the tops (tops) 14A of the solder bumps on the surface of the wafer 22 are changed from FIG.
Polishing is performed as shown in FIG.
Is polished smoothly to form a smooth bump surface 14B.

This is because the tip 14A of the probe 20 comes into contact with the top 14A of the solder ball bump 14 when an electrical characteristic test is performed as shown in FIG.
Probe mark 2 on top 14A of solder ball bump 14
This is because 1 is formed. In order to remove the probe mark 21 and secure the electrical connection, FIG.
The smooth bump surface 14B is formed by polishing.

Example 2 Example 2 is an application of the second invention of the present application to the same solder ball bump manufacturing process. After polishing (polishing), parallel plate type RF
An example in which a sputter etching process is performed using a discharge plasma of an argon gas using a plasma processing apparatus will be described with reference to FIGS.

The wafer 22 used as a sample in the second embodiment is the same as that in the first embodiment described above.
As shown in FIG. 1A, a solder ball bump 14 is formed in a pattern opening of a surface protection film (polyimide film) 3 on an Al electrode pad 2 of a semiconductor substrate 1 via a BLM (Ball Limiting Metal) film 4. It is a thing. The device chip after the formation of the ball bumps 14 was subjected to an electrical characteristic test as shown in FIG. Measurement probe diameter: 30 μm φ Overdrive amount: 30 μm Heating temperature: 105 ° C. As a result, probe marks are inevitably formed on the top 14A of the solder ball bump 14 after the measurement, as shown in FIG. Was.

Next, the wafer in this state is set in a polishing apparatus 50 as shown in FIG.
Under the following conditions, the bump tops 14A on the wafer surface were polished and polished. Wafer rotation speed: 40 rpm Table rotation speed: 40 rpm Polishing pressure: 100 g / cm 2 Oscillating speed: 2 mm / sec Slurry supply speed: 30 ml / min Cutting allowance: 30 μm As a result, as shown in FIG. The probe mark 21 formed on the top 14A of the 14 was polished and removed, and the bump surface 14B was smoothed.

The wafer (22) in this state was set in the parallel plate type RF plasma processing apparatus 60 shown in FIG. 5, and as an example, sputter etching was performed under the following conditions. Ar = 25 sccm, pressure 1.0 Pa, wafer stage room temperature, RF applied power: 300 W (13.56 MHz), time 30 seconds As a result, the process residue present on the joint surface of the solder bump 14 due to the sputtering action of Ar plus ions. And the natural oxide film is effectively removed, the clean bump surface 14B is exposed, and the surface of the surface protection film (polyimide film) 3, which is the surface protection film of the bumped device chip, receives ion impact energy. Chemically activated.

As the above-mentioned parallel plate type RF plasma processing apparatus 60, one having a structure as shown in FIG. 5 can be used. In the plasma processing chamber 34, a stage 23 (cathode plate) and an anode plate 24 are arranged at an interval. A wafer 22 which is a substrate to be processed is mounted on the stage 23. Stage 2
3 is electrically connected to a high frequency power supply 26 via a coupling capacitor 25. The anode plate 24 is grounded. As a result, when a high-frequency voltage is applied from the high-frequency power supply 26, the plasma 2 is generated between the stage 23 and the anode plate 24.
7, the wafer 22 in the plasma processing chamber is
As described above, the process residue and the natural oxide film present on the surface of the joint of the solder bump 14 are effectively removed by the sputtering action of the Ar plus ion as described above, so that the clean bump surface 14B is exposed and the device with the bump is removed. The surface of the polyimide film 3, which is a surface protection film of the chip, can be chemically activated by receiving ion impact energy.

As described above, after inspecting the electrical characteristics of the solder ball bumps, a semiconductor device subjected to polishing and sputter etching is flip-chip mounted on a printed wiring board to assemble a product device (FIG. 4).
Means that the electrical bonding characteristics and adhesion strength at the bump / Cu land interface are further improved, and the reliability and durability of the final product set are significantly improved compared to the previous example, compared to the previous example It was confirmed that it would be.

Embodiment 3 In this embodiment, the third invention is applied to the same solder ball bump manufacturing process. Polishing (polishing) is performed on the top of the solder bump on which a probe mark has been formed in an electrical characteristic test. 2) Examples of performing sputter etching with a mixed gas of HF and Ar using the triode RF plasma processing apparatus 70 of FIG.
This will be described with reference to FIG. The wafer used as a sample in the third embodiment is the same as that in the above-described embodiments. As shown in FIG. 2A, the wafer is used in the pattern opening of the polyimide film 3 on the Al electrode pad 2 of the semiconductor substrate 1. , A solder ball bump 14 is formed via a BLM (Ball Limiting Metal) film 4.

The device chip after the formation of the ball bumps was subjected to an electrical characteristic test in the same manner as in the previous embodiments. As a result, as shown in FIG. Probe marks 21 were inevitably formed on the top 14A. Further, the surface of the wafer in this state was polished and polished in the same manner as in Example 1 described above, and as a result, as shown in FIG.
The probe mark 21 formed on the top 14A was removed by polishing, and the bump surface 14B was smoothed. The wafer 22 in this state was set in the triode type RF plasma processing apparatus 70 in FIG. 6, and sputter etching was performed under the following conditions as an example. HF / Ar = 10/20 sccm, pressure 1.0 Pa, wafer stage room temperature, plasma source power 700 W (2 MHz), substrate bias voltage 350 V (13.56 MHz), time 30 seconds

In this plasma treatment, a natural oxide film and organic residues on the bump surface are more effectively removed with a chemical reaction by a reducing action by HF in addition to a sputtering action of Ar plus ions, and a cleaner solder is obtained. The bump surface was exposed. Furthermore, in the present embodiment, the dangling bonds on the surface layer of the polyimide film 3, which is the surface protection film of the bump chip, are terminated by F atoms having a high electronegativity and become chemically more active.

The above-described triode type RF plasma processing apparatus 70 can adopt a structure as shown in FIG. In the plasma processing chamber 134, an anode plate 124 and a stage (cathode plate) 123 are accommodated, and a grid electrode 118 is also incorporated. The grid electrode 118 is grounded, and the anode plate 124 is connected to a plasma power supply 128 via a coupling capacitor 140. The stage 123 is connected to a substrate bias power supply 126 via a coupling capacitor 125. The wafer 22 as a substrate to be processed is mounted on the stage 123. As a result, a plasma 27 is formed between the anode plate 124 and the grid electrode 118, and the natural oxide film and the organic residue on the solder ball bump surface are chemically reacted by the HF reducing action in addition to the Ar plus ion sputtering action. However, the solder bumps are more effectively removed, and a cleaner solder bump surface can be exposed.

As described above, after the electrical characteristics of the solder ball bumps have been inspected, the semiconductor chip subjected to polishing and sputter etching is flip-chip mounted on a printed wiring board to assemble a product device (FIG. 4).
Means that the electrical bonding characteristics and adhesion strength at the bump / Cu land interface are further improved, and the reliability and durability of the final product set are significantly greater than those of the prior art, compared to the previous examples. It was confirmed to be improved.

Although the present invention has been described on the basis of three types of Examples 1 to 3, the present invention is not limited to these Examples at all, and the gist of the invention such as a sample structure, a process apparatus, and process conditions is described. Needless to say, it can be selected as appropriate without departing from the scope. For example, in this embodiment, an example is shown in which HF is used as the reducing gas in this embodiment, but other than that, hydrogen, HCl, and the like can also be used. Among them, in the case of a liquid source such as HF or HCL, the liquid source is introduced into the process chamber by a method such as bubbling with a carrier gas such as He, heating and vaporization, and ultrasonic vaporization.

The measurement probe marks formed on the tops of the bumps are polished and smoothed, so that the finished bump heights are uniform in the device chip, and mounting defects can be reduced. Further, by cleaning and activating the surface of the bump joint, the connection resistance can be reduced, the connection strength can be improved, and the reliability can be improved. By employing the present invention, a polishing (polishing) process is applied to the solder ball bump after the electrical property test is performed, so that the measurement probe mark formed on the top of the bump at the time of the test is polished and smoothed. You.
In addition, since the height variation of the solder balls is equalized by the polishing process, the finished bump height can be made uniform within the device chip. Furthermore, the sputter etching process effectively removes a natural oxide film and process residues formed on the surface of the bump joint to expose a clean bump surface, and a polyimide film used as a surface protection film for a device chip with bumps. The surface layer can be made chemically active.

As a result, according to the manufacturing process to which the present invention is applied, it is possible to significantly suppress a failure when flip-chip mounting a device chip having a liquid property of a solder ball bump on a printed wiring board. The reliability and durability of the final product device assembled by flip-chip mounting the chip can be greatly improved as compared with those of the conventional manufacturing process.

Therefore, the present invention is designed based on a fine design rule and is extremely effective for manufacturing a semiconductor device which requires high integration, high performance and high reliability.

[0042]

According to the present invention, the mounting defects can be reduced by making the heights of the solder bump electrodes uniform, and the electrical connection resistance is reduced and the connection strength is improved.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view showing an example of a manufacturing process of a solder ball bump used in the present invention in the order of steps. (A)
A state in which a BLM (Ball Limiting Metal) film serving as a base of a solder ball bump is patterned on the Al electrode pad of the LSI, and FIG. 2B shows a state in which a thick resist pattern for patterning the solder vapor deposition film by lift-off is formed. (C) is a state where a solder vapor deposition film is formed on the entire surface of the wafer, (d) is a state where an unnecessary solder vapor deposition film is removed by lift-off of a thick resist pattern, and (e) is a wet state. The state in which the solder is melted by the heat treatment in the back step and the ball bump is formed is shown.

FIG. 2 is a schematic cross-sectional view showing an example of a manufacturing process of a solder ball bump to which the invention of the present application is applied in the order of steps. (A)
Shows a state in which solder ball bumps have been formed through a wet back process, (b) shows a state in which a measurement probe is applied to the top of the solder ball bump, and (c) shows an electrical characteristic. The state of the solder ball bump where the probe mark was formed after the inspection. (D) shows the solder ball bump where the probe mark was removed and the surface was smoothed by applying the polishing treatment of the present invention to the bump top. , Respectively.

FIG. 3 is a schematic view of a polish polishing apparatus used for surface treatment of a bumped wafer after an electrical characteristic test, to which the present invention is applied.

FIG. 4 is a schematic sectional view showing a state after flip-chip mounting the bump forming chip on a printed wiring board.

FIG. 5 is a schematic sectional view of a parallel plate type RF plasma processing apparatus used for surface treatment of a solder bump to which the present invention is applied.

FIG. 6 is a schematic sectional view of a triode type RF plasma processing apparatus used for surface treatment of a solder bump to which the present invention is applied.

FIG. 7 is a view showing an example of a manufacturing process of a commonly used solder ball bump.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate (IC), 2 ... Al electrode pad, 3 ... Surface protective film (polyimide film), 4 ... B
LM (Ball Limiting Metal) film, 5 ... opening, 6
... (photo) resist film, 13 ... solder deposited film, 14A ... top (top), 14 ... (solder bump electrode) solder ball bump, 118 ... lattice electrode, 20 ...・ Probe, 21 ・ ・ ・ Probe mark, 22
... substrate to be processed (wafer), 123 ... wafer stage (cathode plate), 124 ... anode plate, 125 ... coupling capacitor, 126 ... substrate bias power supply, 127
... discharge plasma, 128 ... plasma power supply, 13
4 Plasma processing chamber, 36 Surface plate, 37
Polishing solvent, 38: polishing cloth, 39: wafer carrier, 41: eutectic solder, 42: Cu land, 4
3 sealing resin, 44 solder resist, 45
... Glass epoxy substrate, 50 ... Polishing device, 60 ... RF plasma processing device, 70 ... RF
Plasma processing equipment

Claims (5)

[Claims] 1. A method for manufacturing a solder bump electrode, comprising: performing an electrical property test by contacting the solder bump electrode; and polishing at least a top portion of the solder bump electrode. 2. A sputter etching process using at least an inert gas discharge plasma after polishing at least the top portion of the solder bump electrode.
3. The method for producing a solder bump electrode according to claim 1. 3. A sputter etching process using at least a discharge plasma of a reducing gas after polishing at least the top portion of the solder bump electrode.
3. The method for producing a solder bump electrode according to claim 1. 4. The method according to claim 2, wherein the solder bump electrode is formed on an electronic device chip. 5. The method according to claim 3, wherein the solder bump electrode is formed on an electronic device chip.