JP2000049431A - Ceramic circuit board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a ceramic circuit board for improving solder wettability for surface wiring, reducing degradation in reliability of conductor adhesion strength, and reducing a base body bend even at the time of forming the surface layer wiring of an Ag-based material on a base body composed of a glass- ceramic material. SOLUTION: This board is constituted by forming plural dielectric materials composed of a glass component and a ceramic component on the base body 1 by the simultaneous calcination of the Ag-based surface layer wiring 2 and the base body 1. In this case, the surface layer wiring 2 contains 0.2-1.0 wt.% of V2O5 and 0.1-1.5 wt.% of MoO3 to the Ag-based conductor material 100 wt.%.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate made of glass-ceramic material or a multi-layered substrate in which a dielectric layer made of glass-ceramic material and a conductor film serving as internal wiring are laminated on a substrate serving as surface wiring. And a ceramic circuit board obtained by integrally sintering.

[0002]

2. Description of the Related Art A substrate material of a ceramic circuit board obtained by integrally firing a surface wiring of Ag or a conductor material containing Ag as a main component (hereinafter referred to as an Ag-based conductor material) with a substrate has a melting point of the Ag-based surface wiring. Considering this, for example, the insulator is composed of an inorganic filler component such as alumina and a glass component, and the firing temperature of the base is 800 to 1000 ° C.

It is known to add Bi ₂ O ₃ or a lead-based glass component in order to improve the adhesive strength between the surface wiring and the substrate.

Further, when a conductor to be a surface wiring is integrally sintered on a base made of a glass-ceramic material,
The characteristics required for the surface wiring include (1) good wettability with solder, (2) high adhesive strength, and (3) no warpage of the base.

[0005] For this reason, the applicant of the present invention has previously proposed that at least V ₂ O ₅ be added to the surface wiring in an Ag-based conductor material in the range of 0.2 to 0.2.
It was proposed to print and dry a conductive paste containing 1.0 wt% and further comprising an organic vehicle component to form a conductive paste.

At this time, the initial strength of the surface wiring is 1.5 k.
gf / 2mm □ or more, the adhesive strength after a high temperature (150 ° C) aging test or a temperature cycle (-40 ° C to 125 ° C, 30 minutes each) test becomes 1kgf / 2mm □ or more.
Solder wettability is also good.

[0007]

However, when a conductor film serving as a surface wiring is formed on the above-described base with a large area of 10 mm □ or more, the difference in shrinkage behavior between the conductor and the substrate becomes remarkable, and the substrate is warped. There was a problem that it was easy.

The present invention has been devised in view of the above-described problems, and has as its object to form a surface wiring of an Ag-based material on a substrate made of a glass-ceramic material. An object of the present invention is to provide a ceramic circuit board which has good solder wettability, has little deterioration in the reliability of the conductor bonding strength, and does not cause substrate warpage.

[0009]

According to the present invention, there is provided a ceramic circuit board comprising a substrate made of a glass component and a ceramic component, and a surface wiring formed on the substrate, wherein the surface wiring is made of Ag or Ag. Conductive material 100w as main component
relative t%, a ceramic circuit board, characterized in that which is formed by containing V ₂ O ₅ and MoO ₃ in 0.1～1.5Wt% of 0.2~1.0wt%.

V ₂ O ₅ added to the above-mentioned Ag-based conductor material
Is to increase the adhesive strength between the substrate and the surface wiring,
For example, if V ₂ O ₅ is less than 0.2 wt%, there is no effect of improving the adhesive strength, and if it exceeds 1.0 wt%, the additive V ₂ O ₅ becomes excessive and the solder wettability of the surface wiring deteriorates. I do.

Further, MoO ₃ added to an Ag-based conductor material
Mainly approximates the shrinkage behavior between the surface wiring and the base. For example, when MoO ₃ is less than 0.2 wt%, A
The effect of suppressing the sintering of the g powder is small, and as a result, the warpage of the base that is convexly curved toward the surface wiring layer is increased. Also, M
When oO ₃ is 1.5 wt% or more, the effect of suppressing sintering to the Ag powder is large, and conversely, the warpage of the base increases toward the base.

[0012]

As described above, the glass serving as the substrate (laminated body)
A metal paste forming a conductor film made of silver or a silver alloy, which becomes a surface wiring which is fired integrally with a ceramic material, contains V ₂ O ₅ in an amount of 0.2 to 1 wt% (relative to the metal powder) to the substrate side. The glass component is sucked up to the conductor side by a capillary phenomenon in the firing process to promote crystallization, thereby improving the adhesive strength between the substrate and the surface wiring.

Further, by adding MoO ₃ , the start of sintering of the surface wiring can be suppressed, the warpage of the base can be reduced, and the deterioration of the adhesive strength between the base and the surface wiring can be suppressed.

Therefore, even if the substrate has a surface wiring pattern of 10 mm square or more, the ceramic circuit substrate has a small warpage even if the surface wiring after firing has good solder wettability and high reliability of adhesive strength.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. FIG. 1 is a sectional view of a ceramic circuit board having a multilayer structure according to the present invention.

In FIG. 1, 10 is a ceramic circuit board, 1a to 1d are dielectric layers made of a glass-ceramic material, which can be fired at a low temperature, 3 is an internal wiring, 4 is a via-hole conductor, 1 is the dielectric layer 1
a to 1d and the internal wiring 3 are laminated to each other and have a via-hole conductor 4 (hereinafter, referred to as a base). Reference numeral 2 denotes a surface wiring 2 formed on the surface of the base 1. The electronic component 5 may be provided on the surface wiring 2 via solder 6 as necessary.
Is installed.

The base 1 is composed of, for example, four layers of glass-ceramic materials and dielectric layers 1a to 1d, between which an internal wiring 3 for a predetermined circuit is arranged.

Each of the dielectric layers 1a to 1d is connected to the internal wiring 3 in the thickness direction thereof.
A via-hole conductor 4 for connecting to the surface wiring 2 is formed.

The above-mentioned dielectric layers 1a to 1d are composed of a ceramic material as an inorganic filler and a crystallized glass component.

Examples of the ceramic material include cristobalite, quartz, corundum (α-alumina), mullite, zirconia, cordierite, and the like, and include one or more types. The average particle size of this ceramic material is 1.0-6.0μ.
m is preferred.

[0021] The crystallized glass material is a glass frit containing a plurality of metal oxides, and when fired at 800 to 1000 ° C, cordierite, mullite, anorthite,
Those that precipitate at least one type of crystal of Celsian, spinel, garnite, willemite, dolomite, petalite, osmillite and substituted derivatives thereof,
The average particle size of the crystallized glass material is 1.0 to 5.0 μm.
m is preferred.

The composition ratio between the ceramic material and the glass material is 10 wt% to 60 wt%, preferably 30 wt% to 50 wt%, and 90 wt% for the glass material.
wt% to 40 wt%, preferably 70 wt% to 50 w
t%.

Here, if the ceramic material content is less than 10 wt% and the glass material content is 90 wt% or more, the glass quality of the insulating layer is excessively increased, which is inappropriate due to the strength of the insulating layer. If the content exceeds 60 wt% and the glass material content is less than 40 wt%, the compactness of the substrate after firing is impaired.

The thickness of the dielectric layers 1a to 1e is, for example, about 100 to 300 μm.

The internal wiring 3 is made of an Ag-based material (Ag alone, an Ag alloy containing Ag as a main component, for example, Ag-Pd, Ag-Pt
Etc.) It consists of a conductor film whose main component is a conductor, and the internal wiring 3
Has a thickness of about 8 to 15 μm. This internal wiring 3
It forms a predetermined circuit network, or serves as a capacitor electrode forming a capacitance component and an inductor conductor forming an inductor component.

The via-hole conductor 4 is made of an Ag-based material (Ag alone,
Ag alloy containing Ag as a main component, for example, Ag-Pd, Ag
-Pt) as a main component, and the diameter of the via-hole conductor 4 can be an arbitrary value. The via-hole conductor 4 includes an Ag-based material, β-quartz, and a predetermined oxide.

The surface wiring 2 is made of an Ag-based material (Ag alone, an Ag alloy containing Ag as a main component, for example, Ag-Pd, Ag-Pt).
Etc.) A conductor material as a main component, and 0.2 to 1.0 wt% of V _{2 with} respect to 100 wt% of an Ag-based conductor material.
And a is composed of a conductive film containing O ₅ and MoO ₃ in 0.1~1.5wt%. This surface wiring 2 is made of glass-
It is formed by co-firing with the substrate 1 made of a ceramic material. The surface wiring 2 mainly forms a predetermined circuit wiring on the surface of the base 1, serves as a connection pad for the electronic component 5 joined via the solder 6, and also serves as a thick-film resistive film, a thick-film It becomes a terminal electrode of the capacitor element and is connected to the internal wiring 3 via the via-hole conductor 4 exposed from the dielectric layer 1a.

The electronic component 6 can be exemplified by a chip-shaped electronic component such as a multilayer ceramic capacitor or a chip resistor, an oscillator, a transistor, or the like, and is connected to the surface wiring 2 via solder.

A method for manufacturing the above-described circuit board will be described.

First, the glass which becomes the dielectric layers 1a to 1d
Make a ceramic green sheet. For example, the green sheet is, for example, SiO ₂ —Al ₂ O ₃ —B ₂ O
A glass powder such as _3- ZnO-MgO-PbO, an inorganic filler such as alumina ceramic powder, an organic binder such as alkyl methacrylate, a plasticizer such as DBP, and an organic solvent such as toluene are mixed. The mixture is kneaded with a ball mill for 48 hours to prepare a slurry. The mixing ratio of the ceramic powder and the glass powder to be crystallized glass was 45 wt% for the ceramic powder and 55 wt% for the glass powder. Then, the slurry is tape-formed by a doctor blade method or the like, and cut into a predetermined size to form a green sheet.

Next, a through-hole in which a via-hole conductor 4 for connecting the internal wirings 3 and connecting the internal wiring 3 and the surface wiring 2 is formed is punched at a predetermined position of each green sheet by punching or the like. Drill.

Next, the conductor to be the via-hole conductor 4 is filled in the above-mentioned through hole with the conductive paste for the via-hole conductor, and the conductor film to be the internal wiring 3 is printed and formed in a predetermined shape with the conductive paste for the internal wiring. I do.

The conductive paste that becomes the internal wiring 3 is as follows.
For example, a predetermined amount of metal powder such as Ag powder, if necessary, for example, a predetermined amount of borosilicate low-melting glass, and an organic binder such as ethyl cellulose.
An organic solvent, such as 2.4-trimethyl-1.3-pentadiol monoisobutyrate, is mixed and kneaded with a three-roll mill, and the conductive paste to be the via-hole conductor 4 is, for example, a predetermined amount of Ag. Metal powder such as powder, β-quartz glass, and if necessary, for example, a predetermined amount of a low-melting borosilicate glass, an organic binder such as ethyl cellulose, and 2.2.4-trimethyl-1.3-pentane, for example. Mix an organic solvent such as diol monoisobutyrate,
It is made by kneading with a three-roll mill.

Specifically, a conductive material is printed and filled into the through holes of the green sheets to be the dielectric layers 1a to 1d using a conductive paste for via-hole conductors. Then, the inner wiring 3 having a predetermined shape is formed on one main surface of the green sheet to be the dielectric layers 1b to 1d by using a conductive paste for the inner wiring.
A conductive film to be formed is formed by printing.

Next, a conductive film to be the surface wiring 2 is formed on one main surface of the green sheet to be the dielectric layer 1a by printing a conductive paste for the surface wiring.

Here, the conductive paste for surface wiring is, for example, a predetermined amount of Ag powder, Pt powder, V ₂ O ₅ powder,
oO ₃ powder, an organic binder such as ethyl cellulose, and an organic solvent such as 2.2.4-trimethyl-1.3-pentadiol monoisobutyrate are mixed,
It is made by kneading with a three-roll mill.

The V ₂ O ₅ powder is composed of an Ag-based metal component (A
g powder and Pt powder)
It is added at a ratio of 1.0 wt%. The MoO ₃ powder is also added at a ratio of 0.1 to 1.5 wt%.

The green sheets obtained in this manner are laminated according to the lamination order of the substrates 1 to form the unfired substrate 1 and then integrally fired. Specifically, the baking treatment includes a binder removal process up to around 600 ° C. in the temperature raising process and a baking process up to 950 ° C.
The binder removal process is generally performed at a temperature range of 600 ° C. or less.
This is a process of burning off organic components contained in the base 1, the internal wiring 3, the via-hole conductor 4, the surface wiring 2, and the like. In addition, the baking process is performed in an air atmosphere or a neutral atmosphere at a peak temperature of 800 to 1000 ° C., for example, 950 ° C. for 30 minutes. In this process, in the base 1, the glass component is arranged in the state of crystallized glass at the grain boundary of the ceramic powder, and the internal wiring 3, the via-hole conductor 4, and the surface wiring 2 have low resistance due to the growth of the Ag component. And a strong bond with the substrate 1 is achieved.

Thereafter, the fired laminated body 1 is baked with a thick-film resistive film connected to the surface wiring 2 or covered with an insulating protective film, if necessary. 5 is joined by solder 6.

More specifically, cream-like solder 6 is applied on the surface wiring 2 on which the electronic components 5 are mounted, and various electronic components 5 are mounted. Thus, the electronic component 5 is temporarily held by the creamy solder 6.

In this state, the solder is put into a reflow furnace for performing a heat treatment at about 230 ° C., the creamy solder is melted, gradually cooled and hardened, and the solder 6 is joined to complete the ceramic circuit board.

While repeatedly applying and printing a slurry containing a glass-ceramic material and a conductive paste serving as an internal wiring, a multi-layered unfired substrate is formed, and the unfired substrate is formed on the unfired substrate. Alternatively, a conductor film to be a via-hole conductor and a surface wiring may be formed (printed multilayer method).

A back surface side surface wiring may be formed on the other main surface of the green sheet of the dielectric layer on the back surface side, and after the green sheet is integrated, a conductor serving as the back surface side surface wiring may be formed. A film may be formed.

Further, the above-mentioned green sheet is sized so that a plurality of ceramic circuit boards can be extracted. After laminating and pressing, a dividing groove is formed, a predetermined process is performed, and after the electronic component 5 is mounted, the dividing groove is formed. The division processing may be performed along.

A photocurable monomer is added to a slurry containing a glass-ceramic material, and a green sheet or a coated and printed coating film is selectively exposed and developed to form a through-hole which becomes a via-hole conductor. A hole may be formed.

Thereafter, as necessary, a thick film resistor is formed by printing, drying, and baking a resist paste, or a protective film is formed by using an insulating paste.

Finally, electronic components are joined to the surface wiring by reflow soldering or the like.

[0048]

EXPERIMENTAL EXAMPLE The present inventor used a glass-ceramic material obtained by mixing at least crystallized glass powder capable of precipitating anorthite and alumina powder having an average particle size of about 2.0 μm. Acrylic resin 10%, toluene 40%, and DBP 10% were kneaded by a ball mill with respect to the solid components of the alumina and the alumina powder in a weight ratio, and a green sheet having a thickness of 200 μm was formed with a doctor blade.

Next, a conductive film is formed on the four green sheets by screen printing using a conductive paste for internal wiring, and a conductive paste for surface wiring is formed on the green sheet as the uppermost layer. A conductive film was formed by printing using a screen printing method, and the five films were stacked and heated and pressed, and then fired at 950 ° C.

After the substrate was immersed in a rosin-based flux solution, the substrate was immersed in a 2% Ag-containing Sn-Pb eutectic solder bath at 230 ° C. to evaluate solder wettability. As the evaluation of solder wettability, the case where 90% or more of the surface area of the surface wiring was wet was evaluated as “excellent”, and the case where it was less than that was evaluated as “poor”. Adhesion strength is as follows: tin-plated copper wire of 0.6mmφ is soldered on 2mm □ pad, and the initial method is 50 ° C at 150 ° C by peeling method.
After leaving for 0 hour (in Table 1, denoted as heat aging), a temperature cycle (-40 to 125 ° C., 30 minutes each) test 100
It was measured after the cycle (referred to as thermal cycle in Table 1).
As an evaluation, at least 1.0 kg / 2 mm square was regarded as a good product in both the initial stage, thermal aging and thermal cycle. In addition, "cannot be measured" means that the solderability of the surface wiring was inferior, and the tensile strength test using a tin-plated copper wire could not be performed.

The size after firing was 5 mm □ and 10 m
An m □ surface wiring was formed, and the state of warpage was measured. For evaluation, less than 0.1 mm was regarded as a good product.

As a conductive paste for a surface wiring, an Ag powder having an average particle diameter of 3 μm in 100 wt% of a metal component was mixed with 9 parts by weight.
9 wt%, 1 wt% of Pt powder having an average particle size of 0.5 μm, and a predetermined amount of V ₂ O ₅ and a predetermined amount of MoO shown in Table 1 with respect to 100 wt% of a metal component as an additive.
₃ , SiO ₂ , low melting point glass, etc. were added, ethyl cellulose and pentanediol monoisobutyrate were added in appropriate amounts, and kneaded with a three-roll mill to prepare a paste.

Table 1 shows the results.

[0054]

[Table 1]

In Table 1, Sample Nos. 1 to 5 correspond to V ₂ O
_{As 5} , the results were summarized by adding 0 to 1.5 wt%. In either case, the size of the surface wiring 2 is increased, for example, 1
A warp of the substrate 1 of 1.0 mm or more at 0 mm □ occurs.

When V ₂ O ₅ exceeds 1.0 wt% with respect to the metal component mainly composed of Ag, V ₂ O ₅ precipitates on the surface of the surface wiring and the solder wettability deteriorates. As a result, even the subsequent test of the adhesive strength cannot be performed. This means
The same applies to sample numbers 8 and 11.

Sample Nos. 6 to 8 have V ₂ O ₅ of 0.2,
1.0 and 1.5 wt% were added, and MoO ₃ was further added to A
The content was 0.2 wt% with respect to the metal component containing g as a main component.

Sample Nos. 9 to 11 were prepared by adding 0.2, 1.0, and 1.5 wt% of V ₂ O ₅ and further adding Mo.
O ₃ is 1.5w with respect to a metal component containing Ag as a main component.
t%. As a result, the warpage of the base 1 due to the enlargement of the surface wiring 2 can be greatly improved.

In the sample No. 12, V ₂ O ₅ was 0.2
was added wt%, further, it was MoO ₃ and 2.0 wt%. As a result, even if V ₂ O ₅ is 0.2 wt%, M
The total amount ratio with oO ₃ increases, and V
₂ O ₅ and / or MoO ₃ are precipitated, and the solder wettability deteriorates.

[0060] Moreover, Sample No. 13, the SiO ₂ was added 0.5 wt% in place of V ₂ O _5, Sample No. 14, V ₂
1.0 wt% of low melting point glass was added instead of O ₅ . In this case, the adhesive strength after thermal aging and thermal cycling is significantly lower than that of V ₂ O _5.
gf / 2 mm □ or more cannot be obtained. In addition, the warpage of the base 1 cannot be reduced to less than 10 mm with the enlargement of the surface wiring 2.

In the above-described embodiment, the substrate is the substrate 1 composed of the plurality of dielectric layers 1a to 1d composed of a plurality of glass-ceramics. It may be fired integrally.

[0062]

According to the present invention, the surface wiring conductor obtained by firing integrally with the substrate has good solder wettability and high reliability of the adhesive strength. A ceramic circuit board without warpage is obtained.

[Brief description of the drawings]

FIG. 1 is a sectional view of a ceramic circuit board according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Base (laminated body) 1a-1d ... Dielectric layer 2 ... Surface wiring 3 ... Internal wiring 4 ... Via-hole conductor 5 ... Electronic components 6 ····· Solder

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4E351 AA07 BB31 CC12 DD05 DD20 EE02 EE08 EE10 GG02 GG15 5E346 AA54 CC18 DD13 DD45 EE23 FF01 FF18 GG04 GG05 GG06 GG08 GG09 GG25 HH11 HH40

Claims (1)

[Claims] 1. A ceramic circuit board comprising a substrate made of a glass component and a ceramic component, on which a surface layer wiring is adhered and formed, wherein the surface layer wiring is made of Ag or a conductive material containing Ag as a main component at 100 wt%. To 0.2 to 1.0 wt% V
A ceramic circuit board formed by containing ₂ O ₅ and 0.1 to 1.5 wt% of MoO ₃ .