JP2000022339A - Manufacture of multilayer printed wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent exfoliation of a conductor circuit and interlayer insulating resin, by a method wherein after a roughened layer of a conductor circuit is formed, fluid like water is sprayed against the roughened layer and a roughened surface, and remaining foreign matters are physically eliminated. SOLUTION: A roughened layer 42 of copper - nickel - phosphorus alloy is formed on a conductor circuit 34 surface of a core board 30 and a land surface of a through hole 36. In another case, a roughened layer 42 is formed on the conductor circuit 34 by blackening - reducing treatment and etching treatment using sulfuric acid and hydrogen peroxide. After the roughened layer 42 is formed, rinsing is performed and middle pressure rinsing with 1-5 kgf/cm2 is performed, thereby eliminating dust. After that, hydro-extraction drying is performed, and physical elimination of left foreign matters is made possible. As a result, exfoliation of the conductor circuit 34 and interlayer insulating resin 50 can be prevented, and cracks of a solder resist layer can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed wiring board, and more particularly to a method for manufacturing a multilayer printed wiring board in which a roughened layer is provided on a surface of a conductive circuit formed on a substrate and then a resin layer is formed. It is.

[0002]

2. Description of the Related Art When a resin layer (interlayer resin insulation layer, solder resist layer) is formed on the upper surface of a metal conductive circuit formed on a substrate, a build-up multilayer wiring board enhances the adhesion between the two. Therefore, the surface of the conductor circuit is roughened. This surface roughening is disclosed, for example, in JP-A-9-130050.

In such a manufacturing method, a roughened layer is deposited on the surface of a conductor circuit of a build-up multilayer wiring board by electroless plating, or the roughened layer is formed on the surface by etching to form a roughened layer on the surface. Roughens. Thereafter, an interlayer insulating resin is applied, exposed, and developed to form a via hole opening for interlayer conduction, and UV curing,
After the main curing, an interlayer insulating layer is formed. Furthermore, roughening treatment is applied to the interlayer insulating layer, a catalyst such as palladium is applied to the roughened surface, a thin electroless plating film is formed, a pattern is formed on the film with a dry film, and the film is thickened by electrolytic plating. After that, it is peeled off with an alkali and etched to form a conductor circuit. By repeating this, a build-up multilayer wiring board is obtained.

As a method of roughening a conductor circuit of this build-up multilayer wiring board, Cu-N
A roughened layer composed of iP is deposited by electroless plating, or a roughened layer is formed on the surface by an etching process such as a blackening-reducing process. There is a method in which an Sn layer is formed on the roughened layer by Sn plating to ensure adhesion between the conductor circuit and the interlayer insulating resin layer. This method is also used for forming a solder resist layer (note that when a solder resist layer is used, an Sn layer is not formed).

[0005]

However, even if the roughened layer is provided on the surface of the conductor circuit as described above, after the main curing of the interlayer insulating resin or the drying after the electroless plating,
The peeling of the interlayer insulating resin layer from the roughened layer of the conductor circuit could not be completely prevented. Further, there is a problem that cracks occur in the solder resist layer in the reliability test.

Here, the peeling of the interlayer insulating resin layer causes a short circuit between the layers and a disconnection of the pattern on the interlayer insulating layer. Further, cracks in the solder resist layer that protects the outermost wiring may cause a reduction in the reliability of the wiring.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to prevent peeling between a conductor circuit and an interlayer insulating resin and to prevent cracks in a solder resist layer. It is an object of the present invention to propose a method of manufacturing a multilayer printed wiring board that can improve reliability.

[0008]

The inventor of the present invention has found that the cause of the above-mentioned problem is that foreign matter of about 0.5 μm remains on the surface of the roughened layer of the conductor circuit or on the roughened surface. I got the knowledge that there is. That is, formed on the surface of the conductor circuit,
The surface of a roughened layer of an alloy composed of Cu-Ni-P, or
Foreign matter of about 0.5 μm remains on the roughened surface, the foreign matter serves as a starting point, peeling from the interlayer insulating resin layer occurs, and
In the reliability test, it was found that the cause was to cause cracks in the solder resist layer.

According to the present invention, based on the above-mentioned knowledge, after forming a roughened layer of a conductor circuit, without draining and drying, a fluid such as water is wiped on the roughened layer and the roughened surface to physically remove the remaining foreign matter. By performing the removal, the above-mentioned problem can be solved.

The fluid that can be used is not limited to water, but may be an organic solvent (for example, acetone), air, nitrogen gas, carbon dioxide gas, or the like. When a volatile organic solvent is used, there is an advantage that drying by heating is unnecessary unlike water. Air has the advantage of being inexpensive, and nitrogen gas and carbon dioxide are chemically stable and have the advantage of not altering the surface of the multilayer printed wiring board.

Here, an appropriate range of the spray pressure for washing the roughened layer with water is 1 to 5 kgf / cm ² . The reason is that when the spray pressure is lower than the range, it is difficult to completely remove the foreign substances, and when the spray pressure is higher than the range, the needle-shaped alloy is chipped or broken, and the upper interlayer This is because the adhesion to the resin insulating layer and the solder resist layer is reduced.

Conventionally, after formation of a roughened layer, an interlayer insulating resin has been applied through draining and drying. Here, when draining and drying are performed, foreign matter of about 0.5 μm attached to the roughened layer and the roughened surface is also dried and fixed, and the adhesion between the foreign matter and the surface increases. For this reason, it is difficult to remove foreign matter even if the medium pressure washing is performed after the draining and drying. Therefore, it is desirable not to perform draining and drying before washing with medium pressure in order to ensure removal.

[0013]

Embodiments of the present invention will be described below. In the present embodiment, it is desirable to form an adhesive layer for electroless plating as an insulating layer or an interlayer insulating resin layer on a substrate, and to provide a wiring pattern on the adhesive layer for electroless plating. The most suitable adhesive for electroless plating is one in which heat-resistant resin particles soluble in a cured acid or oxidizing agent are dispersed in an uncured heat-resistant resin hardly soluble in an acid or oxidizing agent. is there. The conductive resin particles are dissolved and removed, and a roughened surface composed of an octopus pot-shaped anchor can be formed on the surface.

In the above-mentioned adhesive for electroless plating, the heat-resistant resin particles which have been particularly hardened include a heat-resistant resin powder having an average particle diameter of 10 μm or less, and an average particle diameter of 2 μm.
agglomerated particles obtained by aggregating a heat-resistant resin powder having a particle diameter of 2 m or less, and a heat-resistant resin powder having an average particle diameter of 2 to 10 μm and an average particle diameter of 2 μm
m and a mixture with a heat-resistant resin powder having a mean particle size of 2 or less.
Pseudo particles obtained by adhering at least one of a heat-resistant resin powder or an inorganic powder having an average particle size of 2 μm or less to the surface of a 10 μm heat-resistant resin powder, and an average particle size of 0.1 μm.
~ 0.8μm heat resistant resin powder and average particle size 0.8μm
It is desirable to use a mixture with a heat-resistant resin powder having an average particle diameter of 0.1 to 1.0 μm. This is because they can form more complex anchors.

The search for the roughened surface is as follows: Rmax = 0.01 to 2
0 μm is preferred. This is to ensure adhesion. Particularly, in the semi-additive method, the thickness is preferably 0.1 to 5 μm. This is because the electroless plating film can be removed while ensuring adhesion.

The heat-resistant resin hardly soluble in an acid or an oxidizing agent is selected from a “resin composite composed of a thermosetting resin and a thermoplastic resin” or a “resin composite composed of a photosensitive resin and a thermoplastic resin”. It is desirable to become. This is because the former has high heat resistance, and the latter can form an opening for a via hole by photolithography.

As the thermosetting resin, epoxy resin, phenol resin, polyimide resin and the like can be used. In the case of photosensitization, methacrylic acid, acrylic acid, or the like is reacted with a thermosetting group for acrylation. Particularly, acrylate of epoxy resin is most suitable. As the epoxy resin, a novolak type epoxy resin such as a phenol novolak type and a cresol novolak type, and an alicyclic epoxy resin modified with dicyclopentadiene can be used.

As the thermoplastic resin, polyether sulfone (PES), polysulfone (PSF), polyphenylene sulfone (PPS), polyphenylene sulfide (PPES), polyphenyl ether (PP
E), polyetherimide (PI) and the like can be used.
The mixing ratio of the thermosetting resin (photosensitive resin) and the thermoplastic resin is: thermosetting resin (photosensitive resin) / thermoplastic resin = 95
/ 5 to 50/50 is preferred. This is because a high toughness value can be secured without impairing the heat resistance.

The mixing weight ratio of the heat-resistant resin particles is 5 to 50% by weight based on the solid content of the heat-resistant resin matrix.
Desirably, the content is 10 to 40% by weight. As the heat-resistant resin particles, amino resin (melamine resin, urea resin, guanamine resin), epoxy resin and the like are preferable. The adhesive may be composed of two layers having different compositions as described later.

The method for manufacturing the multilayer printed wiring board according to this embodiment will be described in more detail. (1) First, a wiring board having an inner layer copper pattern formed on the surface of a core board is manufactured. The copper pattern is formed on the core substrate by etching a copper-clad laminate, or by forming an adhesive layer for electroless plating on a substrate such as a glass epoxy substrate, a polyimide substrate, a ceramic substrate, or a metal substrate. There is a method in which the surface of the adhesive layer is roughened to a roughened surface, and electroless plating is performed on the roughened surface.

Further, if necessary, a roughening layer is formed on the surface of the conductor circuit. As a method of forming the roughened layer, there is an oxidation (blackening) -reduction treatment, a method of forming a roughened surface by soft etching the surface, or the like. Note that a through-hole is formed in the core substrate, and the wiring layer on the front surface and the back surface can be electrically connected through the through-hole.

The resin may be filled between the through-holes and the conductor circuits of the core substrate to ensure smoothness. The copper-nickel-phosphorus alloy roughened layer according to the present embodiment is formed on the surface of the conductor circuit of the core substrate and the land surface of the through hole. Alternatively, blackening-reducing treatment, sulfuric acid,
An etching process using hydrogen peroxide or the like is performed to form a roughened layer on the conductor circuit. After forming the roughened layer, after washing with water, without draining and drying, 1 to 5 kgf / cm ²
And wash with medium pressure to remove dust. Thereafter, draining and drying are performed. For cleaning the roughened layer, an organic solvent (for example, acetone), air, nitrogen gas, carbon dioxide gas or the like can be used.

(2) Next, an interlayer resin insulating layer is formed on the wiring board manufactured in the above (1). In particular, in the present embodiment, it is desirable to use an adhesive for electroless plating as an interlayer resin insulating material.

(3) After the formed adhesive layer for electroless plating is dried, openings for forming via holes are provided if necessary. In the case of a photosensitive resin, by exposing and developing and then thermosetting, and in the case of a thermosetting resin, by thermosetting and then laser processing, an opening for forming a via hole is formed in the adhesive layer. Section is provided.

(4) Next, the epoxy resin particles present on the surface of the cured adhesive layer are dissolved and removed with an acid or an oxidizing agent, and the surface of the adhesive layer is roughened. here,
Examples of the acid include phosphoric acid, hydrochloric acid, sulfuric acid, and organic acids such as formic acid and acetic acid, and it is particularly preferable to use an organic acid. This is because, when the roughening treatment is performed, the metal conductor layer exposed from the via hole is hardly corroded.
On the other hand, it is desirable to use chromic acid and permanganate (such as potassium permanganate) as the oxidizing agent.

(5) Next, a catalyst nucleus is applied to the wiring board whose surface of the adhesive layer is roughened. It is desirable to use a noble metal ion or a noble metal colloid for providing the catalyst nucleus, and generally, palladium chloride or a palladium colloid is used. Note that it is desirable to perform a heat treatment to fix the catalyst core. Palladium is preferred as such a catalyst core.

(6) Next, an electroless plating is applied to the surface of the adhesive for electroless plating to form an electroless plating film on the entire roughened surface. The thickness of the electroless plating film is 0.5 to 5 μm. Next, a plating resist is formed on the electroless plating film. (7) Electroplating with a thickness of 5 to 20 μm is applied to the portion where the plating resist is not formed to form a conductor circuit and a via hole. Here, it is desirable to use copper plating as the electrolytic plating.

(8) After removing the plating resist, the electroless plating film is dissolved and removed with a mixed solution of sulfuric acid and hydrogen peroxide or an etching solution such as sodium persulfate and ammonium persulfate to form an independent conductor circuit. I do.

(9) Then, after the porous copper-nickel-phosphorus alloy roughened layer according to the present invention is formed on the surface of the conductor circuit, dust is removed by medium-pressure water washing as described above. (10) Next, an adhesive layer for electroless plating is formed as an interlayer resin insulating layer on the substrate.

(11) Further, the steps (3) to (9) are repeated to provide a further upper layer conductive circuit, thereby obtaining a six-layer double-sided multilayer printed wiring board having three layers on one side. (12) After forming a roughened layer on the surface of the multilayer printed wiring board formed by these steps, dust is removed from the roughened surface by spraying a fluid as described above.

After removing dust, a solder resist layer is provided. As the solder resist layer, a resin composition composed of a novolak type epoxy resin is desirable. This is because migration of Pb can be prevented. The production method of the present invention is particularly advantageous because a resin composition composed of a novolak type epoxy resin has low toughness and easily cracks.

The above description is an example of formation by a method called a semi-active method. After roughening an adhesive layer for electroless plating, a catalyst nucleus is provided, a plating resist is provided, and electroless plating is performed. It is also possible to use a so-called full additive method of forming a conductive circuit.

[0033]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for manufacturing a multilayer printed wiring board according to one embodiment of the present invention will be described below with reference to the drawings. Here, first, A. Adhesive for electroless plating, B. Interlayer resin insulation, C.I. Resin filler, D.I. The adjustment of the solder resist will be described.

A. Raw material composition for preparation of adhesive for electroless plating (adhesive for upper layer) [Resin composition] 80 wt% of 25% acrylate of cresol novolak type epoxy resin (Nippon Kayaku, molecular weight 2500)
35% by weight of a resin solution dissolved in DMDG at a concentration of 3.15% and a photosensitive monomer (Toa Gosei Co., Aronix M315) 3.15
Parts by weight, 0.5 parts by weight of an antifoaming agent (manufactured by San Nopco, S-65)
3.6 parts by weight of NMP were obtained by stirring and mixing.

[Resin composition] 12 parts by weight of polyether sulfone (PES), epoxy resin particles (manufactured by Sanyo Chemical Co., Ltd.)
After mixing 7.2 parts by weight of a polymer pole having an average particle size of 1.0 μm and 3.09 parts by weight of a polymer pole having an average particle size of 0.5 μm, 30 parts by weight of NMP was further added, followed by stirring and mixing with a bead mill.

[Curing agent composition] 2 parts by weight of an imidazole curing agent (2E4MZ-CN, manufactured by Shikoku Chemicals), 2 parts by weight of a photoinitiator (Irgacure I-907, manufactured by Ciba-Geigy), and a photosensitizer (manufactured by Nippon Kayaku) , DETX-S) 0.2 parts by weight and NMP 1.5 parts by weight.

B. Raw material composition for preparing interlayer resin insulation agent (adhesive for lower layer) [Resin composition] 80 wt% of 25% acrylate of cresol novolak type epoxy resin (Nippon Kayaku, molecular weight 2500)
% Of a resin solution dissolved in DMDG at a concentration of 35%, 4 parts by weight of a photosensitive monomer (Alonix M315, manufactured by Toagosei Co., Ltd.), 0.5 parts by weight of an antifoaming agent (S-65, manufactured by San Nopco), N
3.6 parts by weight of MP were obtained by stirring and mixing.

[Resin Composition] 12 parts by weight of polyether sulfone (PES), epoxy resin particles (manufactured by Sanyo Chemical Co., Ltd.)
After mixing 14.49 parts by weight of a polymer pole having an average particle size of 0.5 μm, 30 parts by weight of NMP were further added,
It was obtained by stirring and mixing with a bead mill.

[Curing Agent Composition] 2 parts by weight of an imidazole curing agent (2E4MZ-CN, manufactured by Shikoku Chemicals), 2 parts by weight of a photoinitiator (Irgacure I-907, manufactured by Ciba Geigy), and a photosensitizer (manufactured by Nippon Kayaku) , DETX-S) 0.2 parts by weight and NMP 1.5 parts by weight with stirring.

C. Raw material composition for resin filler preparation [Resin composition] 100 parts by weight of bisphenol F type epoxy monomer (manufactured by Yuka Shell, molecular weight 310, YL983U), having an average particle diameter of 1.6 μm coated with a silane coupling agent on the surface SiO ₂ spherical particles (Admatech, CRS 11
01-CE, where the maximum particle size is 170 parts by weight of the inner layer copper pattern described below (15 μm or less) and 1.5 parts by weight of a leveling agent (manufactured by San Nopco, Perenol S4) by stirring and mixing. The viscosity of the mixture is 23 ± 1
The temperature was adjusted to 45,000-49,000 cps at ℃. [Curing agent composition] Imidazole curing agent (Shikoku Chemicals,
2E4MZ-CN) 6.5 parts by weight.

D. Raw Material Composition of Solder Resist A 60% by weight cresol novolak type epoxy resin (manufactured by Nippon Kayaku) dissolved in DMDG was sensitized with an oligomer (molecular weight 4000) having a 50% epoxy group acrylated.
6.67 g, 15.0 g of 80 wt% bisphenol A type epoxy resin (manufactured by Yuka Shell, Epicoat 1001) dissolved in methyl ethyl ketone, imidazole curing agent (manufactured by Shikoku Chemicals,
2E4MZ-CN) 1.6 g, photosensitive acrylic monomer (Nippon Kayaku, R604) 3 g, polyvalent acrylic monomer (Kyoeisha Chemical, DPE6A) 1.5 g, dispersion defoamer (Sannopco) , S-65), and 2 g of benzophenone (Kanto Chemical) as a photoinitiator and 0.2 g of Michler's ketone (Kanto Chemical) as a photosensitizer were added to the mixture. 2.0P at 25 ° C
Adjusted to a · s. The viscosity was measured using a B-type viscometer (Tokyo Keiki, DVL-B type) at 60 rpm with rotor No.4 and 6r.
In the case of pm, we used rotor No.3.

E. Manufacture of Printed Wiring Board (1) Both sides of a substrate 30 made of glass epoxy resin or BT (bismaleimide triazine) resin having a thickness of 1 mm
copper-clad laminate 30 on which copper foil 32 of μm is laminated
A was used as a starting material (see FIG. 1A). First, the copper clad laminate 30A is drilled, subjected to an electroless plating process, and etched in a pattern to form a substrate 20A.
(See FIG. 1B).

(2) The substrate 30 on which the inner layer copper pattern 34 and the through hole 36 are formed is washed with water and dried, and then used as an oxidation bath (blackening bath) as NaOH (10 g / l), NaClO.
_{2 (40g / l), NacPOC} (6g / l), as a reducing bath, NaOH (10g / l), oxidation using NaBH ₄ The (6g / l) - by reduction treatment, the inner layer copper pattern 34 and through-holes 36 A roughened layer 38 was provided on the surface (see FIG. 1C).

(3) The raw material composition for preparing the resin filler C was mixed and kneaded to obtain a resin filler. (4) By applying the resin filler 40 obtained in the above (3) to both surfaces of the substrate using a roll coater within 24 hours after preparation, the conductor circuit (inner layer copper pattern) 34 and the conductor circuit 34
At 70 ° C.
After drying for 20 minutes, the resin filler 40 is similarly applied to the other surface between the conductor circuits 34 and through holes 36.
And dried by heating at 70 ° C for 20 minutes (Fig. 1
(D)).

(5) The surface of the inner layer copper pattern 34 and the through holes 36 are polished on one side of the substrate 30 after the treatment of the above (4) by belt sanding using # 600 belt polishing paper (manufactured by Sankyo Rikagaku). Filler 4 on the surface of land 36a
Polishing was performed so that 0 did not remain, and then buffing was performed to remove scratches caused by the belt sander polishing. Such a series of polishing was similarly performed on the other surface of the substrate (see FIG. 2E). Then at 100 ° C for 1 hour,
Heat treatment was performed at 120 ° C. for 3 hours, 150 ° C. for 1 hour, and 180 ° C. for 7 hours to cure the resin filler.

In this manner, the surface layer portion of the resin filler 40 filled in the through holes 36 and the like and the inner layer conductor circuit 3
(4) The roughened layer 38 on the upper surface is removed to smooth both surfaces of the substrate, and the resin filler 40 and the side surfaces of the inner conductor circuit 34 are roughened.
To obtain a wiring board in which the inner wall surface of the through-hole 36 and the resin filler 40 are firmly adhered to each other through the roughened layer 38. That is, by this step, the surface of the resin filler 40 and the surface of the inner layer copper pattern 34 are flush with each other.

(6) The printed wiring board on which the conductor circuit (inner layer copper pattern) 34 is formed is alkali-degreased and soft-etched, and then treated with a catalyst solution comprising palladium chloride and an organic acid to provide a Pd catalyst. After activating this catalyst, copper sulfate 3.91 × 10 ⁻² mol / l, nickel sulfate 3.75 × 10 ⁻³ mol / l, sodium citrate 7.75 × 10 ⁻² mol / l, Sodium hypophosphite 2.27 × 10 ^-1 mol / l, surfactant (Surfir 465, manufactured by Nissin Chemical Industry) 1.10 × 10 ^-4 mol
/ L, immersed in an electroless plating solution consisting of PH = 9, and after 2 minutes from the immersion, longitudinally vibrated once every 4 seconds,
Cu-N on the surface of the land of the conductor circuit and through hole
A coating layer of a needle-shaped alloy made of i-P and a roughened layer 42 were provided (see FIG. 2F). Furthermore, tin borofluoride 0.1m
ol / l, thiourea 1.0 mol / l, temperature 35 ° C, P
A Cu—Sn substitution reaction was performed under the condition of H = 1.2, and a 0.3 μm-thick Sn layer (not shown) was provided on the surface of the roughened layer.

Without draining and drying the substrate 30 having the conductor circuit 34 provided with the Sn layer, as shown in FIG. 2 (G), the conductor circuit and the roughened surface were sprayed with 2 kgf / Water 43 is wiped with cm ² to remove foreign substances on the surface. Thereafter, draining and drying are performed at 80 ° C.

(7) The raw material composition for preparing the interlayer resin insulating agent of B was stirred and mixed, and the viscosity was adjusted to 1.5 Pa · s to obtain an interlayer resin insulating agent (for lower layer). Next, the raw material composition for preparing the adhesive for electroless plating of A was stirred and mixed, and the viscosity was adjusted to 7 Pa · s to obtain an adhesive solution for electroless plating (for the upper layer).

(8) On both surfaces of the substrate of (6), the interlayer resin insulating material (for lower layer) having a viscosity of 1.5 Pa · s obtained in (7)
4 was coated with a roll coater within 24 hours after preparation, left in a horizontal state for 20 minutes, dried at 60 ° C. for 30 minutes (prebaked), and then the viscosity of 7 Pa · obtained in the above (7) was obtained. s
Of the photosensitive adhesive solution (for upper layer) 46 is applied within 24 hours after preparation, and left in a horizontal state for 20 minutes.
The adhesive layer 50 having a thickness of 35 μm was formed by drying (prebaking) (see FIG. 2H).

(9) A photomask film (not shown) on which a black circle of 85 μmφ is printed is brought into close contact with both surfaces of the substrate on which the adhesive layer 50 has been formed in the above (8), and is brought into contact with an ultrahigh pressure mercury lamp.
Exposure was performed at 500 mJ / cm ² . This is spray-developed with a DMTG solution, and the substrate is further subjected to an ultra-high pressure mercury lamp for 3000 hours.
Exposure at mJ / cm ² , 1 hour at 100 ° C, 1 hour at 120 ° C,
After that, a heat treatment (post bake) at 150 ° C. for 3 hours is performed, so that an opening of 85 μmφ with excellent dimensional accuracy equivalent to a photomask film (opening for forming a via hole).
35-μm-thick interlayer resin insulation layer having 48 (two-layer structure)
50 (FIG. 3 (I). The tin plating layer (not shown) was partially exposed in the opening 48 to be a via hole.

(10) The substrate 30 in which the openings 48 are formed is immersed in chromic acid for 19 minutes to dissolve and remove the epoxy resin particles present on the surface of the interlayer resin insulating layer 50, thereby obtaining the interlayer resin insulating layer 50. Was roughened (see FIG. 3 (J)), and then immersed in a neutralizing solution (manufactured by Shipley) and then washed with water.

Further, by applying a palladium catalyst (manufactured by Atotech) to the surface of the substrate 30 which has been subjected to the surface roughening treatment (roughening depth: 6 μm), the surface of the interlayer resin insulating layer 50 and the opening 48 for the via hole are formed. A catalyst core (not shown) was attached to the inner wall surface.

(11) The substrate was immersed in an aqueous electroless copper plating solution having the following composition to form an electroless copper plating film 52 having a thickness of 0.6 μm on the entire rough surface of the interlayer resin insulating layer 50 (FIG. 8). 3 (K)) [Aqueous electroless plating solution] EDTA 150 g / l Copper sulfate 20 g / l HCHO 30 ml / l NaOH 40 g / l α, α'-bipyridyl 80 mg / l PEG 0.1 g / l [None Electroplating conditions] 70 ° C liquid temperature for 30 minutes

(12) A commercially available photosensitive dry film is stuck on the electroless copper plating film 52 formed in the above (11), a mask is placed, and exposure is performed at 100 mJ / cm ² , and the resultant is exposed to 0.8% sodium carbonate. After development, a plating resist 54 having a thickness of 15 μm was provided (see FIG. 3 (L)).

(13) Next, electrolytic copper plating was applied to the non-resist-formed portion under the following conditions to form an electrolytic copper plating film 56 having a thickness of 15 μm (see FIG. 4 (M)). [Aqueous electrolytic plating solution] Sulfuric acid 180 g / l Copper sulfate 80 g / l Additive (Captoside GL, manufactured by Atotech Japan) 1 ml / l [Electroplating conditions] Current density 1 A / dm ² hours 30 minutes Temperature Room temperature

(14) After the plating resist 54 is peeled and removed with 5% KOH, the electroless plating film 52 under the plating resist is dissolved and removed by etching with a mixed solution of sulfuric acid and hydrogen peroxide. An 18 μm-thick conductive circuit 58 and a via hole 60 composed of the plating film 52 and the electrolytic copper plating film 56 were formed (see FIG. 4 (N)).

(15) By performing the same processing as in (6), the roughened surface 62 made of Cu-Ni-P is
Was formed on the surface of the substrate, and the surface was further substituted with Sn (see FIG. 4 (O)).

(16) By repeating the steps (7) to (15), a conductor circuit 158 and a via hole 160 are further formed on the upper interlayer resin insulation layer 150, and the conductor circuit 158 and the via hole 160 are formed. By providing the roughened layer 162 thereon, a multilayer wiring board was obtained. However, the Sn substitution was not performed on the roughened layer 162 on the conductor circuit 158 and the via hole 160 where the solder resist layer is formed on the upper side.

(17) The multilayer wiring board 30 obtained in the above (16)
On both sides of the solder resist composition 70α at 20 μm
(See FIG. 5 (Q)). Then at 70 ° C
After performing a drying process at 70 ° C. for 30 minutes for 20 minutes, a 5 mm-thick photomask film (not shown) on which a circular pattern (mask pattern) is drawn is placed in close contact with the substrate, and is placed at 1000 mJ.
/ Cm ² and exposed to ultraviolet light at a rate of DMTG. Further, heat treatment is performed at 80 ° C. for 1 hour, at 100 ° C. for 1 hour, at 120 ° C. for 1 hour, at 150 ° C. for 3 hours, and the opening 71 of the solder pad portion (including the via hole and its land portion) is heated. A solder resist layer (thickness: 20 μm) 70 (opening diameter: 200 μm) was formed (see FIG. 5 (R)).

(18) Next, as shown in FIG. 5 (S), the substrate on which the solder resist layer 70 was formed was coated with nickel chloride 2.
31 × 10 ⁻¹ mol / l, sodium hypophosphite 2.8
4 × 10 ⁻¹ mol / l, sodium citrate 1.55 ×
It was immersed in an electroless nickel plating solution having a pH of 4.5 consisting of 10 ^-1 mol / l for 20 minutes, and a thickness of 5 μm was formed in the opening 71.
Was formed. Further, the substrate was treated with potassium potassium cyanide (7.61 × 10 ⁻³ mol / l),
Electroless gold plating solution consisting of 1.87 × 10 ^-1 mol / l ammonium chloride, 1.16 × 10 ^-1 mol / l sodium citrate, and 1.70 × 10 ^-1 mol / l sodium hypophosphite Immersion for 23 seconds under the condition of 93 ° C., to deposit a gold plating layer 74 of 0.03 μm thickness on the nickel plating layer,
A solder bump 75 is formed on the via hole 161 and the conductor circuit 158.

(19) Then, as shown in FIG. 6, a solder paste is printed on the solder bump 75 in the opening 71 of the solder resist layer 70 and reflowed at 200 ° C. to form the solder bump (solder body) 76. The multilayer printed wiring board 10 having the formed and solder bumps was manufactured.

(Comparative Example) Basically the same as the example, except that after forming a roughened layer on a conductor circuit as a lower layer of the interlayer insulating resin layer, the Sn layer was formed, and then drained and dried, and washed with medium pressure water. Did not do. Similarly, after forming a roughened layer on a conductor circuit which is a lower layer of the solder resist layer, draining and drying were performed, and intermediate pressure washing was not performed. As described above, with respect to the printed wiring boards manufactured in the examples and the comparative examples, the presence or absence of peeling of the interlayer resin insulating layer was confirmed, and a HAST test was performed. The conditions of the HAST test were as follows: temperature 130 ° C., relative humidity 8
The application of the potential was continued at 5% and an applied voltage of 1.8 V for 200 hours, that is, at high temperature and high humidity. In the example, no peeling of the interlayer resin insulating layer 58 and the interlayer resin insulating layer 158 was observed, but in the comparative example, a halo phenomenon (peeling) was confirmed in some via holes. In addition, no crack occurred in the solder resist layer 70 of the example, but cracks occurred in the comparative example.

[0064]

As described above, according to the present invention, according to the method of manufacturing a multilayer printed wiring board, since the foreign matter on the surface of the roughened layer of the conductive circuit is removed, the peeling between the conductive circuit and the interlayer insulating resin is prevented. In addition, reliability can be improved by preventing the occurrence of cracks in the solder resist layer.

[Brief description of the drawings]

1 (A), 1 (B), 1 (C), 1
(D) is a step diagram of the method for producing a multilayer printed wiring board according to one embodiment of the present invention.

FIG. 2 (E), FIG. 2 (F), FIG. 2 (G), FIG.
(H) is a process drawing of a method for manufacturing a multilayer printed wiring board according to one example of the present invention.

FIG. 3 (I), FIG. 3 (J), FIG. 3 (K), FIG.
(L) is a step diagram of the method for producing the multilayer printed wiring board according to one embodiment of the present invention.

FIGS. 4 (M), 4 (N), 4 (O), 4
(P) is a process drawing of a method for manufacturing a multilayer printed wiring board according to one example of the present invention.

FIGS. 5 (Q), 5 (R), and 5 (S) are process diagrams of a method for manufacturing a multilayer printed wiring board according to one embodiment of the present invention.

FIG. 6 is a cross-sectional view of a multilayer printed wiring board according to a manufacturing method according to one embodiment of the present invention.

[Explanation of symbols]

 Reference Signs List 30 core substrate 34 conductive layer 36 through hole 42 roughened layer 50 interlayer resin insulating layer 54 resist 56 electrolytic copper plating film (metal layer) 60 via hole 62 roughened layer 70 solder resist layer 75 solder pad 150 interlayer resin insulating layer 158 conductor Circuit 160 Via hole 162 Rough layer

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5E343 AA02 AA12 BB15 BB24 BB52 BB71 CC23 CC32 CC50 DD33 DD43 EE04 EE15 EE52 GG04 5E346 AA02 AA06 AA12 AA15 AA16 AA17 AA43 BB01 BB16 CC08 CC40 CC41 CC43 DD33 DD33 DD EE39 FF02 FF12 FF15 GG01 GG15 GG16 GG17 GG18 GG22 GG23 GG25 GG27 GG28 HH08 HH11

Claims (6)

[Claims] 1. A multilayer printed wiring board, comprising: providing a roughened layer on a surface of a conductive circuit formed on a substrate; spraying a fluid on the surface of the roughened layer for cleaning; and forming an interlayer insulating layer. Manufacturing method. 2. A multilayer, comprising: providing a roughened layer on a surface of a conductor which is to be a solder pad formed on a substrate; washing the surface by spraying a fluid on the roughened surface; and then forming a solder resist layer. A method for manufacturing a printed wiring board. 3. The method according to claim 1, wherein the fluid is at least one selected from water, an organic solvent, air, nitrogen gas, and carbon dioxide gas. 4. A fluid is applied to the roughened surface at 1 to 5 kgf / c.
method for manufacturing a multilayer printed wiring board according to claim 1 or 2 blowing a spray pressure of m ^2. 5. The method for manufacturing a multilayer printed wiring board according to claim 1, wherein the roughening layer is formed by depositing the conductor circuit by electroless plating or by etching the surface of the conductor circuit. 6. The roughening layer is formed by adding Cu—Ni—
The method for producing a multilayer printed wiring board according to claim 1, wherein the method is formed by depositing a roughened alloy layer made of P by electroless plating.