JP2000022087A - Selective metal layer forming method, formation of capacitor by use thereof, and contact hole filling method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a selective metal layer forming method, a capacitor forming method by use thereof, a contact hole ohmic layer forming method and a contact hole filling method in a semiconductor device manufacturing process. SOLUTION: A first process 120 is provided, where sacrifice metal source gas which is selectively evaporated on a semiconductor substrate where an insulating film and a conductive layer are laminated is supplied, and a sacrifice metal layer is selectively evaporated on the conductive layer, and a second process 140 is provided, where metal halogen compound gas possessed of lower halogen bonding strength than the metal atom contained in the sacrifice metal layer is supplied, and the sacrifice metal layer is substituted with a deposited metal layer of titanium or platinum forming sacrifice metal atom and halogen compound. The above processes are used to form the lower electrode of a capacitor and an ohmic layer on the base of a contact hole, and a metal layer can be selectively formed at a temperature lower than 500 deg.C.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of forming a metal layer selectively, a method of forming a capacitor of a semiconductor device using the same, and a method of filling a contact hole.

[0002]

2. Description of the Related Art As semiconductor devices become more highly integrated and complicated, the time for selectively forming a metal layer in the manufacturing process is increasing. In the process of manufacturing a capacitor of a semiconductor device, a MIS (Metal Insulator Silicon) is formed by forming a lower electrode using a metal instead of polysilicon in order to realize high capacitance.
Alternatively, an MIM (Metal Insulator Metal) capacitor is embodied, but it is difficult to form an ohmic layer at the bottom of a contact hole having a small size and a high aspect ratio in a contact hole filling step.

In a manufacturing process of a capacitor having a lower electrode made of a metal material, a metal layer is formed into a non-selective blanket without performing patterning on a lower electrode of a hemispherical grain (HSG) made of polysilicon. The method of vapor deposition is very difficult to realize, and at present there is no such technique at all. In addition, if PZT (Pb (Zr, Ti) O ₃ , BST (BaSrTiO ₃ )) having a perovskite structure is used as a high dielectric film of a capacitor, oxidation occurs when the dielectric film is deposited. Ideally, platinum, which has excellent leakage current characteristics, is used instead of the existing polysilicon electrode, but it is difficult to etch if a metal layer such as a platinum film is deposited by a non-selective blanket method. That is, if platinum formed on the blanket is dry-etched using chlorine gas, PtClx generated as an etching by-product is a non-volatile conductive polymer. In addition, since a part of the lower electrode made of platinum is also etched in the wet etching process, a DRAM requiring fine patterning is required.
(Dynamic Random Access Memory) It is difficult to realize a reproducible process in the manufacturing process.

The formation of an ohmic layer at the bottom of a contact hole is generally performed by depositing a high melting point metal such as titanium having excellent conductivity by plasma enhanced chemical vapor deposition (PECVD).
Ced chemical vapor deposition) or sputtering. However, if the sputtering method is used, the step coating property is deteriorated, and the PECVD method is applied to an actual process because the leakage current increases due to a high deposition temperature of 600 ° C. or more and the electrical characteristics of the semiconductor element deteriorate. Still has many problems.

In addition, when an ohmic layer such as a titanium layer is formed by a sputtering method, and a barrier layer, for example, titanium nitride is formed thereon by a chemical vapor deposition (CVD) method, corrosion of the ohmic layer and an ohmic layer are formed. Defects such as lifting occur at the interface between the metal and the barrier layer. Also, if a barrier layer (TiN) is formed on the ohmic layer made of titanium by a sputtering method, a lifting problem does not occur at the interface between the ohmic layer and the barrier layer. A lifting problem may occur when forming a film using a chemical vapor deposition method.

Therefore, a method of selectively forming a metal layer at a temperature of 500 ° C. or less which does not cause deterioration of electrical characteristics of a semiconductor device is required. The fact is that there is no such technique in the ohmic layer forming process.

[0007]

SUMMARY OF THE INVENTION The object of the present invention is to
Selective reaction in which a metal halide compound gas having a halogen bonding force smaller than the metal atoms of the sacrificial metal layer reacts with the sacrificial metal layer selectively deposited at a low temperature of not more than ℃, and the sacrificial metal layer is replaced with the deposited metal layer. Another object of the present invention is to provide a method for forming a metal layer.

It is another object of the present invention to provide a method for forming a capacitor of a semiconductor device using the method for forming a selective metal layer. Still another object of the present invention is to provide a contact hole filling method using the selective metal layer forming method.

[0009]

In the selective metal layer forming method according to the present invention, first, a semiconductor substrate on which an insulating film and a conductive layer are formed is put into a chamber and a purge gas of a mixed gas of hydrogen and silane is supplied. Subsequently, a sacrificial metal source gas, such as DMAH (Dimethyl Aluminum Hydrid), which maintains the property of being selectively deposited on the insulating film and the conductive layer in the chamber.
e: (CH ₃ ) ₂ AlH) or DMEAA (Dimethyl Ethylamine)
Alane: (CH ₃ ) ₂ C ₂ H ₅ N: AlH ₃ ) is supplied to form a sacrificial metal layer only on the conductive layer. Finally, a metal halide compound gas having a smaller halogen bonding force than the metal atoms of the sacrificial metal layer is supplied to the chamber, and the sacrificial metal layer is replaced with a vapor-deposited metal layer.

The method of supplying the purge gas is preferably to supply continuously, or to supply a constant amount at the beginning, and then supply a constant amount at a time after the formation of the sacrificial metal layer and the replacement with the vapor-deposited metal layer have been completed. In this case, it is appropriate that the supply time and the supply amount of the purge gas to be supplied after the replacement with the vapor-deposited metal layer have become larger than those in other stages. The insulating film is preferably formed using an oxide film or a composite film including an oxide film, and the conductive layer is preferably formed using impurity-doped silicon or metal.

Preferably, the metal of the deposited metal layer is titanium,
It is preferable to use any one selected from tantalum, zirconium, hafnium, cobalt, molybdenum, tungsten, nickel and platinum, and when the deposited metal is titanium, TiCl is used as a metal halide compound gas.
_In the case where the vapor deposition metal is platinum, it is appropriate to use Cl ₄ H ₆ Pt or PtCl ₂ dissolved in water or alcohol and vaporized as metal halide compound gas.

According to another aspect of the present invention, there is provided a method of forming a capacitor of a semiconductor device using a selective metal layer forming method, comprising forming an insulating film such as an oxide film or a composite film including an oxide film on a semiconductor substrate. It is formed and patterned on an insulating film to form a contact hole exposing a source region of the semiconductor substrate. Then, a conductive layer composed of polysilicon or metal doped with impurities covering the contact hole and filling the insulating film is formed, and the conductive layer is patterned or chemically mechanically refined (CMP: Chemical Mechanical).
al Polishing) to form a conductive layer pattern connected to the contact holes. Subsequently, the semiconductor substrate is put into the chamber, and a purge gas of a mixed gas of hydrogen and silane is supplied. Then, a sacrificial metal source gas, for example, DMAH or DMEAA, which maintains the property of being selectively deposited on the insulating film and the conductive layer, is supplied to the chamber to form the sacrificial metal layer only on the conductive layer. Subsequently, a halogen compound gas smaller than the metal atoms of the sacrificial metal layer is supplied to the chamber, and the sacrificial metal layer is replaced with a vapor-deposited metal layer. Finally, a dielectric film is formed on the deposited metal layer, and an upper electrode is formed on the dielectric film.

After the formation of the conductive layer pattern, a step of forming a hemispherical grain on the surface of the conductive layer pattern may be further performed. As a method of supplying the purge gas, it is preferable to supply the gas continuously or to supply a constant amount at the beginning and supply a constant amount after purging and forming the sacrificial metal layer and replacing it with the deposited metal layer. It is preferable that the supply time of the purge gas supplied after the replacement with the deposited metal layer is longer than that of the purge gas supplied at another stage and the supply amount is larger. After forming the deposited metal layer, a step of siliconizing the deposited metal layer may be further performed.

According to another aspect of the present invention, an insulating film such as an oxide film or a composite film including an oxide film is formed on a semiconductor substrate and patterning is performed to form a lower film,
For example, doped polysilicon or TiN
A contact hole exposing a lower film made of a metal as described above is formed. The semiconductor substrate having the contact hole formed therein is placed in a chamber, and a purge gas of a mixed gas of hydrogen and silane is supplied. Subsequently, a sacrificial metal source gas that retains the property of being selectively deposited on the insulating film and the lower film,
For example, DMAH or DMEAA is supplied, and a sacrificial metal layer made of aluminum is formed only on the lower film. Subsequently, a metal halide compound gas having a smaller halogen bonding force than the metal atoms of the sacrificial metal layer is supplied to the chamber to replace the sacrificial metal layer with the deposited metal layer. Then, a conductive layer for filling the contact hole is formed.

The method of supplying the purge gas is preferably a continuous supply, or a constant amount is supplied at the beginning, and a constant amount is supplied after the formation of the sacrificial metal layer and the replacement with the deposited metal layer are performed by purging. In this case, it is preferable that the supply time of the purge gas supplied after the replacement with the vapor-deposited metal layer is longer than that of the purge gas supplied in another stage and the supply amount is larger. It is preferable to further perform a step of forming a barrier layer, for example, a TiN layer on the deposited metal layer after the replacement with the deposited metal layer.

According to the present invention, a specific metal is selectively formed at a low temperature of 500 ° C. or less in the process of manufacturing a semiconductor device. A capacitor lower electrode made of In addition, when the ohmic layer at the bottom of the contact hole is formed, it is possible to prevent defects such as characteristic deterioration of the thin film or lifting due to corrosion while increasing the step coverage.

[0017]

Preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. (Selective Metal Layer Forming Method) FIG. 1 is a process flow chart for explaining a selective metal layer forming method according to the present invention.

As shown in FIG. 1, first, a semiconductor substrate on which an insulating film and a conductive layer are formed is put into a chamber of semiconductor equipment (100). At this time, an oxide film having a property that metal deposited to prevent deposition of a metal layer for selective formation of a metal layer and a composite film thereof are used. As the conductive layer, a metal such as polysilicon or titanium nitride doped with an impurity of a hydrogen terminating group having a property that aluminum as a metal to be deposited is easily deposited is used. Subsequently, a mixed gas of hydrogen and silane as a purge gas is supplied to the chamber (110) to purge the inside of the chamber. Here, the purge gas can be supplied in two ways. The first is a method of continuously supplying a constant amount of a purge gas from the beginning, and the second is that a purge gas is first supplied and purged before supplying a sacrificial metal source gas, and then a sacrificial metal is deposited ( 120) and a method of periodically supplying a constant amount after the replacement with the deposited metal (140).

Then, the DM of the sacrificial metal source gas is introduced into the chamber.
A sacrificial metal layer made of aluminum is formed on the surface of the conductive layer by supplying AH or DMEAA (120). Here, the reason for using aluminum for the sacrificial metal layer is that while aluminum has the highest Gibbs Free Energy with halogen group elements such as Cl, Br, F, and I, various precursors are used. It has already been developed. The precursors for aluminum deposition are (C ₄ H ₉ ) ₂ AlH (Di-i
-butyl aluminum hydride), (C ₄ H ₉ ) ₃ Al (Tri-i-butyl
aluminum), (C ₂ H ₅ ) ₂ Al (Triethyl aluminum), (C
H ₃ ) ₃ Al (Trimethylaluminum), AlH ₃ N (CH ₃ ) ₃ (Trimethy
lamine), (CH ₃ ) ₂ AlH (Dimethyl Aluminum Hydride),
(CH ₃ ) ₂ C ₂ H ₅ N: AlH ₃ (Dimethyl Ethylamine Alane) and the like. Among them, (CH ₃ ) ₂ AlH (Dimethyl Aluminum Hydrid
e; DMAH) and (CH ₃ ) ₂ C ₂ H ₅ N: AlH ₃ (Dimethyl Ethylamine Al
ane; DMEAA) is silicon or TiN doped with an impurity of a hydrogen terminating group without being deposited on an insulating film such as an oxide film.
Is selectively deposited only on metals such as Therefore, it is selectively deposited only on the conductive layer without being deposited on the insulating film of the semiconductor substrate in the chamber. Subsequently, a purge gas is supplied to the chamber where the semiconductor substrate on which the sacrificial metal layer is selectively formed is provided (130) to purge the source gas of the sacrificial metal inside the chamber.

Subsequently, when a metal halide compound gas containing a desired metal, for example, TiCl ₄ is supplied to the chamber to react with the semiconductor substrate, TiCl ₄ is changed to AlClx, and aluminum of the sacrificial metal layer is formed of titanium by vapor deposition. It is replaced with a metal layer (140). Here, since the metal of the metal halide compound gas has a weaker halogen bonding force than the metal atoms of the sacrificial metal layer, the metal atoms of the sacrificial metal layer react with the metal halide compound gas. That is, at 427 ° C., the Gibbs free energy of TiCl ₄ is 678.3 kJ / mol, which is higher than that of most metal halides, while the Gibbs free energy of AlCl ₆ is 112.
At 1.9 kJ / mol, it is even higher than the Gibbs free energy of TiCl ₄ . Therefore, the aluminum atoms of the sacrificial metal layer move away from the surface of the conductive layer and react with chlorine gas having a higher bonding force to become gaseous AlClx, and where the aluminum atoms of the sacrificial metal layer come away from TiCl ₄ Decomposed titanium is deposited. As a result, the metal layer can be selectively formed by supplying a metal halide compound gas having a smaller bonding force between the sacrificial metal and the halogen atom, that is, a Gibbs free energy, to the chamber where the sacrificial metal is formed. The deposited metal layers that can be formed in this way include titanium, tantalum, zirconium, hafnium, cobalt, molybdenum, tungsten, nickel and platinum.

Here, when the vapor deposition metal is titanium, the metal
TiCl as halogen compound gas_FourUse the deposited metal
In the case of platinum, Cl is used as the metal halide gas.₆H₆Pt
(Platinic Chloride) or PtCl_TwoIn water or alcohol
Use the one to be vaporized and the deposited metal is cobalt
In the case of_Two, Co
F _Two, CoI_TwoUse one substance selected in. here
And a metal halide containing platinum, namely Cl₆H₆Pt or PtC
l_TwoIs like a solvent because it is a solid that is not a gas
Dissolve in a suitable solvent and vaporize before use. In this case, platinum
Is inactive compared to other metals,
It has low bonding strength and is resistant to sacrificial metal layers such as aluminum.
Accordingly, it is easy to deposit.

When the metal to be deposited is molybdenum,
As metal halide gas (C_FiveH _Five)_TwoMoCl_Two(Bis cycl
opentadienyl molybdenum dichloride), C_FiveH_FiveMoCl_Four(C
yclopentadienyl molybdenum tetrachloride), MoF
₆(Molybdenum fluoride), MoCl _Three/ MoCl_Five(Molybdenum c
hloride) and MoI_TwoSelected in (Molybdenum iodide)
If one of the materials used is nickel and the deposited metal is nickel,
Is [(C₆H_Five)_TwoPCH_TwoCH_TwoCH_TwoP
(C₆H_Five)_Two] NiCl_Two(1,2-Bis diphenylphosphineo propane
 nickel), [(C₆H_Five)_FiveC_Five]_TwoNiBr_Two(Bis triphenylphosph
in nickel bromide), [(C₆H_Five)_ThreeP]_TwoNiCl_Two(Bis triphe
nylphosphin nickel chloride), [Ni (NH_Three)₆] Cl_Two(Hex
aaminenickel chloride), [Ni (NH_Three)₆] I_Two(Hexaamine
 iodide), NiBr / NiBr_Two(Nickel bromide), NiCl_Two(Nic
kel chloride), NiF_Two(Nickel Fluoride) and NiI_Two(Ni
ckel iodide)
When the metal is tungsten, the halogen of the metal
As a compound gas (C_FiveH_Five)_TwoWcl _Two(Bis cyclopentadienyl
tungsten dichloride), WB / W_TwoB / W_TwoB_Five(Tungsten bromi
de), WCl_Four/ WCl₆(Tungsten chloride) and WF₆(Tungs
ten fluoride)
You.

For reference, Tables 1 to 5 show an absolute temperature of 700K (4
27C) is a data showing Gibbs free energy of various metal halide gas.

[Table 1]

[Table 2]

[Table 3]

[Table 4]

[Table 5] Finally, titanium, tantalum, zirconium, hafnium,
After forming a metal layer such as cobalt, molybdenum, tungsten, nickel and platinum by a replacement method using a metal halide gas, a purge gas is supplied to the chamber (150). The purge gas supplied at this time has a larger supply amount than the purge gas supplied at the sacrificial metal layer formation and other stages, further lengthens the supply time, and removes the TiClx adsorbed to a place such as an insulating film excluding the sacrificial metal layer. Such a metal halide gas is separated and purged.

FIG. 2 is a gas supply diagram of a selective metal layer forming process according to the present invention. Here, the Y axis indicates the supply state of the supply gas, and the X axis indicates time. FIG. 2 shows a case where a purge gas in which hydrogen and silane are mixed is supplied periodically, and FIG. 3 shows a case where a purge gas is continuously supplied from the beginning. When the purge gas is supplied periodically as shown in FIG. 2, the supply time and supply amount of the purge gas (150) supplied immediately after the supply of the metal halide compound gas are increased so that the metal halide compound gas is not adsorbed on the insulating film. Ensure that it is sufficiently purged. In brief, a purge gas (110) is supplied first, and a sacrificial metal source gas is supplied (120) to form a sacrificial metal. When the purge gas is supplied periodically, the purge gas is supplied to the chamber (130) to purge the remaining sacrificial metal source gas, and the metal halide gas containing the metal to be deposited is supplied to supply the sacrificial metal. Replace the layer with a vapor deposited metal layer. At this time, the compound gas of the sacrificial metal aluminum and the halogen atom is left in the chamber, and this is purged to the outside of the chamber again by supplying the purge gas (150). If such a process is set in one cycle and the process is repeatedly performed, the thickness of the deposited metal can be easily adjusted, and the problem of step coating property can be improved.

(Method for Forming Capacitor in Semiconductor Device Using Selective Metal Layer Forming Method) FIG. 4 is a process flow chart for explaining a capacitor forming method using the selective metal layer forming step of the present invention.

Referring to FIG. 4, first, a transistor or the like is used.
Forming the lower structure of the interlayer insulating film (ILD: Inter Layer
Insulating film as Dielectric) contains oxide film or oxide film
It is formed using a composite film. Photo and etching process for insulating film
A contour that progresses to expose the source region of the transistor
A hole is formed (300). Then, selectively
Improve conductivity between contact hole and landfill material,
Ohmic and barrier layers to prevent diffusion
Form (310) using a material such as titanium nitride
You can also. Subsequently, a conductive material for a lower electrode, for example,
Purely doped polysilicon or TiN
Insulation while burying contact holes using metal material
A conductive layer covering the surface of the film is formed. Where polysilicon
Doping is selected by the sacrificial metal layer in the subsequent process.
Having a hydrogen terminating group to be formed alternatively
You. Next, pattern the conductive layer to form contact holes
Forming a conductive layer pattern for the lower electrode connected to (32)
0). The method of forming the conductive layer pattern
First, a plug layer that fills only the inside of the
A conductive layer pattern can be formed on the
A conductive layer to fill the inside of the tool and pattern it
May form. Here, the conductive layer pattern
Performing 330 forming a lane (HSG);
The surface area of the lower electrode can be increased. Then hemispherical gray
The semiconductor substrate on which the semiconductor is formed is inserted into the chamber of the semiconductor equipment.
Purge gas continuously or as described in FIG.
It is supplied periodically (340). Sacrificial metal saw to chamber
Sugas DMAH or DMEAA is supplied. Then, conductive
The aluminum sacrificial metal layer is selectively formed only on the layer
(350). Next, metal halide containing the deposited metal
Compound gas such as TiCl _FourOr Cl₆H₆Pt or PtCl_TwoThe water or
Supply what is dissolved in alcohol and vaporized
Metal layer made of platinum or platinum is formed by replacement method (3
60). Then, if necessary, heat-treat the deposited metal layer
A silicon layer is formed (365) or an ammonia plasma or
Uses rapid nitriding (RTN: Rapid Thermal Nitridation)
To form a nitride film (370) or heat in an oxygen atmosphere.
Process to form an oxide film (375) and convert it to a dielectric film
use.

At this time, if titanium is used as the metal layer to be deposited first, TiN is formed from the nitride film, and the selective metal layer forming process described with reference to FIG. 1 is performed again. Platinum can be formed again as the metal layer (373). In this case, titanium of the first deposition metal is used as a contact hole filling material, and platinum of the second deposition metal is used as a capacitor lower electrode.

Subsequently, a dielectric film is deposited on the resultant structure (380). Such a dielectric film may be a composite film of an oxide film and a nitride film or an oxide composed of a single metal atom of Ta ₂ O ₅ , TiO ₂ , ZrO ₂ , Al ₂ O ₃ and Nb ₂ O _5. One or AlN
One of nitrides consisting of a single metal atom such as
It can be formed using one selected from polyatomic metal oxides such as SrTiO ₃ , PZT (Pb (Zr, Ti) O ₃ , BST (BaSrTiO ₃ ). An upper electrode is formed on the formed semiconductor substrate using polysilicon or a metal such as TiN, TiAlN, or TiSiN (390).

(First Embodiment) FIG. 4 is a cross-sectional view for explaining a method of forming a capacitor using a selective metal layer forming process according to a first embodiment of the present invention.

Referring to FIG. 5, a lower structure (not shown) such as a transistor is formed on a semiconductor substrate 400, and an oxide film or a composite film including an oxide film is formed thereon by an insulating film 402. Contact hole 404 exposing source region of transistor by patterning insulating film 402
To form A polysilicon layer doped with an impurity having a hydrogen terminating group is stacked on a semiconductor substrate having a contact hole 404 formed thereon, and the polysilicon layer is patterned and connected to the contact hole to form a lower electrode conductive layer pattern 4.
06 is formed.

Referring to FIG. 6, a deposited metal layer 408 such as titanium and platinum is formed on the resultant structure using the selective metal layer deposition method described with reference to FIG. At this time, before forming the deposited metal layer, a hemispherical grain (HSG) forming process may be performed on the conductive layer pattern 406 to increase the surface area of the capacitor lower electrode. Therefore, in the present invention, it is possible to deposit a metal on the HSG surface without patterning by selective metal layer deposition.

Referring to FIG. 7, an ammonia plasma (NH ₃ plasma) is applied to the semiconductor substrate on which the deposited metal layer 408 is formed.
The nitride film 410 is formed by performing a nitridation process using a) or a rapid nitridation process (RTN). Such a nitride film 4
Reference numeral 10 serves to suppress the formation of oxides at the interface between the lower electrode and the dielectric film when the dielectric film is deposited in a subsequent process. Referring to FIG. 8, an oxide film 412, for example, titanium oxide is formed by performing a heat treatment in an oxygen atmosphere on the resultant, and the nitride film 410 and the oxide film 412 are used as a dielectric film.

Referring to FIG. 9, Ta ₂ O ₅ , T
iO ₂ , one of oxides composed of a single metal atom of Al ₂ O ₃ and Nb ₂ O ₅ , or one of nitrides composed of a single metal atom such as AlN, or SrTiO ₃ , PZT (Pb (Zr, Ti)
The dielectric film 414 is formed using one selected from polyatomic metal oxides such as O ₃ and BST (BaSrTiO ₃ ).

Referring to FIG. 10, an upper electrode 416 made of polysilicon or metal is formed on a semiconductor substrate on which a dielectric film 414 is formed, and a SIM (Silicon Insulato) is formed.
A capacitor of a semiconductor device having a metal (r Metal) or MIM (Metal Insulator Metal) structure is formed.

If the capacitor of the semiconductor device is formed according to the above-described invention, the photolithography process can be omitted after patterning the lower electrode after the lower electrode is formed. In particular, the lower electrode using hemispherical grains is patterned. Since there is no need, there is an advantage that the lower electrode can be formed of a metal material while solving various problems according to the etching.

(Second Embodiment) FIG. 5 is a cross-sectional view for explaining a capacitor forming method using a selective metal layer forming step according to a second embodiment of the present invention.

Referring to FIG. 11 and FIG. 12, since the steps are the same as those in the first embodiment, the description will be omitted to avoid duplication. Here, the reference numerals are configured to correspond to those of the above-described first embodiment for easy understanding. FIG.
Referring to, a silicide formation process is performed on the semiconductor substrate on which the deposited metal layer 508 of the selective metal layer is formed, and the deposited metal layer 508 is replaced with a silicide layer 510 such as TiSix.

Referring to FIG. 14, a nitride film 512 is formed on the semiconductor substrate on which the silicide layer 510 is formed by using ammonia plasma or by performing a rapid nitriding process.
Referring to FIG. 15, the composite film of the dielectric film 514 on a semiconductor substrate on which the nitride film 510 is formed oxide film and a nitride film, Ta ₂ O
_5, TiO _2, ZrO _2, any one among the oxide consists of a single metal atom of Al ₂ O ₃ and Nb ₂ O _5, or in the nitrides comprise a single metal atom such as AlN One, or SrTiO3, PZT, B
It is formed using a selected one of polyatomic metal oxides such as ST.

Referring to FIG. 16, a capacitor having a SIM or MIM structure is formed by forming an upper electrode 516 using polysilicon or metal on a semiconductor substrate on which a dielectric film is formed.

(Third Embodiment) FIG. 6 is a cross-sectional view for explaining a capacitor forming method using a selective metal layer forming method according to a third embodiment of the present invention.

This embodiment is for suppressing the problem of forming platinum silicide (PtSix) having high resistance when a platinum film is selectively deposited on a lower electrode of a capacitor. The layer deposition process is used twice.
Referring to FIG. 17, a lower structure such as a transistor is formed on a semiconductor substrate 600, and an oxide film or a composite film including an oxide film is formed using the insulating film 602. Subsequently, a plug layer 604 for filling a contact hole exposing the source region of the transistor is formed using polysilicon. Subsequently, titanium nitride of a conductive layer for a capacitor lower electrode connected to the plug layer 604 is deposited by chemical vapor deposition (CVD).
or a blanket method by physical vapor deposition and patterning to form a conductive pattern 606 for a capacitor lower electrode. Subsequently, a platinum film 608 is formed on the surface of the conductive film pattern 606 made of TiN by using the selective metal layer forming method of FIG.

The conductive film pattern for a capacitor lower electrode made of a platinum film can be formed by the following modified method. A contact hole exposing the source region of the transistor is formed, and a plug layer 604 for filling the contact hole is formed of polysilicon doped with an impurity having a hydrogen terminating group. Subsequently, titanium is selectively deposited on the exposed surface of the plug layer 604 according to the selective metal layer forming method of FIG.
To form Subsequently, a nitriding process using ammonia plasma or a rapid nitriding process is performed on the conductive film pattern 606 made of titanium to form titanium nitride on the surface, and the platinum is formed by the selective metal layer forming method of FIG. The film 608 is formed again to form a capacitor lower electrode made of a platinum film.

Referring to FIG. 18, a dielectric film layer 610 is stacked on the platinum film 608. Such a dielectric film 61
0 is a composite film of an oxide film and a nitride film, or Ta ₂ O ₅ , TiO _2
2 , one of oxides consisting of single metal atoms of ZrO ₂ , Al ₂ O ₃ and Nb ₂ O ₅ or one of nitrides consisting of single metal atoms such as AlN , Or SrTiO ₃ , PZT (Pb (Zr,
It can be formed using one selected from polyatomic metal oxides such as Ti) O ₃ and BST (BaSrTiO ₃ ).

Referring to FIG. 19, a capacitor upper electrode 612 is formed using a metal such as polysilicon or platinum on a resultant structure having a dielectric film 610 formed thereon, according to a third embodiment of the present invention. The step of forming the capacitor of the semiconductor device using the selective metal layer forming method is completed.

(Contact Hole Filling Method Using Selective Metal Layer Forming Method) FIG. 20 is a process flow chart shown for explaining a contact hole filling method using the selective metal layer forming step of the present invention. is there.

Referring to FIG. 20, an insulating film is laminated with an interlayer insulating film (ILD) on a semiconductor substrate on which a lower structure such as a transistor and a bit line is formed, and is patterned to expose a lower hole. Form (70
0). At this time, the insulating film is formed using an oxide film or a composite film thereof, and the lower film is formed using titanium nitride or silicon doped with an impurity having a hydrogen terminal group. This is because a sacrificial metal layer is selectively deposited on a lower layer from a sacrificial metal source gas in a subsequent process. The contact hole is a contact hole for a capacitor lower electrode directly connected to the semiconductor substrate or a metal contact hole. Subsequently, using the selective metal layer forming method described with reference to FIG. 1, a deposited metal layer is formed at the bottom of the contact hole using a material such as titanium (710), (72).
0) and (730). A deposited metal layer made of a highly conductive material such as titanium is used as an ohmic layer in the process of filling contact holes. Subsequently, a barrier layer such as titanium nitride is selectively formed on the ohmic layer of the deposited metal layer by rapid nitriding or nitriding using ammonia plasma (740). Finally, a plug layer is formed on the barrier layer using aluminum or tungsten (750), and a conductive layer connected to the plug layer is formed (760) to fill the contact hole. here,
In some cases, a conductive layer for filling a contact hole is formed directly on a barrier layer or an ohmic layer without separately forming a plug layer.

Here, the barrier layer is formed (740) by using a chemical vapor deposition or sputtering method and a blanket method instead of a rapid nitriding treatment or a nitriding treatment using ammonia plasma. May be patterned.

(Fourth Embodiment) FIG. 8 is a cross-sectional view for explaining a contact hole filling method using a selective metal layer forming step according to a fourth embodiment of the present invention.

Referring to FIG. 21, an insulating film 802, for example, an oxide film or a composite film thereof is formed on a semiconductor substrate 800, and is patterned to form a contact hole 804 exposing a lower film. Here, the contact hole 804 is a contact hole for a capacitor lower electrode connected to the semiconductor substrate as shown in FIG. 21, and is a metal contact hole that is formed again after the primary contact hole is formed.

Referring to FIG. 22, contact hole 8
A vapor-deposited metal layer such as titanium is formed on the semiconductor substrate on which the layer 04 has been formed by using the selective metal layer forming method described with reference to FIG. The deposited metal layer plays a role of an ohmic layer 806 for improving conductivity between the lower film and a conductive material filling the contact hole in a process of filling the contact hole.

Referring to FIG. 23, a barrier layer 808, for example, a titanium nitride film serving to prevent diffusion of impurities is formed on a semiconductor substrate on which an ohmic layer 806 is selectively deposited. Such a barrier layer may be formed by a nitriding process using ammonia plasma, a rapid nitriding process, or a blanket deposition method.

Referring to FIG. 24, a conductive layer 810 covering the surface of the semiconductor substrate is laid on the semiconductor substrate on which the barrier layer 808 is formed while burying the contact hole, and selectively formed according to the fourth embodiment of the present invention. The contact hole filling step by the method of forming the metal layer is completed.

FIG. 25 is a sectional view of a method obtained by modifying FIG. More specifically, a plug layer 812 is first formed on a semiconductor substrate having the barrier layer 808 formed thereon using tungsten or aluminum. Subsequently, the plug layer 812 is etched back or chemically mechanically refined to form the plug layer 812.
Is limited to the inside of the contact hole.
And a conductive layer 810 connected to the conductive layer 810.

Therefore, according to the present embodiment, an ohmic layer having a comparatively small thickness is formed in a contact hole having a high aspect ratio at a low temperature of 500 ° C. or less without causing a problem such as lifting or corrosion. can do. Therefore, in the present invention, a process such as an etch-back performed for adjusting the thickness of the ohmic layer can be omitted. Obviously, the present invention is not limited to the above-described embodiments, but can be modified in a variety of ways by those having ordinary skill in the art within the technical spirit to which the present invention pertains.

[0055]

According to the above-described present invention, the lower electrode can be easily formed in the step of forming a capacitor of a semiconductor device by selectively forming a metal layer such as titanium and platinum at a low temperature of 500 ° C. or less. Alternatively, it can be formed on metal. Therefore, it is possible to solve various problems in the process which occurs when forming the conventional titanium and platinum. In addition, in the step of forming an ohmic layer at the bottom of the contact hole, an ohmic layer having a suitable thickness at a low temperature is selectively formed only under the contact to fill the contact hole while suppressing defects such as lifting or corrosion. I can do it.

[Brief description of the drawings]

FIG. 1 is a process flow chart for explaining a selective metal layer forming method according to the present invention.

FIG. 2 is a gas supply diagram of a selective metal layer forming process according to the present invention.

FIG. 3 is a gas supply diagram of a selective metal layer forming process according to the present invention.

FIG. 4 is a process flow chart for explaining a capacitor forming method using a selective metal layer forming process of the present invention.

FIG. 5 is a sectional view illustrating a method of forming a capacitor using a selective metal layer forming process according to a first embodiment of the present invention.

FIG. 6 is a cross-sectional view illustrating a method of forming a capacitor using a selective metal layer forming process according to a first embodiment of the present invention.

FIG. 7 is a cross-sectional view illustrating a method of forming a capacitor using a selective metal layer forming process according to a first embodiment of the present invention.

FIG. 8 is a cross-sectional view illustrating a method of forming a capacitor using a selective metal layer forming process according to a first embodiment of the present invention.

FIG. 9 is a cross-sectional view illustrating a method of forming a capacitor using a selective metal layer forming process according to a first embodiment of the present invention.

FIG. 10 is a cross-sectional view illustrating a method of forming a capacitor using a selective metal layer forming process according to a first embodiment of the present invention.

FIG. 11 is a cross-sectional view illustrating a method of forming a capacitor using a selective metal layer forming process according to a second embodiment of the present invention.

FIG. 12 is a cross-sectional view illustrating a method of forming a capacitor using a selective metal layer forming process according to a second embodiment of the present invention.

FIG. 13 is a cross-sectional view illustrating a method of forming a capacitor using a selective metal layer forming process according to a second embodiment of the present invention.

FIG. 14 is a cross-sectional view illustrating a method of forming a capacitor using a selective metal layer forming process according to a second embodiment of the present invention.

FIG. 15 is a sectional view illustrating a method of forming a capacitor using a selective metal layer forming process according to a second embodiment of the present invention.

FIG. 16 is a cross-sectional view illustrating a method of forming a capacitor using a selective metal layer forming process according to a second embodiment of the present invention.

FIG. 17 is a sectional view illustrating a method of forming a capacitor using a selective metal layer forming process according to a third embodiment of the present invention.

FIG. 18 is a cross-sectional view illustrating a method of forming a capacitor using a selective metal layer forming process according to a third embodiment of the present invention.

FIG. 19 is a sectional view illustrating a method of forming a capacitor using a selective metal layer forming process according to a third embodiment of the present invention.

FIG. 20 is a process flow chart shown for explaining a contact hole filling method using a selective metal layer forming process of the present invention.

FIG. 21 is a cross-sectional view for explaining a contact hole filling method using a selective metal layer forming step according to a fourth embodiment of the present invention.

FIG. 22 is a cross-sectional view for explaining a contact hole filling method using a selective metal layer forming step according to a fourth embodiment of the present invention.

FIG. 23 is a cross-sectional view for explaining a contact hole filling method using a selective metal layer forming step according to a fourth embodiment of the present invention.

FIG. 24 is a sectional view illustrating a contact hole filling method using a selective metal layer forming process according to a fourth embodiment of the present invention.

FIG. 25 is a cross-sectional view for explaining a contact hole filling method using a selective metal layer forming step according to a fourth embodiment of the present invention.

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Lee Sainin South Korea 1st apartment 104 building 706, 2-11 Umetan 2-dong, Paldal-gu, Suwon-si, Gyeonggi-do, Republic of Korea (72) Inventor Lin No. 7-1, No. 1, Agricultural Library, Yongheung-eup, Yongin-si

Claims (20)

[Claims] A semiconductor substrate having an insulating film and a conductive layer formed thereon is supplied to a chamber and a purge gas is supplied thereto; and a sacrifice for maintaining characteristics of being selectively deposited on the insulating film and the conductive layer into the chamber. Forming a sacrificial metal layer only on the conductive layer by supplying a metal source gas; and supplying a metal halide compound gas having a halogen bonding force smaller than a metal atom of the sacrificial metal layer to the chamber. Replacing the sacrificial metal layer with a deposited metal layer. 2. The method according to claim 1, wherein the insulating film is formed using an oxide film or a composite film including the oxide film. 3. The method according to claim 1, wherein the conductive layer is formed using silicon or metal doped with impurities. 4. The method according to claim 3, wherein the silicon doped with the impurity has a terminal group containing hydrogen. 5. The method of claim 3, wherein the metal is formed using titanium nitride. 6. The method according to claim 1, wherein the purge gas is a mixed gas of hydrogen and silane. 7. The method of supplying the purge gas is to supply the gas continuously or to supply a constant amount at the beginning, and to supply a constant amount after the formation of the sacrificial metal layer and the replacement with the deposited metal layer by purging. The selective metal layer forming method according to claim 1, wherein: 8. A step of: (1) forming an insulating film on a semiconductor substrate and patterning the insulating film to form a contact hole exposing a source region of the semiconductor substrate; and (2) filling the contact hole. Forming a conductive layer covering the insulating film; (3) processing the conductive layer to form a conductive layer pattern connected to the contact hole; and (4) placing the semiconductor substrate in a chamber. Supplying a purge gas; and (5) supplying a sacrificial metal source gas to the chamber to maintain a characteristic of being selectively deposited on the insulating film and the conductive layer, thereby forming a sacrificial metal layer only on the conductive layer. (6) supplying a metal halide compound gas having a halogen bonding force smaller than that of metal atoms of the sacrificial metal layer to the chamber to deposit the sacrificial metal layer on the sacrificial metal layer; Replacing with a layer, (7) forming a dielectric film on the deposited metal layer, and (8) forming an upper electrode on the dielectric film. Forming a capacitor of a semiconductor device by a selective metal layer forming method. 9. The method according to claim 8, wherein the insulating film is formed using an oxide film or a composite film including the oxide film. 10. The method of claim 8, wherein the conductive layer of step (2) is formed using doped polysilicon or titanium nitride. A method for forming a capacitor of a semiconductor device. 11. The method of claim 10, wherein the impurity-doped polysilicon has a hydrogen terminating group. 12. The method according to claim 8, wherein the purge gas in the step (4) is a mixed gas of hydrogen and silane.
13. A method for forming a capacitor of a semiconductor device by the method for forming a selective metal layer according to item 5. 13. The method of supplying a purge gas in the step (4) is to supply the gas continuously, or to supply a predetermined amount at the beginning to purge the sacrificial metal layer and replace it with a vapor-deposited metal layer. 9. The method of claim 8, wherein a predetermined amount is supplied later. 14. The method of claim 8, further comprising, after forming the deposited metal layer in step (6), siliconizing the deposited metal layer. Method for forming a capacitor of a semiconductor device according to the above. 15. A step of: (a) forming an insulating film on a semiconductor substrate and performing patterning to form a contact hole exposing a lower film; and (b) putting the semiconductor substrate having the contact hole formed therein into a chamber. (C) supplying a sacrificial metal source gas to the chamber to maintain a characteristic of being selectively deposited on the insulating film and the lower film to form a sacrificial metal layer only on the lower film. (D) supplying a metal halide compound gas having a smaller halogen bonding force than the metal atoms of the sacrificial metal layer to the chamber to replace the sacrificial metal layer with a vapor-deposited metal layer; and (e). Forming a conductive layer for burying the contact hole. 6. A method for burying a contact hole by a selective metal layer deposition method, comprising: 16. The method according to claim 15, wherein the insulating layer of step (a) is formed as an oxide layer or a composite layer including an oxide layer. Method. 17. The selective metal layer deposition according to claim 15, wherein the lower layer in the step (a) is a titanium nitride layer or a silicon layer doped with an impurity having a hydrogen terminating group. Method for filling contact holes. 18. The method according to claim 1, wherein the purge gas in the step (b) is a mixed gas of hydrogen and silane.
6. A method for filling a contact hole by a selective metal layer deposition method according to 5. 19. The method of step (b), wherein the purge gas is supplied continuously or after a predetermined amount is supplied and purged to form the sacrificial metal layer and replace it with a vapor-deposited metal layer. The method of claim 15, wherein a constant amount is supplied by the method. 20. The method of claim 15, further comprising forming a barrier layer on the deposited metal layer after replacing the deposited metal layer in step (d). A contact hole filling method by a layer forming method.