ITUB20159190A1 - Circuito integrato includente un resistore a semiconduttori, circuito di compensazione resistenza e relativi metodi - Google Patents

Circuito integrato includente un resistore a semiconduttori, circuito di compensazione resistenza e relativi metodi

Info

Publication number
ITUB20159190A1
ITUB20159190A1 ITUB2015A009190A ITUB20159190A ITUB20159190A1 IT UB20159190 A1 ITUB20159190 A1 IT UB20159190A1 IT UB2015A009190 A ITUB2015A009190 A IT UB2015A009190A IT UB20159190 A ITUB20159190 A IT UB20159190A IT UB20159190 A1 ITUB20159190 A1 IT UB20159190A1
Authority
IT
Italy
Prior art keywords
related methods
integrated circuit
semiconductor resistor
resistance compensation
circuit including
Prior art date
Application number
ITUB2015A009190A
Other languages
English (en)
Inventor
Alberto Pagani
Alessandro Motta
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Publication of ITUB20159190A1 publication Critical patent/ITUB20159190A1/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C7/00Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/10Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0207Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/20Resistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/36Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2855Environmental, reliability or burn-in testing
    • G01R31/2856Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/34Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Ceramic Engineering (AREA)
  • Electromagnetism (AREA)
  • Semiconductor Integrated Circuits (AREA)
ITUB2015A009190A 2015-06-30 2015-12-15 Circuito integrato includente un resistore a semiconduttori, circuito di compensazione resistenza e relativi metodi ITUB20159190A1 (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US14/754,799 US9704624B2 (en) 2015-06-30 2015-06-30 Integrated circuit (IC) including semiconductor resistor and resistance compensation circuit and related methods

Publications (1)

Publication Number Publication Date
ITUB20159190A1 true ITUB20159190A1 (it) 2017-06-15

Family

ID=55787659

Family Applications (1)

Application Number Title Priority Date Filing Date
ITUB2015A009190A ITUB20159190A1 (it) 2015-06-30 2015-12-15 Circuito integrato includente un resistore a semiconduttori, circuito di compensazione resistenza e relativi metodi

Country Status (3)

Country Link
US (2) US9704624B2 (it)
CN (2) CN106328646B (it)
IT (1) ITUB20159190A1 (it)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9719874B2 (en) 2015-06-30 2017-08-01 Stmicroelectronics S.R.L. Pressure sensor device for measuring a differential normal pressure to the device and related methods
US9704624B2 (en) * 2015-06-30 2017-07-11 Stmicroelectronics S.R.L. Integrated circuit (IC) including semiconductor resistor and resistance compensation circuit and related methods
US11653568B2 (en) * 2020-01-08 2023-05-16 Texas Instmments Incorporated Integrated circuit stress sensor
CN111403135A (zh) * 2020-04-28 2020-07-10 浙江禾川科技股份有限公司 一种电力设备及其制动电阻器
US20230395646A1 (en) * 2022-06-07 2023-12-07 Nxp Usa, Inc. Polycrystalline semiconductor resistor

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2000639B (en) 1977-06-29 1982-03-31 Tokyo Shibaura Electric Co Semiconductor device
US5757211A (en) 1996-12-27 1998-05-26 Sgs-Thomson Microelectronics, Inc. IC precision resistor ratio matching with different tub bias voltages
JP3171240B2 (ja) * 1998-01-13 2001-05-28 日本電気株式会社 抵抗素子、それを用いた半導体装置およびこれらの製造方法
US6448840B2 (en) * 1999-11-30 2002-09-10 Intel Corporation Adaptive body biasing circuit and method
JP2001168651A (ja) * 1999-12-14 2001-06-22 Mitsumi Electric Co Ltd 半導体装置
DE102004003853B4 (de) 2004-01-26 2009-12-17 Infineon Technologies Ag Vorrichtung und Verfahren zur Kompensation von Piezo-Einflüssen auf eine integrierte Schaltungsanordnung
JP4764086B2 (ja) * 2005-07-27 2011-08-31 パナソニック株式会社 半導体集積回路装置
US7410293B1 (en) * 2006-03-27 2008-08-12 Altera Corporation Techniques for sensing temperature and automatic calibration on integrated circuits
KR100718049B1 (ko) * 2006-06-08 2007-05-14 주식회사 하이닉스반도체 반도체 메모리의 온 다이 터미네이션 장치 및 그 제어방법
US7696811B2 (en) * 2006-06-19 2010-04-13 International Business Machines Corporation Methods and circuits to reduce threshold voltage tolerance and skew in multi-threshold voltage applications
JP2010109233A (ja) * 2008-10-31 2010-05-13 Renesas Technology Corp 半導体装置
US7915949B2 (en) * 2009-03-12 2011-03-29 International Business Machines Corporation Implementing eFuse resistance determination before initiating eFuse blow
US8446209B1 (en) * 2011-11-28 2013-05-21 Semiconductor Components Industries, Llc Semiconductor device and method of forming same for temperature compensating active resistance
US9704624B2 (en) 2015-06-30 2017-07-11 Stmicroelectronics S.R.L. Integrated circuit (IC) including semiconductor resistor and resistance compensation circuit and related methods

Also Published As

Publication number Publication date
CN106328646A (zh) 2017-01-11
US20170271057A1 (en) 2017-09-21
US20170005043A1 (en) 2017-01-05
CN205194698U (zh) 2016-04-27
US9704624B2 (en) 2017-07-11
US10153073B2 (en) 2018-12-11
CN106328646B (zh) 2019-09-24

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