IT975824B - Procedimento per al fabbricazione di dispositivi semiconduttori ottenuti col procedimento - Google Patents

Procedimento per al fabbricazione di dispositivi semiconduttori ottenuti col procedimento

Info

Publication number
IT975824B
IT975824B IT70676/72A IT7067672A IT975824B IT 975824 B IT975824 B IT 975824B IT 70676/72 A IT70676/72 A IT 70676/72A IT 7067672 A IT7067672 A IT 7067672A IT 975824 B IT975824 B IT 975824B
Authority
IT
Italy
Prior art keywords
procedure
manufacturing
semiconductor devices
devices obtained
semiconductor
Prior art date
Application number
IT70676/72A
Other languages
English (en)
Italian (it)
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Application granted granted Critical
Publication of IT975824B publication Critical patent/IT975824B/it

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/891Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D44/00, e.g. integration of charge-coupled devices [CCD] or charge injection devices [CID
    • H10D84/895Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D44/00, e.g. integration of charge-coupled devices [CCD] or charge injection devices [CID comprising bucket-brigade charge-coupled devices
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current 
    • G05F1/12Regulating voltage or current  wherein the variable actually regulated by the final control device is AC
    • G05F1/24Regulating voltage or current  wherein the variable actually regulated by the final control device is AC using bucking or boosting transformers as final control devices
    • G05F1/247Regulating voltage or current  wherein the variable actually regulated by the final control device is AC using bucking or boosting transformers as final control devices with motor in control circuit
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76213Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00Subject matter not provided for in other groups of this subclass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Electromagnetism (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Formation Of Insulating Films (AREA)
IT70676/72A 1971-11-25 1972-11-22 Procedimento per al fabbricazione di dispositivi semiconduttori ottenuti col procedimento IT975824B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7116182A NL7116182A (cs) 1971-11-25 1971-11-25

Publications (1)

Publication Number Publication Date
IT975824B true IT975824B (it) 1974-08-10

Family

ID=19814543

Family Applications (1)

Application Number Title Priority Date Filing Date
IT70676/72A IT975824B (it) 1971-11-25 1972-11-22 Procedimento per al fabbricazione di dispositivi semiconduttori ottenuti col procedimento

Country Status (11)

Country Link
JP (1) JPS4861078A (cs)
AR (1) AR194520A1 (cs)
AT (1) ATA994272A (cs)
AU (1) AU469642B2 (cs)
CA (1) CA970077A (cs)
DE (1) DE2254821A1 (cs)
ES (1) ES408908A1 (cs)
FR (1) FR2161003B1 (cs)
GB (1) GB1409095A (cs)
IT (1) IT975824B (cs)
NL (1) NL7116182A (cs)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4142199A (en) * 1977-06-24 1979-02-27 International Business Machines Corporation Bucket brigade device and process
JPS5534493A (en) * 1978-08-31 1980-03-11 Ibm Bucket brigade cell

Also Published As

Publication number Publication date
AR194520A1 (es) 1973-07-23
ES408908A1 (es) 1975-10-16
JPS4861078A (cs) 1973-08-27
AU469642B2 (en) 1976-02-19
AU4908072A (en) 1974-05-23
GB1409095A (en) 1975-10-08
CA970077A (en) 1975-06-24
FR2161003A1 (cs) 1973-07-06
DE2254821A1 (de) 1973-05-30
FR2161003B1 (cs) 1978-02-03
NL7116182A (cs) 1973-05-29
ATA994272A (de) 1975-08-15

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