IT975127B - Procedimento per la fabbricazione di un dispositivo semiconduttore e dispositivo semiconduttore ot tenuto col procedimento - Google Patents
Procedimento per la fabbricazione di un dispositivo semiconduttore e dispositivo semiconduttore ot tenuto col procedimentoInfo
- Publication number
- IT975127B IT975127B IT70082/72A IT7008272A IT975127B IT 975127 B IT975127 B IT 975127B IT 70082/72 A IT70082/72 A IT 70082/72A IT 7008272 A IT7008272 A IT 7008272A IT 975127 B IT975127 B IT 975127B
- Authority
- IT
- Italy
- Prior art keywords
- procedure
- semiconductive device
- manufacturing
- semiconductive
- device obtained
- Prior art date
Links
- 238000000034 method Methods 0.000 title 2
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/051—Etching
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/053—Field effect transistors fets
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/106—Masks, special
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/117—Oxidation, selective
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Ceramic Engineering (AREA)
- General Chemical & Material Sciences (AREA)
- Local Oxidation Of Silicon (AREA)
- Element Separation (AREA)
- Weting (AREA)
- Drying Of Semiconductors (AREA)
- Formation Of Insulating Films (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL7113561A NL7113561A (it) | 1971-10-02 | 1971-10-02 |
Publications (1)
Publication Number | Publication Date |
---|---|
IT975127B true IT975127B (it) | 1974-07-20 |
Family
ID=19814158
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT70082/72A IT975127B (it) | 1971-10-02 | 1972-09-29 | Procedimento per la fabbricazione di un dispositivo semiconduttore e dispositivo semiconduttore ot tenuto col procedimento |
Country Status (9)
Country | Link |
---|---|
US (1) | US3852104A (it) |
JP (1) | JPS5112991B2 (it) |
CH (1) | CH546008A (it) |
DE (1) | DE2248198A1 (it) |
ES (1) | ES407201A1 (it) |
FR (1) | FR2154778B1 (it) |
GB (1) | GB1400865A (it) |
IT (1) | IT975127B (it) |
NL (1) | NL7113561A (it) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5696402A (en) * | 1965-09-28 | 1997-12-09 | Li; Chou H. | Integrated circuit device |
US7038290B1 (en) | 1965-09-28 | 2006-05-02 | Li Chou H | Integrated circuit device |
CA1001771A (en) * | 1973-01-15 | 1976-12-14 | Fairchild Camera And Instrument Corporation | Method of mos transistor manufacture and resulting structure |
IN140846B (it) * | 1973-08-06 | 1976-12-25 | Rca Corp | |
GB1437112A (en) * | 1973-09-07 | 1976-05-26 | Mullard Ltd | Semiconductor device manufacture |
JPS51114079A (en) * | 1975-03-31 | 1976-10-07 | Fujitsu Ltd | Construction of semiconductor memory device |
JPS5293278A (en) * | 1976-01-30 | 1977-08-05 | Matsushita Electronics Corp | Manufacture for mos type semiconductor intergrated circuit |
US4125427A (en) * | 1976-08-27 | 1978-11-14 | Ncr Corporation | Method of processing a semiconductor |
US4219925A (en) * | 1978-09-01 | 1980-09-02 | Teletype Corporation | Method of manufacturing a device in a silicon wafer |
NL7903158A (nl) * | 1979-04-23 | 1980-10-27 | Philips Nv | Werkwijze voor het vervaardigen van een veldeffekt- transistor met geisoleerde poortelektrode, en transistor vervaardigd door toepassing van een derge- lijke werkwijze. |
US4372033A (en) * | 1981-09-08 | 1983-02-08 | Ncr Corporation | Method of making coplanar MOS IC structures |
DE3572086D1 (en) * | 1984-12-13 | 1989-09-07 | Siemens Ag | Method of producing an isolation separating the active regions of a highly integrated cmos circuit |
US5247197A (en) * | 1987-11-05 | 1993-09-21 | Fujitsu Limited | Dynamic random access memory device having improved contact hole structures |
US5656510A (en) | 1994-11-22 | 1997-08-12 | Lucent Technologies Inc. | Method for manufacturing gate oxide capacitors including wafer backside dielectric and implantation electron flood gun current control |
US20040144999A1 (en) * | 1995-06-07 | 2004-07-29 | Li Chou H. | Integrated circuit device |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3425879A (en) * | 1965-10-24 | 1969-02-04 | Texas Instruments Inc | Method of making shaped epitaxial deposits |
US3418227A (en) * | 1966-03-31 | 1968-12-24 | Texas Instruments Inc | Process for fabricating multiple layer circuit boards |
US3578515A (en) * | 1967-04-05 | 1971-05-11 | Texas Instruments Inc | Process for fabricating planar diodes in semi-insulating substrates |
GB1250917A (it) * | 1967-12-30 | 1971-10-27 | ||
NL170348C (nl) * | 1970-07-10 | 1982-10-18 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleiderinrichting, waarbij op een oppervlak van een halfgeleiderlichaam een tegen dotering en tegen thermische oxydatie maskerend masker wordt aangebracht, de door de vensters in het masker vrijgelaten delen van het oppervlak worden onderworpen aan een etsbehandeling voor het vormen van verdiepingen en het halfgeleiderlichaam met het masker wordt onderworpen aan een thermische oxydatiebehandeling voor het vormen van een oxydepatroon dat de verdiepingen althans ten dele opvult. |
US3699402A (en) * | 1970-07-27 | 1972-10-17 | Gen Electric | Hybrid circuit power module |
US3796612A (en) * | 1971-08-05 | 1974-03-12 | Scient Micro Syst Inc | Semiconductor isolation method utilizing anisotropic etching and differential thermal oxidation |
-
1971
- 1971-10-02 NL NL7113561A patent/NL7113561A/xx unknown
-
1972
- 1972-09-29 IT IT70082/72A patent/IT975127B/it active
- 1972-09-29 CH CH1424272A patent/CH546008A/xx not_active IP Right Cessation
- 1972-09-29 GB GB4510172A patent/GB1400865A/en not_active Expired
- 1972-09-30 ES ES407201A patent/ES407201A1/es not_active Expired
- 1972-10-02 FR FR7234816A patent/FR2154778B1/fr not_active Expired
- 1972-10-02 DE DE19722248198 patent/DE2248198A1/de active Pending
- 1972-10-02 US US00293782A patent/US3852104A/en not_active Expired - Lifetime
- 1972-10-02 JP JP47098077A patent/JPS5112991B2/ja not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS5112991B2 (it) | 1976-04-23 |
CH546008A (it) | 1974-02-15 |
FR2154778B1 (it) | 1977-08-26 |
DE2248198A1 (de) | 1973-04-05 |
GB1400865A (en) | 1975-07-16 |
JPS4844080A (it) | 1973-06-25 |
ES407201A1 (es) | 1975-11-01 |
US3852104A (en) | 1974-12-03 |
FR2154778A1 (it) | 1973-05-11 |
NL7113561A (it) | 1973-04-04 |
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