IT9047587A0 - Componente semiconduttore di potenza, cellulare. - Google Patents
Componente semiconduttore di potenza, cellulare.Info
- Publication number
- IT9047587A0 IT9047587A0 IT9047587A IT4758790A IT9047587A0 IT 9047587 A0 IT9047587 A0 IT 9047587A0 IT 9047587 A IT9047587 A IT 9047587A IT 4758790 A IT4758790 A IT 4758790A IT 9047587 A0 IT9047587 A0 IT 9047587A0
- Authority
- IT
- Italy
- Prior art keywords
- cell phone
- power semiconductor
- semiconductor component
- component
- phone
- Prior art date
Links
- 210000003850 cellular structure Anatomy 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
- H01L23/5286—Arrangements of power or ground buses
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0692—Surface layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41708—Emitter or collector electrodes for bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42304—Base electrodes for bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Microelectronics & Electronic Packaging (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Geometry (AREA)
- Semiconductor Integrated Circuits (AREA)
- Photovoltaic Devices (AREA)
- Structure Of Printed Boards (AREA)
- Bipolar Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8901409A FR2642902B1 (fr) | 1989-02-03 | 1989-02-03 | Composant semi-conducteur de puissance cellulaire |
Publications (3)
Publication Number | Publication Date |
---|---|
IT9047587A0 true IT9047587A0 (it) | 1990-02-01 |
IT9047587A1 IT9047587A1 (it) | 1990-08-04 |
IT1239789B IT1239789B (it) | 1993-11-15 |
Family
ID=9378456
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT47587A IT1239789B (it) | 1989-02-03 | 1990-02-01 | Componente semiconduttore di potenza, cellulare. |
Country Status (6)
Country | Link |
---|---|
US (1) | US5025299A (it) |
JP (1) | JPH0334348A (it) |
DE (1) | DE4002435A1 (it) |
FR (1) | FR2642902B1 (it) |
GB (1) | GB2227882B (it) |
IT (1) | IT1239789B (it) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2687843A1 (fr) * | 1992-02-24 | 1993-08-27 | Motorola Semiconducteurs | Transistor bipolaire lateral pnp et procede de fabrication. |
JPH05304221A (ja) * | 1992-02-28 | 1993-11-16 | Fuji Electric Co Ltd | 大電流集積回路 |
US5665991A (en) * | 1992-03-13 | 1997-09-09 | Texas Instruments Incorporated | Device having current ballasting and busing over active area using a multi-level conductor process |
KR0136684B1 (en) * | 1993-06-01 | 1998-04-29 | Matsushita Electric Ind Co Ltd | Semiconductor device and manufacture thereof |
US5482897A (en) * | 1994-07-19 | 1996-01-09 | Lsi Logic Corporation | Integrated circuit with on-chip ground plane |
US5581126A (en) * | 1995-09-14 | 1996-12-03 | Advanced Micro Devices, Inc. | Interlaced layout configuration for differential pairs of interconnect lines |
DE19613409B4 (de) * | 1996-04-03 | 2005-11-17 | Texas Instruments Deutschland Gmbh | Leistungsbauelementanordnung |
US7283381B2 (en) | 2000-08-17 | 2007-10-16 | David Earl Butz | System and methods for addressing a matrix incorporating virtual columns and addressing layers |
US6462977B2 (en) | 2000-08-17 | 2002-10-08 | David Earl Butz | Data storage device having virtual columns and addressing layers |
CN101449384B (zh) | 2006-05-18 | 2011-06-08 | 松下电器产业株式会社 | 半导体元件及其制造方法 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2545654B1 (fr) * | 1983-05-03 | 1985-09-13 | Fairchild Camera Instr Co | Composant semi-conducteur de puissance, et procede pour la fabrication |
-
1989
- 1989-02-03 FR FR8901409A patent/FR2642902B1/fr not_active Expired - Lifetime
-
1990
- 1990-01-09 GB GB9000499A patent/GB2227882B/en not_active Expired
- 1990-01-27 DE DE4002435A patent/DE4002435A1/de not_active Withdrawn
- 1990-01-31 JP JP2019366A patent/JPH0334348A/ja active Pending
- 1990-02-01 IT IT47587A patent/IT1239789B/it active IP Right Grant
- 1990-02-02 US US07/473,766 patent/US5025299A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
GB9000499D0 (en) | 1990-03-07 |
GB2227882B (en) | 1992-11-25 |
US5025299A (en) | 1991-06-18 |
IT9047587A1 (it) | 1990-08-04 |
GB2227882A (en) | 1990-08-08 |
DE4002435A1 (de) | 1990-08-09 |
IT1239789B (it) | 1993-11-15 |
JPH0334348A (ja) | 1991-02-14 |
FR2642902A1 (fr) | 1990-08-10 |
FR2642902B1 (fr) | 1991-05-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
0001 | Granted | ||
TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19990226 |