IT1397374B1 - Soluzione integrata per l'individuazione dei componenti difettosi in dispositivi di memoria - Google Patents

Soluzione integrata per l'individuazione dei componenti difettosi in dispositivi di memoria

Info

Publication number
IT1397374B1
IT1397374B1 ITMI2009A002356A ITMI20092356A IT1397374B1 IT 1397374 B1 IT1397374 B1 IT 1397374B1 IT MI2009A002356 A ITMI2009A002356 A IT MI2009A002356A IT MI20092356 A ITMI20092356 A IT MI20092356A IT 1397374 B1 IT1397374 B1 IT 1397374B1
Authority
IT
Italy
Prior art keywords
memory devices
integrated solution
defective components
identifying defective
identifying
Prior art date
Application number
ITMI2009A002356A
Other languages
English (en)
Inventor
Carolina Selva
Danilo Rimondi
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to ITMI2009A002356A priority Critical patent/IT1397374B1/it
Priority to US12/960,355 priority patent/US8320207B2/en
Publication of ITMI20092356A1 publication Critical patent/ITMI20092356A1/it
Priority to US13/684,992 priority patent/US8588018B2/en
Application granted granted Critical
Publication of IT1397374B1 publication Critical patent/IT1397374B1/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/022—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in I/O circuitry
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/025—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in signal lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/026—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in sense amplifiers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
    • G11C29/24—Accessing extra cells, e.g. dummy cells or redundant cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/44—Indication or identification of errors, e.g. for repair
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C2029/0401—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals in embedded memories
ITMI2009A002356A 2009-12-30 2009-12-30 Soluzione integrata per l'individuazione dei componenti difettosi in dispositivi di memoria IT1397374B1 (it)

Priority Applications (3)

Application Number Priority Date Filing Date Title
ITMI2009A002356A IT1397374B1 (it) 2009-12-30 2009-12-30 Soluzione integrata per l'individuazione dei componenti difettosi in dispositivi di memoria
US12/960,355 US8320207B2 (en) 2009-12-30 2010-12-03 Integrated solution for identifying malfunctioning components within memory devices
US13/684,992 US8588018B2 (en) 2009-12-30 2012-11-26 Integrated solution for identifying malfunctioning components within memory devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ITMI2009A002356A IT1397374B1 (it) 2009-12-30 2009-12-30 Soluzione integrata per l'individuazione dei componenti difettosi in dispositivi di memoria

Publications (2)

Publication Number Publication Date
ITMI20092356A1 ITMI20092356A1 (it) 2011-06-30
IT1397374B1 true IT1397374B1 (it) 2013-01-10

Family

ID=42104507

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI2009A002356A IT1397374B1 (it) 2009-12-30 2009-12-30 Soluzione integrata per l'individuazione dei componenti difettosi in dispositivi di memoria

Country Status (2)

Country Link
US (2) US8320207B2 (it)
IT (1) IT1397374B1 (it)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20120121309A (ko) * 2011-04-26 2012-11-05 에스케이하이닉스 주식회사 반도체메모리장치
US9332035B2 (en) 2013-10-10 2016-05-03 The Nielsen Company (Us), Llc Methods and apparatus to measure exposure to streaming media
CN104866332A (zh) * 2014-02-26 2015-08-26 华为终端有限公司 能力确定方法、能力配置方法、主机、终端设备及系统

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6216239B1 (en) * 1997-09-15 2001-04-10 Integrated Device Technology, Inc. Testing method and apparatus for identifying disturbed cells within a memory cell array
US6928593B1 (en) * 2000-09-18 2005-08-09 Intel Corporation Memory module and memory component built-in self test
CN100568395C (zh) * 2001-06-29 2009-12-09 Nxp股份有限公司 非易失性存储器和通过附加修改的空存储单元加速测试地址解码器的方法
CN101268541A (zh) * 2005-06-16 2008-09-17 Pdf全解公司 用于提高半导体成品率的测试单元

Also Published As

Publication number Publication date
US20110158016A1 (en) 2011-06-30
US8320207B2 (en) 2012-11-27
US8588018B2 (en) 2013-11-19
US20130077422A1 (en) 2013-03-28
ITMI20092356A1 (it) 2011-06-30

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