IT1301880B1 - Circuito elettronico di memoria e corrispondente metodo difabbricazione - Google Patents

Circuito elettronico di memoria e corrispondente metodo difabbricazione

Info

Publication number
IT1301880B1
IT1301880B1 IT1998MI001769A ITMI981769A IT1301880B1 IT 1301880 B1 IT1301880 B1 IT 1301880B1 IT 1998MI001769 A IT1998MI001769 A IT 1998MI001769A IT MI981769 A ITMI981769 A IT MI981769A IT 1301880 B1 IT1301880 B1 IT 1301880B1
Authority
IT
Italy
Prior art keywords
memory circuit
electronic memory
corresponding manufacturing
manufacturing
electronic
Prior art date
Application number
IT1998MI001769A
Other languages
English (en)
Inventor
Federico Pio
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to IT1998MI001769A priority Critical patent/IT1301880B1/it
Publication of ITMI981769A0 publication Critical patent/ITMI981769A0/it
Priority to US09/364,766 priority patent/US6215688B1/en
Publication of ITMI981769A1 publication Critical patent/ITMI981769A1/it
Application granted granted Critical
Publication of IT1301880B1 publication Critical patent/IT1301880B1/it
Priority to US09/779,956 priority patent/US6852596B2/en
Priority to US11/033,776 priority patent/US7601590B2/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0433—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Credit Cards Or The Like (AREA)
IT1998MI001769A 1998-07-30 1998-07-30 Circuito elettronico di memoria e corrispondente metodo difabbricazione IT1301880B1 (it)

Priority Applications (4)

Application Number Priority Date Filing Date Title
IT1998MI001769A IT1301880B1 (it) 1998-07-30 1998-07-30 Circuito elettronico di memoria e corrispondente metodo difabbricazione
US09/364,766 US6215688B1 (en) 1998-07-30 1999-07-30 Electronic memory circuit and related manufacturing method
US09/779,956 US6852596B2 (en) 1998-07-30 2001-02-09 Electronic memory circuit and related manufacturing method
US11/033,776 US7601590B2 (en) 1998-07-30 2005-01-12 Electronic memory circuit and related manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT1998MI001769A IT1301880B1 (it) 1998-07-30 1998-07-30 Circuito elettronico di memoria e corrispondente metodo difabbricazione

Publications (3)

Publication Number Publication Date
ITMI981769A0 ITMI981769A0 (it) 1998-07-30
ITMI981769A1 ITMI981769A1 (it) 2000-01-30
IT1301880B1 true IT1301880B1 (it) 2000-07-07

Family

ID=11380556

Family Applications (1)

Application Number Title Priority Date Filing Date
IT1998MI001769A IT1301880B1 (it) 1998-07-30 1998-07-30 Circuito elettronico di memoria e corrispondente metodo difabbricazione

Country Status (2)

Country Link
US (3) US6215688B1 (it)
IT (1) IT1301880B1 (it)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1301880B1 (it) * 1998-07-30 2000-07-07 St Microelectronics Srl Circuito elettronico di memoria e corrispondente metodo difabbricazione
US6313500B1 (en) * 1999-01-12 2001-11-06 Agere Systems Guardian Corp. Split gate memory cell
KR100355662B1 (ko) * 2001-08-25 2002-10-11 최웅림 반도체 비휘발성 메모리 및 어레이 그리고 그것의 동작 방법
KR100456541B1 (ko) * 2002-01-04 2004-11-09 삼성전자주식회사 비휘발성 메모리 소자 및 그 제조방법
JP3906177B2 (ja) * 2002-05-10 2007-04-18 株式会社東芝 不揮発性半導体記憶装置
KR100670504B1 (ko) 2005-09-14 2007-01-16 매그나칩 반도체 유한회사 비휘발성 메모리 소자 및 그의 제조방법
US8320191B2 (en) 2007-08-30 2012-11-27 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device
US20090114951A1 (en) * 2007-11-07 2009-05-07 Atmel Corporation Memory device
US8890230B2 (en) 2012-07-15 2014-11-18 United Microelectronics Corp. Semiconductor device
CN103579362B (zh) * 2012-07-30 2018-03-27 联华电子股份有限公司 半导体装置及其制作方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4380057A (en) 1980-10-27 1983-04-12 International Business Machines Corporation Electrically alterable double dense memory
US4379343A (en) 1980-11-28 1983-04-05 Hughes Aircraft Company Electrically erasable programmable read-only memory cell having a shared diffusion
JPS61256673A (ja) 1985-05-08 1986-11-14 Fujitsu Ltd 半導体装置
US5066992A (en) 1989-06-23 1991-11-19 Atmel Corporation Programmable and erasable MOS memory device
US5471423A (en) * 1993-05-17 1995-11-28 Nippon Steel Corporation Non-volatile semiconductor memory device
DE69305986T2 (de) * 1993-07-29 1997-03-06 Sgs Thomson Microelectronics Schaltungsstruktur für Speichermatrix und entsprechende Herstellungsverfahren
JPH08316438A (ja) * 1995-05-15 1996-11-29 Toshiba Corp 不揮発性半導体記憶装置
US5646886A (en) * 1995-05-24 1997-07-08 National Semiconductor Corporation Flash memory having segmented array for improved operation
JP2838993B2 (ja) * 1995-11-29 1998-12-16 日本電気株式会社 不揮発性半導体記憶装置
US5981340A (en) * 1997-09-29 1999-11-09 Motorola, Inc. Method of building an EPROM cell without drain disturb and reduced select gate resistance
US5986934A (en) * 1997-11-24 1999-11-16 Winbond Electronics Corp.I Semiconductor memory array with buried drain lines and methods therefor
IT1301880B1 (it) * 1998-07-30 2000-07-07 St Microelectronics Srl Circuito elettronico di memoria e corrispondente metodo difabbricazione
EP0996161A1 (en) * 1998-10-20 2000-04-26 STMicroelectronics S.r.l. EEPROM with common control gate and common source for two cells
US5982669A (en) * 1998-11-04 1999-11-09 National Semiconductor Corporation EPROM and flash memory cells with source-side injection

Also Published As

Publication number Publication date
US7601590B2 (en) 2009-10-13
US20010007536A1 (en) 2001-07-12
US20050122778A1 (en) 2005-06-09
US6852596B2 (en) 2005-02-08
ITMI981769A1 (it) 2000-01-30
US6215688B1 (en) 2001-04-10
ITMI981769A0 (it) 1998-07-30

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Legal Events

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0001 Granted