IT1301729B1 - Processo per il drogaggio selettivo di una fetta di materialesemiconduttore mediante impiantazione ionica. - Google Patents

Processo per il drogaggio selettivo di una fetta di materialesemiconduttore mediante impiantazione ionica.

Info

Publication number
IT1301729B1
IT1301729B1 IT1998MI001376A ITMI981376A IT1301729B1 IT 1301729 B1 IT1301729 B1 IT 1301729B1 IT 1998MI001376 A IT1998MI001376 A IT 1998MI001376A IT MI981376 A ITMI981376 A IT MI981376A IT 1301729 B1 IT1301729 B1 IT 1301729B1
Authority
IT
Italy
Prior art keywords
druging
slice
selective
semi
conductor materials
Prior art date
Application number
IT1998MI001376A
Other languages
English (en)
Inventor
Angelo Pinto
Sergio Palara
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to IT1998MI001376A priority Critical patent/IT1301729B1/it
Priority to US09/333,691 priority patent/US6284615B1/en
Publication of ITMI981376A1 publication Critical patent/ITMI981376A1/it
Application granted granted Critical
Publication of IT1301729B1 publication Critical patent/IT1301729B1/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H01L21/2652—Through-implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/2658—Bombardment with radiation with high-energy radiation producing ion implantation of a molecular ion, e.g. decaborane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26586—Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66272—Silicon vertical transistors
    • H01L29/66287—Silicon vertical transistors with a single crystalline emitter, collector or base including extrinsic, link or graft base formed on the silicon substrate, e.g. by epitaxy, recrystallisation, after insulating device isolation
IT1998MI001376A 1998-06-16 1998-06-16 Processo per il drogaggio selettivo di una fetta di materialesemiconduttore mediante impiantazione ionica. IT1301729B1 (it)

Priority Applications (2)

Application Number Priority Date Filing Date Title
IT1998MI001376A IT1301729B1 (it) 1998-06-16 1998-06-16 Processo per il drogaggio selettivo di una fetta di materialesemiconduttore mediante impiantazione ionica.
US09/333,691 US6284615B1 (en) 1998-06-16 1999-06-16 Method and apparatus for the selective doping of semiconductor material by ion implantation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT1998MI001376A IT1301729B1 (it) 1998-06-16 1998-06-16 Processo per il drogaggio selettivo di una fetta di materialesemiconduttore mediante impiantazione ionica.

Publications (2)

Publication Number Publication Date
ITMI981376A1 ITMI981376A1 (it) 1999-12-16
IT1301729B1 true IT1301729B1 (it) 2000-07-07

Family

ID=11380256

Family Applications (1)

Application Number Title Priority Date Filing Date
IT1998MI001376A IT1301729B1 (it) 1998-06-16 1998-06-16 Processo per il drogaggio selettivo di una fetta di materialesemiconduttore mediante impiantazione ionica.

Country Status (2)

Country Link
US (1) US6284615B1 (it)
IT (1) IT1301729B1 (it)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19845003C1 (de) * 1998-09-30 2000-02-10 Siemens Ag Vertikaler Feldeffekttransistor mit innenliegendem ringförmigen Gate und Herstellverfahren
JP2001237310A (ja) * 2000-02-23 2001-08-31 Seiko Epson Corp 半導体装置の製造方法
US6566204B1 (en) * 2000-03-31 2003-05-20 National Semiconductor Corporation Use of mask shadowing and angled implantation in fabricating asymmetrical field-effect transistors
US6680496B1 (en) * 2002-07-08 2004-01-20 Amberwave Systems Corp. Back-biasing to populate strained layer quantum wells
US7071014B2 (en) * 2002-10-30 2006-07-04 Amberwave Systems Corporation Methods for preserving strained semiconductor substrate layers during CMOS processing
JP2004235198A (ja) * 2003-01-28 2004-08-19 Renesas Technology Corp ラテラルトランジスタ

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5939906B2 (ja) * 1978-05-04 1984-09-27 超エル・エス・アイ技術研究組合 半導体装置の製造方法
US4624046A (en) * 1982-01-04 1986-11-25 Fairchild Camera & Instrument Corp. Oxide isolation process for standard RAM/PROM and lateral PNP cell RAM
US4717678A (en) * 1986-03-07 1988-01-05 International Business Machines Corporation Method of forming self-aligned P contact
US5183768A (en) * 1989-04-04 1993-02-02 Matsushita Electric Industrial Co., Ltd. Method of fabricating semiconductor device by forming doped regions that limit width of the base
JP2823393B2 (ja) * 1991-09-09 1998-11-11 シャープ株式会社 半導体メモリ素子及びその製造方法
JPH05226352A (ja) * 1992-02-17 1993-09-03 Mitsubishi Electric Corp 半導体装置及びその製造方法
US5213989A (en) * 1992-06-24 1993-05-25 Motorola, Inc. Method for forming a grown bipolar electrode contact using a sidewall seed
US5858845A (en) * 1994-09-27 1999-01-12 Micron Technology, Inc. Electrically conductive substrate interconnect continuity region and method of forming same with an angled implant
JPH07221041A (ja) * 1994-01-28 1995-08-18 Sony Corp 半導体装置の製造方法
US5444007A (en) * 1994-08-03 1995-08-22 Kabushiki Kaisha Toshiba Formation of trenches having different profiles
US5605849A (en) * 1994-10-07 1997-02-25 National Semiconductor Corporation Use of oblique implantation in forming base of bipolar transistor
EP0709894B1 (en) * 1994-10-28 2001-08-08 Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno High-frequency bipolar transistor structure, and related manufacturing process
US5593905A (en) * 1995-02-23 1997-01-14 Texas Instruments Incorporated Method of forming stacked barrier-diffusion source and etch stop for double polysilicon BJT with patterned base link
US5614422A (en) * 1995-03-17 1997-03-25 Harris Corporation Process for doping two levels of a double poly bipolar transistor after formation of second poly layer
US5719082A (en) * 1995-08-25 1998-02-17 Micron Technology, Inc. Angled implant to improve high current operation of bipolar transistors
EP0766295A1 (en) * 1995-09-29 1997-04-02 Co.Ri.M.Me. Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno Process for forming a high frequency bipolar transistor structure comprising an oblique implantation step
US5739058A (en) * 1995-12-14 1998-04-14 Micron Technology, Inc. Method to control threshold voltage by modifying implant dosage using variable aperture dopant implants
US6040208A (en) * 1997-08-29 2000-03-21 Micron Technology, Inc. Angled ion implantation for selective doping
US6043130A (en) * 1999-05-17 2000-03-28 National Semiconductor Corporation Process for forming bipolar transistor compatible with CMOS utilizing tilted ion implanted base

Also Published As

Publication number Publication date
US6284615B1 (en) 2001-09-04
ITMI981376A1 (it) 1999-12-16

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