IT1246754B - Circuito di lettura di celle eprom - Google Patents

Circuito di lettura di celle eprom

Info

Publication number
IT1246754B
IT1246754B IT02256890A IT2256890A IT1246754B IT 1246754 B IT1246754 B IT 1246754B IT 02256890 A IT02256890 A IT 02256890A IT 2256890 A IT2256890 A IT 2256890A IT 1246754 B IT1246754 B IT 1246754B
Authority
IT
Italy
Prior art keywords
reading circuit
eprom cell
cell reading
eprom
circuit
Prior art date
Application number
IT02256890A
Other languages
English (en)
Other versions
IT9022568A1 (it
IT9022568A0 (it
Inventor
Marco Dallabora
Corrado Villa
Original Assignee
Sgs Thomson Microelectronics
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Thomson Microelectronics filed Critical Sgs Thomson Microelectronics
Priority to IT02256890A priority Critical patent/IT1246754B/it
Publication of IT9022568A0 publication Critical patent/IT9022568A0/it
Priority to DE69125119T priority patent/DE69125119T2/de
Priority to EP91121675A priority patent/EP0492382B1/en
Priority to US07/810,480 priority patent/US5258959A/en
Priority to JP34604491A priority patent/JP3401024B2/ja
Priority to KR1019910025096A priority patent/KR920013466A/ko
Publication of IT9022568A1 publication Critical patent/IT9022568A1/it
Application granted granted Critical
Publication of IT1246754B publication Critical patent/IT1246754B/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G11C16/28—Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells
IT02256890A 1990-12-28 1990-12-28 Circuito di lettura di celle eprom IT1246754B (it)

Priority Applications (6)

Application Number Priority Date Filing Date Title
IT02256890A IT1246754B (it) 1990-12-28 1990-12-28 Circuito di lettura di celle eprom
DE69125119T DE69125119T2 (de) 1990-12-28 1991-12-18 EPROM-Zelleleseschaltung
EP91121675A EP0492382B1 (en) 1990-12-28 1991-12-18 EPROM cell reading circuit
US07/810,480 US5258959A (en) 1990-12-28 1991-12-19 Memory cell reading circuit
JP34604491A JP3401024B2 (ja) 1990-12-28 1991-12-27 Ｅｐｒｏｍセル読み取り回路及びその読み取り方法
KR1019910025096A KR920013466A (ko) 1990-12-28 1991-12-28 Eprom셀 판독 회로 및 방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT02256890A IT1246754B (it) 1990-12-28 1990-12-28 Circuito di lettura di celle eprom

Publications (3)

Publication Number Publication Date
IT9022568A0 IT9022568A0 (it) 1990-12-28
IT9022568A1 IT9022568A1 (it) 1992-06-29
IT1246754B true IT1246754B (it) 1994-11-26

Family

ID=11197936

Family Applications (1)

Application Number Title Priority Date Filing Date
IT02256890A IT1246754B (it) 1990-12-28 1990-12-28 Circuito di lettura di celle eprom

Country Status (6)

Country Link
US (1) US5258959A (it)
EP (1) EP0492382B1 (it)
JP (1) JP3401024B2 (it)
KR (1) KR920013466A (it)
DE (1) DE69125119T2 (it)
IT (1) IT1246754B (it)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3160316B2 (ja) * 1991-07-25 2001-04-25 株式会社東芝 不揮発性半導体記憶装置
JPH0612860A (ja) * 1992-06-29 1994-01-21 Toshiba Corp 半導体記憶装置
JPH0660677A (ja) * 1992-08-13 1994-03-04 Nippondenso Co Ltd 半導体メモリ用センスアンプ
JP2870328B2 (ja) * 1992-11-12 1999-03-17 日本電気株式会社 不揮発性半導体記憶装置
JPH06267283A (ja) * 1993-03-16 1994-09-22 Mitsubishi Electric Corp データ書き込み可能な読み出し専用メモリ及びそのデータ書き込み／読み出し方法
JP2765441B2 (ja) * 1993-07-26 1998-06-18 日本電気株式会社 半導体記憶集積回路
JP2835272B2 (ja) * 1993-12-21 1998-12-14 株式会社東芝 半導体記憶装置
FR2734390B1 (fr) * 1995-05-19 1997-06-13 Sgs Thomson Microelectronics Circuit de detection de courant pour la lecture d'une memoire en circuit integre
US5638322A (en) * 1995-07-19 1997-06-10 Cypress Semiconductor Corp. Apparatus and method for improving common mode noise rejection in pseudo-differential sense amplifiers
DE69633912D1 (de) * 1996-03-29 2004-12-30 St Microelectronics Srl Anordnung zum Generieren einer Spannung als Funktion der Leitfähigkeit einer Elementarzelle, insbesondere für nichtflüchtige Speicher
FR2762434B1 (fr) * 1997-04-16 1999-05-28 Sgs Thomson Microelectronics Circuit de lecture de memoire avec dispositif de limitation de precharge
EP0936627B1 (en) * 1998-02-13 2004-10-20 STMicroelectronics S.r.l. Low voltage non volatile memory sense amplifier
KR100355222B1 (ko) * 1998-12-28 2003-02-19 삼성전자 주식회사 빠른감지속도와높은전원전압마진을갖는전류감지증폭기
KR100308195B1 (ko) * 1999-09-30 2001-11-02 윤종용 반도체 메모리 장치의 감지 증폭기 회로
KR100360405B1 (ko) 2000-08-09 2002-11-13 삼성전자 주식회사 출력 안정도를 개선하는 반도체 장치의 데이터 출력용증폭 회로 및 이를 구비하는 반도체 장치
ITMI20011311A1 (it) * 2001-06-21 2002-12-21 St Microelectronics Srl Memoria con sistema di lettura differenziale perfezionato
KR100554829B1 (ko) * 2002-07-08 2006-02-22 주식회사 하이닉스반도체 센스증폭기
ITVA20040021A1 (it) * 2004-05-04 2004-08-04 St Microelectronics Srl Amplificatore di sensing per la lettura di una cella di memoria non volatile
US7352640B2 (en) * 2006-08-09 2008-04-01 Atmel Corporation High-speed, self-synchronized current sense amplifier
US7489574B2 (en) * 2007-06-15 2009-02-10 Ememory Technology Inc. Sensing circuit for memories

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS601713B2 (ja) * 1980-12-25 1985-01-17 株式会社東芝 ダイナミックメモリ装置
JPS6410493A (en) * 1987-07-02 1989-01-13 Mitsubishi Electric Corp Charge transfer type sense amplifier
JP2507529B2 (ja) * 1988-03-31 1996-06-12 株式会社東芝 不揮発性半導体記憶装置
US5062079A (en) * 1988-09-28 1991-10-29 Kabushiki Kaisha Toshiba MOS type random access memory with interference noise eliminator
JPH0713877B2 (ja) * 1988-10-19 1995-02-15 株式会社東芝 半導体メモリ

Also Published As

Publication number Publication date
DE69125119D1 (de) 1997-04-17
EP0492382A2 (en) 1992-07-01
US5258959A (en) 1993-11-02
JP3401024B2 (ja) 2003-04-28
JPH06131887A (ja) 1994-05-13
IT9022568A1 (it) 1992-06-29
KR920013466A (ko) 1992-07-29
EP0492382A3 (en) 1993-05-05
IT9022568A0 (it) 1990-12-28
DE69125119T2 (de) 1997-09-25
EP0492382B1 (en) 1997-03-12

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Legal Events

Date Code Title Description
0001 Granted
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19961227