IT1215538B - Componente elettrico a circuito piazzola di supporto per chip per integrato. - Google Patents

Componente elettrico a circuito piazzola di supporto per chip per integrato.

Info

Publication number
IT1215538B
IT1215538B IT8720766A IT2076687A IT1215538B IT 1215538 B IT1215538 B IT 1215538B IT 8720766 A IT8720766 A IT 8720766A IT 2076687 A IT2076687 A IT 2076687A IT 1215538 B IT1215538 B IT 1215538B
Authority
IT
Italy
Prior art keywords
electric component
integrated chip
circuit electric
pitch support
component pitch
Prior art date
Application number
IT8720766A
Other languages
English (en)
Other versions
IT8720766A0 (it
Inventor
Peter Wragg
Original Assignee
Sgs Microelettronica Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Microelettronica Spa filed Critical Sgs Microelettronica Spa
Priority to IT8720766A priority Critical patent/IT1215538B/it
Publication of IT8720766A0 publication Critical patent/IT8720766A0/it
Priority to EP88201014A priority patent/EP0293970A3/en
Priority to JP63128559A priority patent/JPS63310151A/ja
Application granted granted Critical
Publication of IT1215538B publication Critical patent/IT1215538B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3205—Shape
    • H01L2224/32057—Shape in side view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Die Bonding (AREA)
  • Wire Bonding (AREA)
IT8720766A 1987-06-03 1987-06-03 Componente elettrico a circuito piazzola di supporto per chip per integrato. IT1215538B (it)

Priority Applications (3)

Application Number Priority Date Filing Date Title
IT8720766A IT1215538B (it) 1987-06-03 1987-06-03 Componente elettrico a circuito piazzola di supporto per chip per integrato.
EP88201014A EP0293970A3 (en) 1987-06-03 1988-05-20 Pad for supporting a chip of an integrated-circuit electronic component
JP63128559A JPS63310151A (ja) 1987-06-03 1988-05-27 集積回路電子部品のチップの支持パッド

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8720766A IT1215538B (it) 1987-06-03 1987-06-03 Componente elettrico a circuito piazzola di supporto per chip per integrato.

Publications (2)

Publication Number Publication Date
IT8720766A0 IT8720766A0 (it) 1987-06-03
IT1215538B true IT1215538B (it) 1990-02-14

Family

ID=11171754

Family Applications (1)

Application Number Title Priority Date Filing Date
IT8720766A IT1215538B (it) 1987-06-03 1987-06-03 Componente elettrico a circuito piazzola di supporto per chip per integrato.

Country Status (3)

Country Link
EP (1) EP0293970A3 (it)
JP (1) JPS63310151A (it)
IT (1) IT1215538B (it)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0878605A (ja) * 1994-09-01 1996-03-22 Hitachi Ltd リードフレームおよびそれを用いた半導体集積回路装置
JP3384901B2 (ja) * 1995-02-02 2003-03-10 三菱電機株式会社 リードフレーム
JPH08236683A (ja) * 1995-02-28 1996-09-13 Nec Corp リードフレーム
JPH0992776A (ja) * 1995-09-28 1997-04-04 Mitsubishi Electric Corp リードフレームおよび半導体装置
US5818103A (en) * 1997-03-28 1998-10-06 Nec Corporation Semiconductor device mounted on a grooved head frame
WO2011142006A1 (ja) * 2010-05-12 2011-11-17 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0146330A3 (en) * 1983-12-12 1986-08-13 Texas Instruments Incorporated Integrated circuit device with textured bar pad
JPS6113650A (ja) * 1984-06-28 1986-01-21 Nec Corp 混成集積回路装置
JPS6116555A (ja) * 1984-07-03 1986-01-24 Hitachi Chem Co Ltd プラスチツク封止型半導体装置
JPS61184854A (ja) * 1985-02-13 1986-08-18 Oki Electric Ind Co Ltd 樹脂封止形半導体装置

Also Published As

Publication number Publication date
EP0293970A3 (en) 1989-04-26
IT8720766A0 (it) 1987-06-03
JPS63310151A (ja) 1988-12-19
EP0293970A2 (en) 1988-12-07

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Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970628