IT1191558B - Dispositivo a semiconduttore integrato di tipo mos con spessore dell'ossido di porta non uniforme e procedimento di fabbricazione dello stesso - Google Patents
Dispositivo a semiconduttore integrato di tipo mos con spessore dell'ossido di porta non uniforme e procedimento di fabbricazione dello stessoInfo
- Publication number
- IT1191558B IT1191558B IT83616/86A IT8361686A IT1191558B IT 1191558 B IT1191558 B IT 1191558B IT 83616/86 A IT83616/86 A IT 83616/86A IT 8361686 A IT8361686 A IT 8361686A IT 1191558 B IT1191558 B IT 1191558B
- Authority
- IT
- Italy
- Prior art keywords
- semiconductor device
- manufacturing procedure
- integrated semiconductor
- mos type
- oxide thickness
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823462—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Non-Volatile Memory (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IT83616/86A IT1191558B (it) | 1986-04-21 | 1986-04-21 | Dispositivo a semiconduttore integrato di tipo mos con spessore dell'ossido di porta non uniforme e procedimento di fabbricazione dello stesso |
| EP87830113A EP0244367A3 (en) | 1986-04-21 | 1987-03-25 | Mos type integrated semiconductor device with nonuniform thickness of gate oxide and process for fabricating it |
| JP62084494A JPS62252164A (ja) | 1986-04-21 | 1987-04-06 | 不均一な厚さのゲ−ト酸化物を有するｍｏｓタイプ集積半導体デバイス及びその製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IT83616/86A IT1191558B (it) | 1986-04-21 | 1986-04-21 | Dispositivo a semiconduttore integrato di tipo mos con spessore dell'ossido di porta non uniforme e procedimento di fabbricazione dello stesso |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| IT8683616A0 IT8683616A0 (it) | 1986-04-21 |
| IT1191558B true IT1191558B (it) | 1988-03-23 |
Family
ID=11323184
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IT83616/86A IT1191558B (it) | 1986-04-21 | 1986-04-21 | Dispositivo a semiconduttore integrato di tipo mos con spessore dell'ossido di porta non uniforme e procedimento di fabbricazione dello stesso |
Country Status (3)
| Country | Link |
|---|---|
| EP (1) | EP0244367A3 (it) |
| JP (1) | JPS62252164A (it) |
| IT (1) | IT1191558B (it) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR910005395B1 (ko) * | 1988-08-17 | 1991-07-29 | 삼성전관 주식회사 | Ccd형 고체촬영소자의 스미어 특성 측정장치 |
| JP2596117B2 (ja) * | 1989-03-09 | 1997-04-02 | 富士電機株式会社 | 半導体集積回路の製造方法 |
| IT1252025B (it) * | 1991-11-29 | 1995-05-27 | Sgs Thomson Microelectronics | Procedimento per la realizzazione di celle di memoria a sola lettura programmabili e cancellabili elettricamente a singolo livello di polisilicio |
| EP0610643B1 (en) * | 1993-02-11 | 1997-09-10 | STMicroelectronics S.r.l. | EEPROM cell and peripheral MOS transistor |
| JP3163839B2 (ja) * | 1993-05-20 | 2001-05-08 | 富士電機株式会社 | 半導体集積回路 |
| US5595922A (en) * | 1994-10-28 | 1997-01-21 | Texas Instruments | Process for thickening selective gate oxide regions |
| JPH10308497A (ja) * | 1997-05-08 | 1998-11-17 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
| JP2000003965A (ja) * | 1998-06-15 | 2000-01-07 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
| JP2000315733A (ja) * | 1999-04-28 | 2000-11-14 | Fujitsu Ltd | 多電源半導体装置の製造方法 |
| US7184315B2 (en) * | 2003-11-04 | 2007-02-27 | Micron Technology, Inc. | NROM flash memory with self-aligned structural charge separation |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5713772A (en) * | 1980-06-30 | 1982-01-23 | Hitachi Ltd | Semiconductor device and manufacture thereof |
-
1986
- 1986-04-21 IT IT83616/86A patent/IT1191558B/it active
-
1987
- 1987-03-25 EP EP87830113A patent/EP0244367A3/en not_active Withdrawn
- 1987-04-06 JP JP62084494A patent/JPS62252164A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| EP0244367A2 (en) | 1987-11-04 |
| JPS62252164A (ja) | 1987-11-02 |
| IT8683616A0 (it) | 1986-04-21 |
| EP0244367A3 (en) | 1989-06-14 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19970429 |