IT1190294B - Una struttura di fotopolimero a multistrati (mlr) per la fabbricazione di dispositivi mesfet con gate submicrometrico e con canale incassato (recesse) di lunghezza variabile - Google Patents
Una struttura di fotopolimero a multistrati (mlr) per la fabbricazione di dispositivi mesfet con gate submicrometrico e con canale incassato (recesse) di lunghezza variabileInfo
- Publication number
- IT1190294B IT1190294B IT47648/86A IT4764886A IT1190294B IT 1190294 B IT1190294 B IT 1190294B IT 47648/86 A IT47648/86 A IT 47648/86A IT 4764886 A IT4764886 A IT 4764886A IT 1190294 B IT1190294 B IT 1190294B
- Authority
- IT
- Italy
- Prior art keywords
- submicrometric
- mlr
- gates
- recess
- manufacture
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66848—Unipolar field-effect transistors with a Schottky gate, i.e. MESFET
- H01L29/66856—Unipolar field-effect transistors with a Schottky gate, i.e. MESFET with an active layer made of a group 13/15 material
- H01L29/66863—Lateral single gate transistors
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/004—Photosensitive materials
- G03F7/09—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
- G03F7/094—Multilayer resist systems, e.g. planarising layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0272—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers for lift-off processes
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
- Y10S438/948—Radiation resist
- Y10S438/95—Multilayer mask including nonradiation sensitive layer
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Architecture (AREA)
- Structural Engineering (AREA)
- Junction Field-Effect Transistors (AREA)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT47648/86A IT1190294B (it) | 1986-02-13 | 1986-02-13 | Una struttura di fotopolimero a multistrati (mlr) per la fabbricazione di dispositivi mesfet con gate submicrometrico e con canale incassato (recesse) di lunghezza variabile |
EP87101800A EP0232894A3 (en) | 1986-02-13 | 1987-02-10 | Multi layer photopolymeric structure for the manufacturing of mesfet devices with submicrometric gate and variable length recessed channel |
US07/376,963 US5130764A (en) | 1986-02-13 | 1989-07-06 | Multi layer photopolymeric structure for the manufacturing of mesfet devices with submicrometric gate and variable length recessed channel |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT47648/86A IT1190294B (it) | 1986-02-13 | 1986-02-13 | Una struttura di fotopolimero a multistrati (mlr) per la fabbricazione di dispositivi mesfet con gate submicrometrico e con canale incassato (recesse) di lunghezza variabile |
Publications (2)
Publication Number | Publication Date |
---|---|
IT8647648A0 IT8647648A0 (it) | 1986-02-13 |
IT1190294B true IT1190294B (it) | 1988-02-16 |
Family
ID=11261663
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT47648/86A IT1190294B (it) | 1986-02-13 | 1986-02-13 | Una struttura di fotopolimero a multistrati (mlr) per la fabbricazione di dispositivi mesfet con gate submicrometrico e con canale incassato (recesse) di lunghezza variabile |
Country Status (3)
Country | Link |
---|---|
US (1) | US5130764A (it) |
EP (1) | EP0232894A3 (it) |
IT (1) | IT1190294B (it) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0366939A3 (en) * | 1988-11-01 | 1990-12-27 | Hewlett-Packard Company | A process for forming a schottky barrier gate on gallium-arsenide |
JPH0355852A (ja) * | 1989-07-25 | 1991-03-11 | Sony Corp | 半導体装置の製造方法 |
EP0592064B1 (en) * | 1992-08-19 | 1998-09-23 | Mitsubishi Denki Kabushiki Kaisha | Method of producing a field effect transistor |
US5357397A (en) * | 1993-03-15 | 1994-10-18 | Hewlett-Packard Company | Electric field emitter device for electrostatic discharge protection of integrated circuits |
JPH06326297A (ja) * | 1993-03-19 | 1994-11-25 | Nec Corp | 半導体装置 |
US5436201A (en) * | 1993-05-28 | 1995-07-25 | Hughes Aircraft Company | Dual etchant process, particularly for gate recess fabrication in GaAs MMIC chips |
KR100214467B1 (ko) * | 1995-12-29 | 1999-08-02 | 구본준 | 반도체소자의 배선구조 형성방법 |
DE19717363C2 (de) * | 1997-04-24 | 2001-09-06 | Siemens Ag | Herstellverfahren für eine Platinmetall-Struktur mittels eines Lift-off-Prozesses und Verwendung des Herstellverfahrens |
GB0127075D0 (en) | 2001-11-10 | 2002-01-02 | Trikon Holdings Ltd | Method of forming a patterned metal layer |
DE10297185T5 (de) * | 2001-11-10 | 2004-10-07 | Trikon Holdings Ltd | Verfahren zur Ausbildung einer gemusterten Metallschicht |
US20060009038A1 (en) * | 2004-07-12 | 2006-01-12 | International Business Machines Corporation | Processing for overcoming extreme topography |
US20140093688A1 (en) * | 2012-09-28 | 2014-04-03 | Yindar Chuo | Method for fabrication of nano-structures |
WO2017134545A1 (en) * | 2016-02-01 | 2017-08-10 | King Abdullah University Of Science And Technology | Hybrid mask for deep etching |
JP2019120500A (ja) * | 2017-12-28 | 2019-07-22 | 株式会社ミツトヨ | スケールおよびその製造方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3669661A (en) * | 1970-03-06 | 1972-06-13 | Westinghouse Electric Corp | Method of producing thin film transistors |
US4218532A (en) * | 1977-10-13 | 1980-08-19 | Bell Telephone Laboratories, Incorporated | Photolithographic technique for depositing thin films |
US4336549A (en) * | 1978-02-21 | 1982-06-22 | Hughes Aircraft Company | Schottky-barrier gate gallium arsenide field effect devices |
US4196439A (en) * | 1978-07-03 | 1980-04-01 | Bell Telephone Laboratories, Incorporated | Semiconductor device drain contact configuration |
US4213840A (en) * | 1978-11-13 | 1980-07-22 | Avantek, Inc. | Low-resistance, fine-line semiconductor device and the method for its manufacture |
JPS5952881A (ja) * | 1982-09-21 | 1984-03-27 | Fujitsu Ltd | 電界効果型半導体装置の製造方法 |
JPS59175773A (ja) * | 1983-03-26 | 1984-10-04 | Mitsubishi Electric Corp | 電界効果トランジスタ |
US4533624A (en) * | 1983-05-23 | 1985-08-06 | Sperry Corporation | Method of forming a low temperature multilayer photoresist lift-off pattern |
US4618510A (en) * | 1984-09-05 | 1986-10-21 | Hewlett Packard Company | Pre-passivated sub-micrometer gate electrodes for MESFET devices |
US4612275A (en) * | 1985-04-26 | 1986-09-16 | International Business Machines Corporation | Multilayer resists with improved sensitivity and reduced proximity effect |
-
1986
- 1986-02-13 IT IT47648/86A patent/IT1190294B/it active
-
1987
- 1987-02-10 EP EP87101800A patent/EP0232894A3/en not_active Withdrawn
-
1989
- 1989-07-06 US US07/376,963 patent/US5130764A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US5130764A (en) | 1992-07-14 |
IT8647648A0 (it) | 1986-02-13 |
EP0232894A2 (en) | 1987-08-19 |
EP0232894A3 (en) | 1990-02-07 |
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