IT1186413B - Generatore di indirizzi per la memorizzazione e il reperimento di dati diagnostici - Google Patents

Generatore di indirizzi per la memorizzazione e il reperimento di dati diagnostici

Info

Publication number
IT1186413B
IT1186413B IT2313185A IT2313185A IT1186413B IT 1186413 B IT1186413 B IT 1186413B IT 2313185 A IT2313185 A IT 2313185A IT 2313185 A IT2313185 A IT 2313185A IT 1186413 B IT1186413 B IT 1186413B
Authority
IT
Italy
Prior art keywords
address signals
computer
counter
address
address generator
Prior art date
Application number
IT2313185A
Other languages
English (en)
Other versions
IT8523131A0 (it
Inventor
Robert J Abrant
Michael D Martys
George K Tarleton
Original Assignee
Gte Communication Syst
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gte Communication Syst filed Critical Gte Communication Syst
Publication of IT8523131A0 publication Critical patent/IT8523131A0/it
Application granted granted Critical
Publication of IT1186413B publication Critical patent/IT1186413B/it

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0766—Error or fault reporting or storing
    • G06F11/0772—Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/073—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a memory management context, e.g. virtual memory or cache management
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
    • G11C29/20—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits using counters or linear-feedback shift registers [LFSR]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
IT2313185A 1984-12-31 1985-12-06 Generatore di indirizzi per la memorizzazione e il reperimento di dati diagnostici IT1186413B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/687,786 US4740914A (en) 1984-12-31 1984-12-31 Address generator

Publications (2)

Publication Number Publication Date
IT8523131A0 IT8523131A0 (it) 1985-12-06
IT1186413B true IT1186413B (it) 1987-11-26

Family

ID=24761834

Family Applications (1)

Application Number Title Priority Date Filing Date
IT2313185A IT1186413B (it) 1984-12-31 1985-12-06 Generatore di indirizzi per la memorizzazione e il reperimento di dati diagnostici

Country Status (4)

Country Link
US (1) US4740914A (it)
BE (1) BE903899A (it)
CA (1) CA1240397A (it)
IT (1) IT1186413B (it)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4835738A (en) * 1986-03-31 1989-05-30 Texas Instruments Incorporated Register stack for a bit slice processor microsequencer
US5619675A (en) * 1994-06-14 1997-04-08 Storage Technology Corporation Method and apparatus for cache memory management using a two level scheme including a bit mapped cache buffer history table and circular cache buffer list
US5774745A (en) * 1995-03-31 1998-06-30 Cirrus Logic, Inc. Method and apparatus for writing and reading entries in an event status queue of a host memory
JP4896839B2 (ja) * 2007-08-31 2012-03-14 ルネサスエレクトロニクス株式会社 マイクロプロセッサおよびデータ処理方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3895357A (en) * 1973-02-23 1975-07-15 Ibm Buffer memory arrangement for a digital television display system
US4016543A (en) * 1975-02-10 1977-04-05 Formation, Inc. Processor address recall system
JPS5255446A (en) * 1975-10-31 1977-05-06 Toshiba Corp Information transfer control system
US4176394A (en) * 1977-06-13 1979-11-27 Sperry Rand Corporation Apparatus for maintaining a history of the most recently executed instructions in a digital computer
US4354229A (en) * 1980-03-10 1982-10-12 International Business Machines Corporation Loop initialization mechanism for a peer-to-peer communication system
JPS59103169A (ja) * 1982-12-03 1984-06-14 Matsushita Electric Ind Co Ltd デジタル信号処理装置
US4570161A (en) * 1983-08-16 1986-02-11 International Business Machines Corporation Raster scan digital display system
US4628477A (en) * 1983-10-17 1986-12-09 Sanders Associates, Inc. Programmable push-pop memory stack

Also Published As

Publication number Publication date
IT8523131A0 (it) 1985-12-06
CA1240397A (en) 1988-08-09
US4740914A (en) 1988-04-26
BE903899A (fr) 1986-04-16

Similar Documents

Publication Publication Date Title
KR840001368A (ko) 데이타 처리 시스템에서의 선택적 캐쉬 클리어링 방법과 장치
DE3687307D1 (de) Computeranordnungen mit cache-speichern.
SE8402598L (sv) Databehandlingssystem
ATE186133T1 (de) Sequentieller speicherzugriff
ATE58441T1 (de) Datenverarbeitungssystem.
KR890003688B1 (en) Buffer-storage control system
DE3485784D1 (de) Datenuebertragungssystem.
EP0285346A3 (en) Cache memory device
EP0398189A3 (en) Noncacheable address random access memory
IT1186413B (it) Generatore di indirizzi per la memorizzazione e il reperimento di dati diagnostici
SE8104981L (sv) Metod och anordning for adressering av ett minne
JPS55157052A (en) Disc cash control system
ATE62764T1 (de) Cache-kohaerenz-anordnung.
JPS558628A (en) Data processing system
ES2038928A2 (es) Sistema de tratamiento de acceso en procesador de informacion.
JPS55108996A (en) Memory test system
JPS6451545A (en) Memory interference detector
JPS5727478A (en) Buffer memory control system
JPS5552598A (en) Data processor
JPS56159747A (en) Program testing device
JPS57100695A (en) Address check system for segment
JPS5730195A (en) Data processor
JPS5447446A (en) Magnetic disc control unit
JPS5448128A (en) Buffer memory unit
JPS5729164A (en) Computer system