ATE62764T1 - Cache-kohaerenz-anordnung. - Google Patents
Cache-kohaerenz-anordnung.Info
- Publication number
- ATE62764T1 ATE62764T1 AT85300859T AT85300859T ATE62764T1 AT E62764 T1 ATE62764 T1 AT E62764T1 AT 85300859 T AT85300859 T AT 85300859T AT 85300859 T AT85300859 T AT 85300859T AT E62764 T1 ATE62764 T1 AT E62764T1
- Authority
- AT
- Austria
- Prior art keywords
- cache
- memory
- storage locations
- data processors
- cit
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0815—Cache consistency protocols
- G06F12/0831—Cache consistency protocols using a bus scheme, e.g. with bus monitoring or watching means
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0815—Cache consistency protocols
- G06F12/0817—Cache consistency protocols using directory methods
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US57908784A | 1984-02-10 | 1984-02-10 | |
EP85300859A EP0153109B1 (de) | 1984-02-10 | 1985-02-08 | Cache-Kohärenz-Anordnung |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE62764T1 true ATE62764T1 (de) | 1991-05-15 |
Family
ID=24315509
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT85300859T ATE62764T1 (de) | 1984-02-10 | 1985-02-08 | Cache-kohaerenz-anordnung. |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP0153109B1 (de) |
JP (1) | JPS60237553A (de) |
AT (1) | ATE62764T1 (de) |
CA (1) | CA1226959A (de) |
DE (1) | DE3582506D1 (de) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4825360A (en) * | 1986-07-30 | 1989-04-25 | Symbolics, Inc. | System and method for parallel processing with mostly functional languages |
US5045996A (en) * | 1986-11-12 | 1991-09-03 | Xerox Corporation | Multiprocessor cache memory housekeeping |
GB2216308A (en) * | 1988-03-01 | 1989-10-04 | Ardent Computer Corp | Maintaining cache consistency |
JPH03505793A (ja) * | 1988-07-04 | 1991-12-12 | スウェーディッシュ インスティテュート オブ コンピューター サイエンス | 階層構造を有するキャッシュメモリシステムを含むマルチプロセッサシステム |
EP0366323A3 (de) * | 1988-10-28 | 1991-09-18 | Apollo Computer Inc. | Warteschlange zur Duplikatetikettenspeicherinvalidation |
US5197146A (en) * | 1989-06-21 | 1993-03-23 | Hewlett-Packard Company | Method for maintaining cache coherence in a multiprocessor computer system |
US5724549A (en) * | 1992-04-06 | 1998-03-03 | Cyrix Corporation | Cache coherency without bus master arbitration signals |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5440182B2 (de) * | 1974-02-26 | 1979-12-01 | ||
US4142234A (en) * | 1977-11-28 | 1979-02-27 | International Business Machines Corporation | Bias filter memory for filtering out unnecessary interrogations of cache directories in a multiprocessor system |
US4322795A (en) * | 1980-01-24 | 1982-03-30 | Honeywell Information Systems Inc. | Cache memory utilizing selective clearing and least recently used updating |
US4410944A (en) * | 1981-03-24 | 1983-10-18 | Burroughs Corporation | Apparatus and method for maintaining cache memory integrity in a shared memory environment |
-
1985
- 1985-02-08 AT AT85300859T patent/ATE62764T1/de not_active IP Right Cessation
- 1985-02-08 JP JP60022123A patent/JPS60237553A/ja active Pending
- 1985-02-08 DE DE8585300859T patent/DE3582506D1/de not_active Expired - Fee Related
- 1985-02-08 EP EP85300859A patent/EP0153109B1/de not_active Expired - Lifetime
- 1985-02-08 CA CA000473957A patent/CA1226959A/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
EP0153109A3 (en) | 1987-09-30 |
EP0153109B1 (de) | 1991-04-17 |
DE3582506D1 (de) | 1991-05-23 |
CA1226959A (en) | 1987-09-15 |
EP0153109A2 (de) | 1985-08-28 |
JPS60237553A (ja) | 1985-11-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |