JPS6451545A - Memory interference detector - Google Patents

Memory interference detector

Info

Publication number
JPS6451545A
JPS6451545A JP62208680A JP20868087A JPS6451545A JP S6451545 A JPS6451545 A JP S6451545A JP 62208680 A JP62208680 A JP 62208680A JP 20868087 A JP20868087 A JP 20868087A JP S6451545 A JPS6451545 A JP S6451545A
Authority
JP
Japan
Prior art keywords
parts
bits
outputted
control part
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62208680A
Other languages
Japanese (ja)
Other versions
JPH0740245B2 (en
Inventor
Tokuzo Kiyohara
Masashi Deguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62208680A priority Critical patent/JPH0740245B2/en
Publication of JPS6451545A publication Critical patent/JPS6451545A/en
Publication of JPH0740245B2 publication Critical patent/JPH0740245B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE:To detect memory interference in plural addresses by using a cache memory to which attributive information representing memory interference is added. CONSTITUTION:Low-order numeral bits in an input address bus 1 are connected to tag parts 2a, 2b, valid bit parts 3a, 3b, wait bit parts 4a, 4b, and data parts 5a, 5b as indices, and used for selecting information therein stored. In the tag parts 2a, 2b, the high-order bits in a target address are read out, which are compared with the high-order bits in the input address bus 1, and a coincidence information resulted from this comparison is assumed as EQ0, EQ1 and outputted to a control part 6. In the valid bit parts 3a, 3b, the valid bits in a target address, and outputted to the control part 6 as V0, V1. In the wait bit parts 4a, 4b, the wait bits of a targeted address is read, and outputted to the control part 6 as W0, W1. At the time of outputting cache-hit, data read out by the data parts 5a, 5b is selected by a selector 7, and outputted to an output data bus 8.
JP62208680A 1987-08-21 1987-08-21 Memory interference detector Expired - Lifetime JPH0740245B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62208680A JPH0740245B2 (en) 1987-08-21 1987-08-21 Memory interference detector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62208680A JPH0740245B2 (en) 1987-08-21 1987-08-21 Memory interference detector

Publications (2)

Publication Number Publication Date
JPS6451545A true JPS6451545A (en) 1989-02-27
JPH0740245B2 JPH0740245B2 (en) 1995-05-01

Family

ID=16560287

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62208680A Expired - Lifetime JPH0740245B2 (en) 1987-08-21 1987-08-21 Memory interference detector

Country Status (1)

Country Link
JP (1) JPH0740245B2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55146682A (en) * 1979-05-01 1980-11-15 Nec Corp Data transfer system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55146682A (en) * 1979-05-01 1980-11-15 Nec Corp Data transfer system

Also Published As

Publication number Publication date
JPH0740245B2 (en) 1995-05-01

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