IT1099314B - Memoria di solo lettura integrata - Google Patents

Memoria di solo lettura integrata

Info

Publication number
IT1099314B
IT1099314B IT27164/78A IT2716478A IT1099314B IT 1099314 B IT1099314 B IT 1099314B IT 27164/78 A IT27164/78 A IT 27164/78A IT 2716478 A IT2716478 A IT 2716478A IT 1099314 B IT1099314 B IT 1099314B
Authority
IT
Italy
Prior art keywords
memory
integrated read
read
integrated
Prior art date
Application number
IT27164/78A
Other languages
English (en)
Other versions
IT7827164A0 (it
Original Assignee
Western Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co filed Critical Western Electric Co
Publication of IT7827164A0 publication Critical patent/IT7827164A0/it
Application granted granted Critical
Publication of IT1099314B publication Critical patent/IT1099314B/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
IT27164/78A 1977-08-31 1978-08-30 Memoria di solo lettura integrata IT1099314B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/829,570 US4139907A (en) 1977-08-31 1977-08-31 Integrated read only memory

Publications (2)

Publication Number Publication Date
IT7827164A0 IT7827164A0 (it) 1978-08-30
IT1099314B true IT1099314B (it) 1985-09-18

Family

ID=25254888

Family Applications (1)

Application Number Title Priority Date Filing Date
IT27164/78A IT1099314B (it) 1977-08-31 1978-08-30 Memoria di solo lettura integrata

Country Status (7)

Country Link
US (1) US4139907A (it)
EP (1) EP0001164B1 (it)
JP (1) JPS5812678B2 (it)
CA (1) CA1118099A (it)
DE (1) DE2861509D1 (it)
ES (1) ES473001A1 (it)
IT (1) IT1099314B (it)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2545047C3 (de) * 1975-10-08 1978-09-21 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Verfahren zur Herstellung eines Halbleiterfestwertspeichers
JPS55163859A (en) * 1979-06-07 1980-12-20 Fujitsu Ltd Manufacture of semiconductor device
US4318014A (en) * 1979-07-27 1982-03-02 Motorola, Inc. Selective precharge circuit for read-only-memory
US4356413A (en) * 1980-08-20 1982-10-26 Ibm Corporation MOSFET Convolved logic
EP0232796B1 (en) * 1980-11-24 1991-07-03 Texas Instruments Incorporated Pseudo-microprogramming in microprocessor with compressed control rom and with strip layout of busses, alu and registers
US4402043A (en) * 1980-11-24 1983-08-30 Texas Instruments Incorporated Microprocessor with compressed control ROM
DE3824823A1 (de) * 1988-07-21 1990-01-25 Langer Ruth Geb Layher Anschlussausbildung fuer horizontaltraeger von geruestboeden
DE102013004974A1 (de) * 2013-03-21 2014-09-25 Infineon Technologies Ag Integrierte Schaltungsanordnung, Verfahren und System zum Einsatz in einer sicherheitskritischen Anwendung

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB981104A (en) * 1963-01-10 1965-01-20 Standard Telephones Cables Ltd Improvements in or relating to logical circuit assemblies
GB1101851A (en) * 1965-01-20 1968-01-31 Ncr Co Generalized logic circuitry
US3541543A (en) * 1966-07-25 1970-11-17 Texas Instruments Inc Binary decoder
US3529299A (en) * 1966-10-21 1970-09-15 Texas Instruments Inc Programmable high-speed read-only memory devices
US3721964A (en) * 1970-02-18 1973-03-20 Hewlett Packard Co Integrated circuit read only memory bit organized in coincident select structure
GB1300301A (en) * 1970-04-20 1972-12-20 Gen Instr Microelect Read-only memories
GB1348361A (en) * 1971-05-05 1974-03-13 Mo Lesotekhnichesky I Read-only memory
US3849638A (en) * 1973-07-18 1974-11-19 Gen Electric Segmented associative logic circuits
JPS5732438B2 (it) * 1973-07-27 1982-07-10
US3987287A (en) * 1974-12-30 1976-10-19 International Business Machines Corporation High density logic array
US3936812A (en) * 1974-12-30 1976-02-03 Ibm Corporation Segmented parallel rail paths for input/output signals
US3975623A (en) * 1974-12-30 1976-08-17 Ibm Corporation Logic array with multiple readout tables

Also Published As

Publication number Publication date
EP0001164B1 (en) 1982-01-06
DE2861509D1 (en) 1982-02-25
IT7827164A0 (it) 1978-08-30
ES473001A1 (es) 1979-10-16
JPS5812678B2 (ja) 1983-03-09
CA1118099A (en) 1982-02-09
JPS5447534A (en) 1979-04-14
US4139907A (en) 1979-02-13
EP0001164A1 (en) 1979-03-21

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