IT1085067B - Metodo di fabbricazione di un dispositivo semiconduttore e dispositivo semiconduttore fabbricato con l'ausilio di tale metodo - Google Patents

Metodo di fabbricazione di un dispositivo semiconduttore e dispositivo semiconduttore fabbricato con l'ausilio di tale metodo

Info

Publication number
IT1085067B
IT1085067B IT23301/77A IT2330177A IT1085067B IT 1085067 B IT1085067 B IT 1085067B IT 23301/77 A IT23301/77 A IT 23301/77A IT 2330177 A IT2330177 A IT 2330177A IT 1085067 B IT1085067 B IT 1085067B
Authority
IT
Italy
Prior art keywords
semiconductive device
aid
manufacture
device manufactured
manufactured
Prior art date
Application number
IT23301/77A
Other languages
English (en)
Italian (it)
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Application granted granted Critical
Publication of IT1085067B publication Critical patent/IT1085067B/it

Links

Classifications

    • H10W74/43—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0181—Manufacturing their gate insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H10P32/141—
    • H10P32/171—
    • H10P95/00—
    • H10W20/40—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/053—Field effect transistors fets
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/116—Oxidation, differential
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/141—Self-alignment coat gate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/143—Shadow masking
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/914—Doping
    • Y10S438/92—Controlling diffusion profile by oxidation
IT23301/77A 1976-05-11 1977-05-06 Metodo di fabbricazione di un dispositivo semiconduttore e dispositivo semiconduttore fabbricato con l'ausilio di tale metodo IT1085067B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7604986A NL7604986A (nl) 1976-05-11 1976-05-11 Werkwijze voor het vervaardigen van een halfgeleider- inrichting, en inrichting vervaardigd door toe- passing van de werkwijze.

Publications (1)

Publication Number Publication Date
IT1085067B true IT1085067B (it) 1985-05-28

Family

ID=19826163

Family Applications (1)

Application Number Title Priority Date Filing Date
IT23301/77A IT1085067B (it) 1976-05-11 1977-05-06 Metodo di fabbricazione di un dispositivo semiconduttore e dispositivo semiconduttore fabbricato con l'ausilio di tale metodo

Country Status (11)

Country Link
US (1) US4139402A (enExample)
JP (1) JPS5850015B2 (enExample)
AU (1) AU508451B2 (enExample)
CA (1) CA1086868A (enExample)
CH (1) CH615781A5 (enExample)
DE (1) DE2718894C2 (enExample)
FR (1) FR2351501A1 (enExample)
GB (1) GB1523246A (enExample)
IT (1) IT1085067B (enExample)
NL (1) NL7604986A (enExample)
SE (1) SE429175B (enExample)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4217149A (en) * 1976-09-08 1980-08-12 Sanyo Electric Co., Ltd. Method of manufacturing complementary insulated gate field effect semiconductor device by multiple implantations and diffusion
US4277881A (en) * 1978-05-26 1981-07-14 Rockwell International Corporation Process for fabrication of high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting lines
US4506437A (en) * 1978-05-26 1985-03-26 Rockwell International Corporation Process for and structure of high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting lines
US4455737A (en) * 1978-05-26 1984-06-26 Rockwell International Corporation Process for and structure of high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting lines
DE2936724A1 (de) * 1978-09-11 1980-03-20 Tokyo Shibaura Electric Co Halbleitervorrichtung und verfahren zu ihrer herstellung
JPS5555559A (en) * 1978-10-19 1980-04-23 Toshiba Corp Method of fabricating semiconductor device
US4305760A (en) * 1978-12-22 1981-12-15 Ncr Corporation Polysilicon-to-substrate contact processing
US4306916A (en) * 1979-09-20 1981-12-22 American Microsystems, Inc. CMOS P-Well selective implant method
US4295897B1 (en) * 1979-10-03 1997-09-09 Texas Instruments Inc Method of making cmos integrated circuit device
DE3037316C2 (de) * 1979-10-03 1982-12-23 Tokyo Shibaura Denki K.K., Kawasaki, Kanagawa Verfahren zur Herstellung von Leistungsthyristoren
US4404737A (en) * 1979-11-29 1983-09-20 Tokyo Shibaura Denki Kabushiki Kaisha Method for manufacturing a semiconductor integrated circuit utilizing polycrystalline silicon deposition, oxidation and etching
US4345366A (en) * 1980-10-20 1982-08-24 Ncr Corporation Self-aligned all-n+ polysilicon CMOS process
US4391650A (en) * 1980-12-22 1983-07-05 Ncr Corporation Method for fabricating improved complementary metal oxide semiconductor devices
NL187328C (nl) * 1980-12-23 1991-08-16 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting.
AT387474B (de) * 1980-12-23 1989-01-25 Philips Nv Verfahren zur herstellung einer halbleitervorrichtung
DE3132809A1 (de) * 1981-08-19 1983-03-10 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von integrierten mos-feldeffekttransistoren, insbesondere von komplementaeren mos-feldeffekttransistorenschaltungen mit einer aus metallsiliziden bestehenden zusaetzlichen leiterbahnebene
DE3133468A1 (de) * 1981-08-25 1983-03-17 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von hochintegrierten komplementaeren mos-feldeffekttransistorschaltungen in siliziumgate-technologie
US4486943A (en) * 1981-12-16 1984-12-11 Inmos Corporation Zero drain overlap and self aligned contact method for MOS devices
US4412375A (en) * 1982-06-10 1983-11-01 Intel Corporation Method for fabricating CMOS devices with guardband
US4532695A (en) * 1982-07-02 1985-08-06 The United States Of America As Represented By The Secretary Of The Air Force Method of making self-aligned IGFET
US4480375A (en) * 1982-12-09 1984-11-06 International Business Machines Corporation Simple process for making complementary transistors
DE3314450A1 (de) * 1983-04-21 1984-10-25 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von hochintegrierten komplementaeren mos-feldeffekttransistorschaltungen
US4584761A (en) * 1984-05-15 1986-04-29 Digital Equipment Corporation Integrated circuit chip processing techniques and integrated chip produced thereby
US4760033A (en) * 1986-04-08 1988-07-26 Siemens Aktiengesellschaft Method for the manufacture of complementary MOS field effect transistors in VLSI technology
ES2084606T3 (es) * 1988-12-21 1996-05-16 At & T Corp Procedimiento de oxidacion termica de crecimiento modificado para oxidos delgados.
JP3256048B2 (ja) * 1993-09-20 2002-02-12 富士通株式会社 半導体装置及びその製造方法
DE4404757C2 (de) * 1994-02-15 1998-08-20 Siemens Ag Verfahren zur Herstellung eines einem Graben benachbarten Diffusionsgebietes in einem Substrat
US7851339B2 (en) * 2008-05-29 2010-12-14 Promos Technologies Pte. Ltd. Method of repairing deep subsurface defects in a silicon substrate that includes diffusing negatively charged ions into the substrate from a sacrificial oxide layer
US9000525B2 (en) 2010-05-19 2015-04-07 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method for alignment marks
US20140264557A1 (en) * 2013-03-15 2014-09-18 International Business Machines Corporation Self-aligned approach for drain diffusion in field effect transistors

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3312577A (en) * 1964-11-24 1967-04-04 Int Standard Electric Corp Process for passivating planar semiconductor devices
US3418180A (en) * 1965-06-14 1968-12-24 Ncr Co p-n junction formation by thermal oxydation
US3507716A (en) * 1966-09-02 1970-04-21 Hitachi Ltd Method of manufacturing semiconductor device
US3574009A (en) * 1968-03-06 1971-04-06 Unitrode Corp Controlled doping of semiconductors
JPS495668B1 (enExample) * 1970-04-03 1974-02-08
BE766403A (fr) * 1970-05-25 1971-09-16 Gen Electric Procede de fabrication de transistors a effet de champ
US3932239A (en) * 1970-10-27 1976-01-13 Cogar Corporation Semiconductor diffusion process
US3690969A (en) * 1971-05-03 1972-09-12 Motorola Inc Method of doping semiconductor substrates
US3921283A (en) * 1971-06-08 1975-11-25 Philips Corp Semiconductor device and method of manufacturing the device
US3798081A (en) * 1972-02-14 1974-03-19 Ibm Method for diffusing as into silicon from a solid phase
US3806382A (en) * 1972-04-06 1974-04-23 Ibm Vapor-solid impurity diffusion process
JPS5341035B2 (enExample) * 1972-05-02 1978-10-31
IT993637B (it) * 1972-10-16 1975-09-30 Rca Corp Metodo per la fabbricazione di dispositivi semiconduttori del tipo a doppia giunzione
GB1503017A (en) * 1974-02-28 1978-03-08 Tokyo Shibaura Electric Co Method of manufacturing semiconductor devices

Also Published As

Publication number Publication date
FR2351501B1 (enExample) 1982-11-19
JPS5850015B2 (ja) 1983-11-08
DE2718894A1 (de) 1977-11-24
CH615781A5 (enExample) 1980-02-15
FR2351501A1 (fr) 1977-12-09
DE2718894C2 (de) 1983-04-14
GB1523246A (en) 1978-08-31
AU508451B2 (en) 1980-03-20
SE429175B (sv) 1983-08-15
US4139402A (en) 1979-02-13
NL7604986A (nl) 1977-11-15
JPS52137276A (en) 1977-11-16
CA1086868A (en) 1980-09-30
SE7705358L (sv) 1977-11-12
AU2498977A (en) 1978-11-16

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