IT1025191B - Procedimento perfezionato per la fabbricazione di circuiti integrati - Google Patents

Procedimento perfezionato per la fabbricazione di circuiti integrati

Info

Publication number
IT1025191B
IT1025191B IT28782/74A IT2878274A IT1025191B IT 1025191 B IT1025191 B IT 1025191B IT 28782/74 A IT28782/74 A IT 28782/74A IT 2878274 A IT2878274 A IT 2878274A IT 1025191 B IT1025191 B IT 1025191B
Authority
IT
Italy
Prior art keywords
manufacture
integrated circuits
improved procedure
procedure
improved
Prior art date
Application number
IT28782/74A
Other languages
English (en)
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of IT1025191B publication Critical patent/IT1025191B/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/316Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
IT28782/74A 1973-12-26 1974-10-25 Procedimento perfezionato per la fabbricazione di circuiti integrati IT1025191B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US427887A US3922184A (en) 1973-12-26 1973-12-26 Method for forming openings through insulative layers in the fabrication of integrated circuits

Publications (1)

Publication Number Publication Date
IT1025191B true IT1025191B (it) 1978-08-10

Family

ID=23696704

Family Applications (1)

Application Number Title Priority Date Filing Date
IT28782/74A IT1025191B (it) 1973-12-26 1974-10-25 Procedimento perfezionato per la fabbricazione di circuiti integrati

Country Status (7)

Country Link
US (1) US3922184A (it)
JP (1) JPS528677B2 (it)
CA (1) CA1024663A (it)
DE (1) DE2453528C2 (it)
FR (1) FR2272489B1 (it)
GB (1) GB1451160A (it)
IT (1) IT1025191B (it)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63167881U (it) * 1987-04-23 1988-11-01
EP0383610B1 (en) * 1989-02-17 1997-10-08 Matsushita Electronics Corporation Manufacturing method of semiconductor device
JPH02237135A (ja) * 1989-03-10 1990-09-19 Fujitsu Ltd 半導体装置の製造方法
US5279990A (en) * 1990-03-02 1994-01-18 Motorola, Inc. Method of making a small geometry contact using sidewall spacers
US5589423A (en) * 1994-10-03 1996-12-31 Motorola Inc. Process for fabricating a non-silicided region in an integrated circuit
US10217707B2 (en) * 2016-09-16 2019-02-26 International Business Machines Corporation Trench contact resistance reduction

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3504430A (en) * 1966-06-27 1970-04-07 Hitachi Ltd Method of making semiconductor devices having insulating films
FR1569872A (it) * 1968-04-10 1969-06-06
US3753803A (en) * 1968-12-06 1973-08-21 Hitachi Ltd Method of dividing semiconductor layer into a plurality of isolated regions
US3673018A (en) * 1969-05-08 1972-06-27 Rca Corp Method of fabrication of photomasks
US3649393A (en) * 1970-06-12 1972-03-14 Ibm Variable depth etching of film layers using variable exposures of photoresists
DE2127569A1 (de) * 1970-06-25 1971-12-30 Western Electric Co Verfahren zur Herstellung einer dicken Oxidausbildung auf integrierten Halbleiterschaltungen
US3713922A (en) * 1970-12-28 1973-01-30 Bell Telephone Labor Inc High resolution shadow masks and their preparation
US3823015A (en) * 1973-01-02 1974-07-09 Collins Radio Co Photo-masking process

Also Published As

Publication number Publication date
JPS5098279A (it) 1975-08-05
US3922184A (en) 1975-11-25
FR2272489A1 (it) 1975-12-19
CA1024663A (en) 1978-01-17
GB1451160A (en) 1976-09-29
FR2272489B1 (it) 1978-02-24
DE2453528A1 (de) 1975-07-10
JPS528677B2 (it) 1977-03-10
DE2453528C2 (de) 1982-04-15

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