IT1022329B - Disposizione circuitale per una memoria specialmente per una memoria mos - Google Patents

Disposizione circuitale per una memoria specialmente per una memoria mos

Info

Publication number
IT1022329B
IT1022329B IT27726/74A IT2772674A IT1022329B IT 1022329 B IT1022329 B IT 1022329B IT 27726/74 A IT27726/74 A IT 27726/74A IT 2772674 A IT2772674 A IT 2772674A IT 1022329 B IT1022329 B IT 1022329B
Authority
IT
Italy
Prior art keywords
memory
circuit arrangement
mos
mos memory
memory especially
Prior art date
Application number
IT27726/74A
Other languages
English (en)
Italian (it)
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19732348961 external-priority patent/DE2348961C3/de
Application filed by Siemens Ag filed Critical Siemens Ag
Application granted granted Critical
Publication of IT1022329B publication Critical patent/IT1022329B/it

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/565Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using capacitive charge storage elements
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4096Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Databases & Information Systems (AREA)
  • Analogue/Digital Conversion (AREA)
IT27726/74A 1973-09-28 1974-09-26 Disposizione circuitale per una memoria specialmente per una memoria mos IT1022329B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19732348961 DE2348961C3 (de) 1973-09-28 Schaltungsanordnung zum Einspeichern und Ausspeichern von Signalen in einen bzw. aus einem Speicher, insbesondere MOS-Speicher

Publications (1)

Publication Number Publication Date
IT1022329B true IT1022329B (it) 1978-03-20

Family

ID=5894046

Family Applications (1)

Application Number Title Priority Date Filing Date
IT27726/74A IT1022329B (it) 1973-09-28 1974-09-26 Disposizione circuitale per una memoria specialmente per una memoria mos

Country Status (11)

Country Link
JP (1) JPS5062333A (fr)
AT (1) AT342342B (fr)
BE (1) BE820448A (fr)
CH (1) CH582938A5 (fr)
DK (1) DK513074A (fr)
FR (1) FR2246022B1 (fr)
GB (1) GB1486912A (fr)
IT (1) IT1022329B (fr)
LU (1) LU71005A1 (fr)
NL (1) NL7412832A (fr)
SE (1) SE402998B (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS524746A (en) * 1975-06-30 1977-01-14 Fujitsu Ltd Semiconductor memory device
JPS53138244A (en) * 1977-05-10 1978-12-02 Takeda Riken Ind Co Ltd Digital memory
DE3485595D1 (de) * 1983-12-23 1992-04-23 Hitachi Ltd Halbleiterspeicher mit einer speicherstruktur mit vielfachen pegeln.
JPS6163996A (ja) * 1984-09-05 1986-04-02 Nippon Telegr & Teleph Corp <Ntt> 情報記憶装置
EP0649147A1 (fr) * 1993-10-11 1995-04-19 Texas Instruments France Dispositif d'emmagasinage à capacité supérique
US5440505A (en) * 1994-01-21 1995-08-08 Intel Corporation Method and circuitry for storing discrete amounts of charge in a single memory element
RU2190260C2 (ru) * 1994-06-02 2002-09-27 Интел Корпорейшн Считывающая схема для флэш-памяти с многоуровневыми ячейками
EP1416496A1 (fr) * 2002-11-04 2004-05-06 Dialog Semiconductor GmbH Dispositif de mémoire RAM multibit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3705391A (en) * 1971-10-22 1972-12-05 Massachusetts Inst Technology Memory system employing capacitance storage means

Also Published As

Publication number Publication date
GB1486912A (en) 1977-09-28
ATA766674A (de) 1977-07-15
NL7412832A (nl) 1975-04-02
DK513074A (fr) 1975-05-12
BE820448A (fr) 1975-03-27
LU71005A1 (fr) 1975-04-17
FR2246022A1 (fr) 1975-04-25
SE402998B (sv) 1978-07-24
AT342342B (de) 1978-03-28
JPS5062333A (fr) 1975-05-28
DE2348961B2 (de) 1976-08-05
CH582938A5 (fr) 1976-12-15
FR2246022B1 (fr) 1979-06-01
SE7412226L (fr) 1975-04-01
DE2348961A1 (de) 1975-05-15

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