IN2014MN01027A - - Google Patents

Info

Publication number
IN2014MN01027A
IN2014MN01027A IN1027MUN2014A IN2014MN01027A IN 2014MN01027 A IN2014MN01027 A IN 2014MN01027A IN 1027MUN2014 A IN1027MUN2014 A IN 1027MUN2014A IN 2014MN01027 A IN2014MN01027 A IN 2014MN01027A
Authority
IN
India
Prior art keywords
substrate layer
layer
wafer
sheet
circuit
Prior art date
Application number
Other languages
English (en)
Inventor
Chengjie Zuo
Changhan Yun
Sang June Park
Chi Shun Lo
Mario F Velez
Jonghae Kim
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of IN2014MN01027A publication Critical patent/IN2014MN01027A/en

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00Three-dimensional [3D] integrated devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Micromachines (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Laminated Bodies (AREA)
IN1027MUN2014 2011-11-16 2012-11-16 IN2014MN01027A (OSRAM)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201161560471P 2011-11-16 2011-11-16
US13/356,717 US9496255B2 (en) 2011-11-16 2012-01-24 Stacked CMOS chipset having an insulating layer and a secondary layer and method of forming same
PCT/US2012/065644 WO2013075007A1 (en) 2011-11-16 2012-11-16 Stacked chipset having an insulating layer and a secondary layer and method of forming same

Publications (1)

Publication Number Publication Date
IN2014MN01027A true IN2014MN01027A (OSRAM) 2015-05-01

Family

ID=48280458

Family Applications (1)

Application Number Title Priority Date Filing Date
IN1027MUN2014 IN2014MN01027A (OSRAM) 2011-11-16 2012-11-16

Country Status (7)

Country Link
US (1) US9496255B2 (OSRAM)
EP (1) EP2780942A1 (OSRAM)
JP (2) JP5937225B2 (OSRAM)
KR (2) KR101759689B1 (OSRAM)
CN (1) CN104054175B (OSRAM)
IN (1) IN2014MN01027A (OSRAM)
WO (1) WO2013075007A1 (OSRAM)

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US9257407B2 (en) * 2013-10-28 2016-02-09 Qualcomm Incorporated Heterogeneous channel material integration into wafer
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WO2017019676A1 (en) * 2015-07-28 2017-02-02 Skyworks Solutions, Inc. Integrated passive device on soi substrate
US9768109B2 (en) * 2015-09-22 2017-09-19 Qualcomm Incorporated Integrated circuits (ICS) on a glass substrate
JP6585978B2 (ja) * 2015-09-24 2019-10-02 ラピスセミコンダクタ株式会社 半導体装置および半導体装置の製造方法
CN117198983A (zh) 2015-11-20 2023-12-08 环球晶圆股份有限公司 使半导体表面平整的制造方法
US10256863B2 (en) * 2016-01-11 2019-04-09 Qualcomm Incorporated Monolithic integration of antenna switch and diplexer
US10468294B2 (en) 2016-02-19 2019-11-05 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed on a substrate with a rough surface
US9831115B2 (en) 2016-02-19 2017-11-28 Sunedison Semiconductor Limited (Uen201334164H) Process flow for manufacturing semiconductor on insulator structures in parallel
WO2017142849A1 (en) 2016-02-19 2017-08-24 Sunedison Semiconductor Limited Semiconductor on insulator structure comprising a buried high resistivity layer
WO2017155804A1 (en) 2016-03-07 2017-09-14 Sunedison Semiconductor Limited Method of manufacturing a semiconductor on insulator structure by a pressurized bond treatment
EP3758050A1 (en) 2016-03-07 2020-12-30 GlobalWafers Co., Ltd. Semiconductor on insulator structure comprising a low temperature flowable oxide layer and method of manufacture thereof
WO2017155806A1 (en) 2016-03-07 2017-09-14 Sunedison Semiconductor Limited Semiconductor on insulator structure comprising a plasma oxide layer and method of manufacture thereof
WO2017155808A1 (en) 2016-03-07 2017-09-14 Sunedison Semiconductor Limited Semiconductor on insulator structure comprising a plasma nitride layer and method of manufacture thereof
WO2017214084A1 (en) 2016-06-08 2017-12-14 Sunedison Semiconductor Limited High resistivity single crystal silicon ingot and wafer having improved mechanical strength
US10269617B2 (en) 2016-06-22 2019-04-23 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate comprising an isolation region
US20180068886A1 (en) * 2016-09-02 2018-03-08 Qualcomm Incorporated Porous semiconductor layer transfer for an integrated circuit structure
US9812580B1 (en) * 2016-09-06 2017-11-07 Qualcomm Incorporated Deep trench active device with backside body contact
SG11201903090SA (en) 2016-10-26 2019-05-30 Globalwafers Co Ltd High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency
JP6801105B2 (ja) 2016-12-05 2020-12-16 グローバルウェーハズ カンパニー リミテッドGlobalWafers Co.,Ltd. 高抵抗シリコンオンインシュレータ構造及びその製造方法
SG10201913071XA (en) 2016-12-28 2020-03-30 Sunedison Semiconductor Ltd Method of treating silicon wafers to have intrinsic gettering and gate oxide integrity yield
JP6881066B2 (ja) * 2017-06-19 2021-06-02 大日本印刷株式会社 貫通電極基板および貫通電極基板の製造方法
JP7034186B2 (ja) 2017-07-14 2022-03-11 サンエディソン・セミコンダクター・リミテッド 絶縁体上半導体構造の製造方法
JP7160943B2 (ja) 2018-04-27 2022-10-25 グローバルウェーハズ カンパニー リミテッド 半導体ドナー基板からの層移転を容易にする光アシスト板状体形成
JP2019212729A (ja) * 2018-06-04 2019-12-12 ルネサスエレクトロニクス株式会社 半導体装置及び半導体装置の製造方法
JP7123182B2 (ja) 2018-06-08 2022-08-22 グローバルウェーハズ カンパニー リミテッド シリコン箔層の移転方法
FR3091004B1 (fr) * 2018-12-24 2020-12-04 Soitec Silicon On Insulator Structure de type semi-conducteur pour applications digitales et radiofréquences
EP3675168A1 (en) * 2018-12-24 2020-07-01 IMEC vzw 3d power semiconductor device and system
JP2020141090A (ja) * 2019-03-01 2020-09-03 ソニーセミコンダクタソリューションズ株式会社 容量素子、半導体素子基板及び電子機器
KR102804065B1 (ko) 2020-07-13 2025-05-09 삼성전자주식회사 반도체 패키지 및 반도체 패키지의 제조 방법
CN114122134B (zh) * 2020-09-01 2023-12-22 苏州华太电子技术股份有限公司 一种射频ldmos集成器件
DE102022211198A1 (de) * 2022-10-21 2024-05-02 Robert Bosch Gesellschaft mit beschränkter Haftung Verfahren zur Herstellung eines mikromechanischen Bauelements

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Also Published As

Publication number Publication date
US9496255B2 (en) 2016-11-15
KR20160044591A (ko) 2016-04-25
CN104054175A (zh) 2014-09-17
JP2015503228A (ja) 2015-01-29
WO2013075007A1 (en) 2013-05-23
EP2780942A1 (en) 2014-09-24
JP6099794B2 (ja) 2017-03-22
JP5937225B2 (ja) 2016-06-22
US20130120951A1 (en) 2013-05-16
JP2016174170A (ja) 2016-09-29
KR101759689B1 (ko) 2017-07-19
KR20140100526A (ko) 2014-08-14
CN104054175B (zh) 2018-03-06

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