IL151344A - Asynchronous reset circuit testing - Google Patents

Asynchronous reset circuit testing

Info

Publication number
IL151344A
IL151344A IL15134401A IL15134401A IL151344A IL 151344 A IL151344 A IL 151344A IL 15134401 A IL15134401 A IL 15134401A IL 15134401 A IL15134401 A IL 15134401A IL 151344 A IL151344 A IL 151344A
Authority
IL
Israel
Prior art keywords
reset circuit
circuit testing
asynchronous reset
asynchronous
testing
Prior art date
Application number
IL15134401A
Other languages
English (en)
Other versions
IL151344A0 (en
Original Assignee
Advanced Risc Mach Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Risc Mach Ltd filed Critical Advanced Risc Mach Ltd
Publication of IL151344A0 publication Critical patent/IL151344A0/xx
Publication of IL151344A publication Critical patent/IL151344A/xx

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318555—Control logic

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
IL15134401A 2000-12-22 2001-06-29 Asynchronous reset circuit testing IL151344A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB0031554A GB2370364B (en) 2000-12-22 2000-12-22 Testing integrated circuits
PCT/GB2001/002883 WO2002052290A1 (fr) 2000-12-22 2001-06-29 Test de réinitialisation asynchrone de circuits

Publications (2)

Publication Number Publication Date
IL151344A0 IL151344A0 (en) 2003-04-10
IL151344A true IL151344A (en) 2005-08-31

Family

ID=9905822

Family Applications (1)

Application Number Title Priority Date Filing Date
IL15134401A IL151344A (en) 2000-12-22 2001-06-29 Asynchronous reset circuit testing

Country Status (12)

Country Link
US (1) US6779143B2 (fr)
EP (1) EP1344071B1 (fr)
JP (1) JP2004529318A (fr)
KR (1) KR100790428B1 (fr)
CN (1) CN1238729C (fr)
DE (1) DE60109321T2 (fr)
GB (1) GB2370364B (fr)
IL (1) IL151344A (fr)
MY (1) MY127546A (fr)
RU (1) RU2260813C2 (fr)
TW (1) TW559967B (fr)
WO (1) WO2002052290A1 (fr)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5260950A (en) * 1991-09-17 1993-11-09 Ncr Corporation Boundary-scan input circuit for a reset pin
US20040153926A1 (en) * 2002-10-30 2004-08-05 Abdel-Hafez Khader S. Method and apparatus for testing asynchronous set/reset faults in a scan-based integrated circuit
CN1516015B (zh) * 2003-01-09 2010-04-07 华为技术有限公司 多链边界扫描测试系统及多链边界扫描测试方法
US7155647B2 (en) * 2003-05-06 2006-12-26 Sun Microsystems, Inc. Scan of chip state from a hierarchical design
CN100348992C (zh) * 2003-11-19 2007-11-14 华为技术有限公司 一种外围互连线的测试方法
CN100370269C (zh) * 2003-11-19 2008-02-20 华为技术有限公司 一种边界扫描测试控制器及边界扫描测试方法
US20050240846A1 (en) * 2004-04-23 2005-10-27 Texas Instruments Incorporated Accurate Generation of Scan Enable Signal when Testing Integrated Circuits Using Sequential Scanning Techniques
GB0413140D0 (en) * 2004-06-12 2004-07-14 Texas Instruments Ltd Serial burn-in monitor
EP1810044B1 (fr) * 2004-07-28 2009-04-29 Nxp B.V. Agencement d'essai d'interconnexions de circuits et demarche associee
US7870452B2 (en) * 2005-09-08 2011-01-11 Nxp B.V. Scan testing methods
US7350122B2 (en) * 2005-11-03 2008-03-25 International Business Machines Corporation Method, apparatus and computer program product for implementing scan-chain-specific control signals as part of a scan chain
CN102495356B (zh) * 2011-11-30 2014-11-05 福州大学 扫描链异步复位寄存器复位端口处理方法
CN103135051B (zh) * 2011-12-02 2017-02-08 宁波中嘉科贸有限公司 电源重启测试治具
US8990648B2 (en) 2012-03-28 2015-03-24 International Business Machines Corporation Optimized synchronous scan flip flop circuit
CN103884981B (zh) * 2014-04-16 2016-11-02 威盛电子股份有限公司 隔离电路
JP2016180636A (ja) * 2015-03-24 2016-10-13 日本電気株式会社 非同期リセット回路テスト装置、非同期リセット回路テスト方法、及び、プログラム
CN106324483B (zh) * 2016-08-30 2019-07-30 歌尔科技有限公司 一种复位电路检测系统和检测方法
US10502784B2 (en) * 2017-09-22 2019-12-10 Stmicroelectronics International N.V. Voltage level monitoring of an integrated circuit for production test and debug

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB846956A (en) * 1957-10-10 1960-09-07 David Katz Improvements in or relating to variable electrical resistors
US4649539A (en) * 1985-11-04 1987-03-10 Honeywell Information Systems Inc. Apparatus providing improved diagnosability
US5166604A (en) * 1990-11-13 1992-11-24 Altera Corporation Methods and apparatus for facilitating scan testing of asynchronous logic circuitry
US5260950A (en) * 1991-09-17 1993-11-09 Ncr Corporation Boundary-scan input circuit for a reset pin
US5416784A (en) * 1991-10-28 1995-05-16 Sequoia Semiconductor Built-in self-test flip-flop with asynchronous input
US5497378A (en) * 1993-11-02 1996-03-05 International Business Machines Corporation System and method for testing a circuit network having elements testable by different boundary scan standards
JP3333036B2 (ja) * 1994-03-17 2002-10-07 富士通株式会社 試験装置、試験装置を備えたシステムおよび試験方法
US5574731A (en) * 1995-02-22 1996-11-12 National Semiconductor Corporation Set/reset scan flip-flops
JPH10160807A (ja) 1996-12-04 1998-06-19 Philips Japan Ltd 試験回路を含む論理装置と論理装置の試験方法
FR2762683B1 (fr) * 1997-04-29 1999-07-16 Sgs Thomson Microelectronics Circuit testable a faible nombre de broches
JP3601418B2 (ja) * 1999-07-23 2004-12-15 セイコーエプソン株式会社 半導体集積回路、液晶装置及び電子機器並びに半導体集積回路の検査方法

Also Published As

Publication number Publication date
US20020083389A1 (en) 2002-06-27
EP1344071A1 (fr) 2003-09-17
DE60109321D1 (de) 2005-04-14
GB0031554D0 (en) 2001-02-07
KR100790428B1 (ko) 2008-01-02
RU2002122096A (ru) 2004-03-20
WO2002052290A1 (fr) 2002-07-04
RU2260813C2 (ru) 2005-09-20
KR20040004461A (ko) 2004-01-13
CN1238729C (zh) 2006-01-25
DE60109321T2 (de) 2006-04-06
GB2370364A (en) 2002-06-26
TW559967B (en) 2003-11-01
GB2370364B (en) 2004-06-30
US6779143B2 (en) 2004-08-17
JP2004529318A (ja) 2004-09-24
MY127546A (en) 2006-12-29
IL151344A0 (en) 2003-04-10
EP1344071B1 (fr) 2005-03-09
CN1443310A (zh) 2003-09-17

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Legal Events

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KB Patent renewed
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MM9K Patent not in force due to non-payment of renewal fees