IE904466A1 - Method of transmitting 1544 or 6312 kbit/s signals via 2048¹or 8448 kbit/s links in the synchronous digital multiplex¹hierarchy - Google Patents
Method of transmitting 1544 or 6312 kbit/s signals via 2048¹or 8448 kbit/s links in the synchronous digital multiplex¹hierarchyInfo
- Publication number
- IE904466A1 IE904466A1 IE446690A IE446690A IE904466A1 IE 904466 A1 IE904466 A1 IE 904466A1 IE 446690 A IE446690 A IE 446690A IE 446690 A IE446690 A IE 446690A IE 904466 A1 IE904466 A1 IE 904466A1
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- link
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/07—Synchronising arrangements using pulse stuffing for systems with different or fluctuating information rates or bit rates
- H04J3/076—Bit and byte stuffing, e.g. SDH/PDH desynchronisers, bit-leaking
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
- H04J3/1605—Fixed allocated frame structures
- H04J3/1611—Synchronous digital hierarchy [SDH] or SONET
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Time-Division Multiplex Systems (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Investigating Or Analysing Biological Materials (AREA)
- Measuring Or Testing Involving Enzymes Or Micro-Organisms (AREA)
- Mobile Radio Communication Systems (AREA)
- Radio Relay Systems (AREA)
- Radar Systems Or Details Thereof (AREA)
- Communication Control (AREA)
Abstract
A method for transmitting 1544 or 6312-kbit/s signals via a 2048 or 8448-kbit/s link is not known in the synchronous digital multiplex hierarchy and is to be specified. A 1544-kbit/s signal is inserted in the direction of multiplexing, using a gapped 2048-kHz clock (LT11) into a container C-111 which is completed by means of a path overhead V511 to form a virtual container VC-1111. This is transmitted via a 2048-kbit/s link (L11) with a link container (S-1111) to which a header (OH11) and pointer bytes V111 to V411 are allocated for the transmission. After adding stuffing bytes (FS11), the 1544-kbit/s signal can be fed into a subsystem unit TU-121. In the direction of demultiplexing, stuffing bytes (FS12) must be removed from a subsystem unit TU-122 and pointer bytes V112 to V412 must be inserted with the aid of a gapped 2048-kHz clock (LT12) and a header (OH12) must be inserted with the aid of a 2048-kHz clock (T12) for the transmission via a 2048-kbit/s link (L12). After the transmission, the header (OH12), the pointer bytes V112 to V412 and a path overhead V512 are removed so that the 1544-kbit/s signal can be taken from a container C-112. A 6312-kbit/s signal is transmitted correspondingly. <IMAGE>
Description
Siemens Aktiengesellschaft Method of transmitting 1544 or 6312 kbit/s signals via 2048 or 8448 kbit/s links in the synchronous digital multiplex hierarchy In Europe and other countries, a plesiochronous digital signal hierarchy with bit rates of 2048 kbit/s, 8448 kbit/s, 34368 kbit/s and 139264 kbit/s is used, and in North America one with bit rates of 1544 kbit/s, 6312 kbit/s and 44736 kbit/s is used. A synchronous digital multiplex hierarchy with a basic bit rate of 155520 kbit/s is defined in the CCITT Recommendations G.707, G.708 and G.709 and is envisaged for worldwide use. In this it is to be possible for the digital signals of plesiochronous digital signal hierarchies to be transmitted.
A multiplex structure shown in Figure 1 was presented at the TM3 meeting (Transmission and Multiplexing) in Brussels from 24. to 28.4.1989 of the European Transmission Standards Institute ETSI. For the transmis20 sion of 1544 and 6312 kbit/s signals of the US hierarchy in the European part of the synchronous digital multiplex hierarchy, modifications of this multiplex structure were proposed at the TM3 meeting in Aveiro from 23. to 28.10.1989 of the ETSI in Temporary Documents No. 106, 117, 127 and 136.
The object of the invention is to state a solution for a transmission of these 1544 and 6312 kbit/s signals via 2048 and 8448 kbit/s links respectively in the existing plesiochronous digital signal hierarchy.
This object is achieved according to the invention with the features of Claim 1. Refinements of the invention emerge from the subclaims.
This method confers the advantage that the path overhead (explained more fully later) provided for monitoring the wanted signal from the source to the sink can be transmitted to the terminal via the 2048 or 8448 kbit/s links. - 2 89 P 1996 DE The invention will be explained in greater detail below with reference to exemplary embodiments.
Figure 1 shows a multiplex structure of the synchronous digital multiplex hierarchy SDH, Figure 2 shows an arrangement with a North American and a European SDH network, Figure 3 shows an arrangement according to Figure 2 with a conversion device between the North American and European SDH network, Figure 4 shows a first multiplex structure of the synchronous digital multiplex hierarchy with sections according to the invention, Figure 5 shows a second multiplex structure of the synchronous digital multiplex hierarchy with the same sections according to the invention, Figure 6 shows a tributary unit multiframe, an insertion of a VC-11 signal into a VC-12* signal and an insertion of a VC-21 signal into a VC-22* signal, Figure 7 shows an insertion of virtual containers VC-11 into a virtual container VC-4, Figure 8 shows a block circuit diagram for transmitting 1544 kbit/s signals via 2048 kbit/s links according to Figure 4, Figure 9 shows the insertion of a 1544 kbit/s signal into a 2048 kbit/s signal, Figure 10 shows a block circuit diagram for transmitting 6312 kbit/s signals via 8448 kbit/s links according to Figure 4, Figure 11 shows a block circuit diagram for transmitting 1544 kbit/s signals via 2048 kbit/s links according to Figure 5, and Figure 12 shows a block circuit diagram for transmitting 6312 kbit/s signals via 8448 kbit/s links according to Figure 5.
Figure 1 shows the multiplex structure according to the proposal of the ETSI. AU denotes administrative unit, C container, H digital signal, POH path overhead, PTR pointer, SOH section overhead, STM synchronous - 3 - 89 P 1996 DE transport module, TU tributary unit, TUG tributary unit group and VC virtual container.
The digital signals to be transmitted are inserted into container C-n at the input node of the synchro5 nous network by means of positive stuffing, n representing one of the numbers indicated in Figure 1. Each container is extended to form a virtual container VC-n, which is periodically transmitted, by the addition of a path overhead. The first byte of a virtual container is indicated by a pointer PTR, the temporal position of which is defined in the transmission frame. As a rule the virtual container of a higher hierarchical level serves this purpose. A virtual container VC-n forms with its associated pointer PTR a tributary unit TU-n. Several of these with the same structure can in turn be combined to form a tributary unit group TUG-n. In the abovementioned CCITT Recommendations, tributary unit groups TUG-21 are given for the 1.5 Mbit/s hierarchy and TUG-22 are given for the 2 Mbit/s hierarchy.
Figure 2 shows a first possibility for transmitting 1544 kbit/s signals from the North American into the European synchronous digital multiplex hierarchy. The arrangement contains a North American network US-SDH, a European network E-SDH, multiplex units MUX1 and MUX2, as well as demultiplex units DEMUX1 and DEMUX2.
In the multiplex unit MUX1, 1544 kbit/s signals are inserted in accordance with CCITT Recommendation G.709 into container C-ll, virtual container VC-11, tributary units TU-11 and finally into a synchronous transport module STM-1. This is fed via the network US-SDH to the demultiplex unit DEMUX1 for separating out the 1544 kbit/s signals. These are then transmitted in a plesiochronous digital signal hierarchy to the multiplexer MUX2 in Europe, in which they are packed according to a method explained more fully below into tributary units TU-12 and finally again into a synchronous transport module STM-1. After crossing the European network E-SDH this is fed to the demultiplexer DEMUX2, in which the 1544 kbit/s signals are again separated out from it. - 4 - 89 Ρ 1996 DE The container C-ll is accompanied by a path overhead VC-ll-POH from the multiplex unit MUX1 to the demultiplex unit DEMUX1. In the multiplex unit MUX2, a new path overhead VC-12-POH is then introduced, which accompanies the 1544 kbit/s signals to the demultiplex unit DEMUX2.
Figure 3 shows a second possibility for transmitting 1544 kbit/s signals from the North American network US-SDH to the European network E-SDH. The demultiplex unit DEMUX1 and the multiplex unit MUX2 of the arrangement according to Figure 2 is replaced in this case by a conversion device UE, which is situated either in North America or in Europe.
In the conversion device UE synchronous transport modules STM-1 originating from the North American network US-SDH with the distribution level TU-11 are split according to their assembly and disassembly specifications into administrative units AU-32, into tributary unit groups TUG-21, into tributary units TU-11 and into virtual containers VC-11, and are subsequently combined via tributary units TU-12, tributary unit groups TUG-22, tributary unit groups TUG-31 and administrative units AU-4 to form new synchronous transport modules STM-1 which can be processed in the European network E-SDH in a distribution level VE-TU-12.
Eighty-four 1544 kbit/s signals can be accommodated in an STM-1 signal assembled via TU-11 signals. In contrast, however, a maximum of only sixty-four TU-12 signals, which are in each case occupied with one 1544 kbit/s signal, can be accommodated in an STM-1 signal assembled via TU-12 signals. Thus, a total of 84/64 x n x STM-1 signals of the European network E-SDH must be provided for n STM-1 signals from the North American network US-SDH.
In contrast to the arrangement according to Figure 2, an end-to-end monitoring from multiplex unit MUX1 to demultiplex unit DEMUX2 is possible here with only one path overhead VC-ll-POH.
Figure 4 shows a multiplex structure according to - 5 - 89 P 1996 DE the initially cited Temporary Document No. 136, which is here extended by sections Alx and ΑΣ^ In comparison with the multiplex hierarchy according to Figure 1, the North American tributary units TU-11 and TU-21 as well as the tributary unit group TUG-21 are omitted. The asterisk at the tributary unit group TUG-32 indicates that these omitted units can in principle be connected there. In contrast to the multiplex hierarchy according to Figure 1, the virtual containers VC-11 and VC-21 merge into tributary units TU-12 and TU-22.
According to the invention, a 2048 kbit/s link via which a link container S-ll is transmitted can be inserted in section Alx between the generation point of the virtual container VC-11 and the generation point of the tributary unit TU-12. Accordingly, an 8448 kHz link via which a link container S-21 is transmitted is inserted in section A^ between the point of origin of the virtual container VC-21 and the point of origin of the tributary unit TU-22. Both will be explained more fully with reference to Figures 8 and 10.
Figure 5 shows a further multiplex structure in which sections Al2 and A22 are connected to tributary units TU-11 and TU-21. Both will be shown in more detail with reference to Figures 11 and 12.
As Figure 6 shows according to the CCITT Recommendation G.709 in column a, the tributary units TU-12 or TU-22 are divided into multiframes of 500 μβ each. Such a multiframe contains four frames with a period duration of 125 ps each. The first byte Vl, V2, V3 and V4 of the frames is defined in CCITT Recommendation G.709. Without these bytes, the multiframe according to column b contains frames with virtual auxiliary containers VC-12* or VC-22*, which begin in each case with a byte V5 as path overhead.
If it is assumed that a 1544 kbit/s signal was first converted in a known manner into a container C-ll and then into a virtual container VC-11, the VC-11 signal (white fields), as is shown in column d, can be filled up to form a VC-12* signal according to column c by adding - 6 - 89 Ρ 1996 DE stuffing bytes FS (shaded fields), the first frame being shown. The original VC-11 signal has 104 bytes per multiframe, 26 bytes being provided per frame. In contrast, 140 bytes are provided per multiframe and 35 bytes per frame for the VC-12 signal.
The stuffing bytes FS are distributed as evenly as possible to save buffer memory capacity. The same scheme is used for the second, third and fourth frames.
If it is further assumed that a 6312 kbit/s signal was first converted in a known manner into a container C-21 and then into a virtual container VC-21, the VC-21 signal (white fields), as is shown in column d, can be filled up to form a VC-22* signal according to column c by adding stuffing bytes (shaded fields) FS, as is shown for the first frame. The original VC-21 signal has 428 bytes per multiframe and 107 bytes per frame. 572 bytes are provided per multiframe and 143 bytes per frame for the VC-22 signal. Here, too, the stuffing bytes FS should be distributed as evenly as possible. The same scheme is used for the second, third and fourth frames.
Figure 7 shows how, after packing into a virtual auxiliary container VC-12* and insertion into a tributary unit TU-12 according to Figure 5, a VC-11 signal was fed into a VC-4 signal.
The pointer bytes Vlx and V2X indicate the position of the path overhead V5X and hence the beginning of the VC-11 and VC-12* signals. V3X is a pointer byte (action) PTR(A) which in the case of negative stuffing is an information byte of the VC-11 or VC-12* signal, and V4X represents a reserve RES. The column Sp is not used by a virtual container VC-11. The TU-12 signal occupies in each case four columns of the VC-4 signal, 9 bytes being transmitted per column. Space for sixty-three further TU-12 signals remains.
Figure 8 shows a block circuit diagram of the section Alx and the tributary unit TU-12 in Figure 4 for the transmission of 1544 kbit/s signals via 2048 kbit/s links Ln and L12. It contains function units containers C-lli and C-ll2, virtual containers VC-lln and VC-1122, - 7 - 89 P 1996 DE link containers S-lln, S-ll12, S-ll21 and S-ll22, tributary units TU-lln, TU-1112, TU-1121 and TU-1122, virtual auxiliary containers VC-12!* and VC-12Z*, tributary units TU-12! and TU-122 and gap clock generators LEU and LE12.
A 1544 kbit/s signal fed into the input Ex is stuffed with a 2048 kHz gap clock LTn into the container C-lli· The 2048 kHz gap clock LTn is derived from a 2048 kHz clock Tu derived from a unit of the opposite direction, gaps for the overhead OHn to be inserted later and for the pointer bytes Vlu to V4n to be likewise inserted being inserted. In the function block VC-lln the path overhead V5n is added to container C-llj, and in the function unit TU-lln the pointer bytes Vln to V4U are added. However, these do not need to be activated in this transmission direction since the synchronization with the 2048 kHz clock Tn has already taken place in the function block for the container C-lli· The overhead ΟΗη continues to be inserted in the function block of the link container S-llu· As Figure 9 shows, the frame SRI, SR2, SR3 or SR4 of the S-lln signal S-lli-SIG with a VC-lln signal and an overhead ΟΗη split into four (OHi to OH4) and the pointer bytes Vln to V4n is thus 32 bytes long and hence corresponds to the length and the frequency of a PCM30 frame.
In order that this S-lln signal can also be transmitted via special equipment which expects a frame alignment signal RKW and a service word MW of the PCM30 signal which alternate with each other, these are used as first bytes in the overhead OHn alternating for each frame. The overhead OHn also contains a multiframe alignment signal, since in each case four frames Rl to R4 form a multiframe, the VC-ll! signal beginning in the first frame Rl with the path overhead V5n· After the transmission of the link container S-lln the 2048 kbit/s link Ln, the overhead OHn is removed again in the function block of the link container S-lli2, and the pointer bytes Vln to v^n are removed again in the function block of the tributary unit TU-lli2. The VC-lln signal thus recovered is filled up with stuffing - 8 - 89 P 1996 DE bytes FSn in accordance with the scheme of Figure 6 to form a virtual auxiliary container VC-12!*. This VC-12X* signal is then treated in a known manner as a VC-12 signal and is inserted into the tributary unit TU-121Z which is output via the output Ax.
A virtual auxiliary container VC-122* is removed from a tributary unit TU-122 arriving at the input E2. By branching off stuffing bytes FS12, with the assistance of a 2048 kHz gap clock LT12 and feeding in of pointer bytes Vl12 to V412, a tributary unit TU-1121 is produced. By adding an overhead 0H12, which may contain a frame alignment signal RKW and a service word MW, a link container S-ll21 is formed with the assistance of a 2048 kHz clock Τχ2 · The gap clock LT12 is derived from the clock T12, the gap clock generator LE12 providing a gap for the overhead 0H12 and the pointer bytes Vl12 to V412.
The link container S-ll2i is transmitted via the 2048 kbit/s link L12. The overhead OH12 is removed again and the clock T1X is derived in the function unit link container S-ll22. By removing the pointer bytes Vl12 to V412, a tributary unit TU-1122 is formed, and a virtual container VC-112 is formed by removing the path overhead V512. After branching off of the path overhead V512, a container C-ll2 is produced which, after destuffing, can output a 1544 kbit signal at the output The pointer bytes Vl12 to V412 are active in this transmission direction and characterize the beginning of the VC-112 signal by pointing to the path overhead V512.
In this way the method allows the transmission of the path overhead V5 across the 2048 kbit/s links Lu and L12, and hence the monitoring of the VC-ΙΙχ signal and the VC-112 signal from the source to the sink.
Figure 10 shows a block circuit diagram of the section A2X and the tributary unit TU-22 in Figure 4 for the transmission of 6312 kbit/s signals via 8448 kbit/s links L21 and L22. Apart from the bit rates and clock frequencies, one difference between this and the block circuit diagram according to Figure 8 is that all numbers - 9 - 89 Ρ 1996 DE and indices contain a 2 at the first position. The method of functioning is the same.
Figure 11 shows a block circuit diagram of the section Alz and the tributary units TU-11X and TU-112, 5 and, finally, Figure 12 shows a block circuit diagram of the section A22 and the tributary units TU-21X and TU-212 in Figure 5. These block circuit diagrams differ from those according to Figures 8 and 10 in that no virtual auxiliary containers are required since no stuffing bytes FS are to be inserted.
Claims (7)
1. Method of transmitting a 1544 or 6312 kbit/s signal in the synchronous digital multiplex hierarchy SDH, characterized in that in multiplexing direction a 1544 or 6312 kbit/s signal to be transmitted is stuffed with a first 2048 or 8448 kHz gap clock (LT n or LT Z1 ) into a first container C-ll x or C-21 x , respectively, in that a first virtual container VC-11 U or VC-21 n is formed from the first container C-ll x or C-21 x and from a first path overhead V5 U or V5 21 , respectively, in that a first tributary unit TU-ll n or TU-21 i:i is obtained from the first virtual container VC-11 X or VC-21 X and from first pointer bytes V1 U -V4 U or Vl 21 -V4 21 , respectively, in that a first link container (S-ll n or S-21 n ) is formed from the first tributary unit TU-11 U or TU-21 n and from a first overhead (OH U or OH 21 ), respectively, in that the link container (S-ll u or S-21 n ) is transmitted via a 2048 or 8448 kbit/s link (L u or L 21 ), respectively, in that the tributary unit TU-11 12 or TU-21 12 is recovered by removing the first overhead (0H n or OH 21 ) from the link container S-ll 12 or S-21 12 , respectively, in that the first virtual container VC-11 12 or VC-21 12 is recovered by removing the first pointer bytes VI U -V4 U or Vl 21 -V4 21 , respectively, in that either the first virtual container VC-ΙΙχ or VC-21 X is inserted into a first tributary unit TU-ΙΙχ or TU-21 X , respectively, or in that a first virtual auxiliary container (VC-12 X * or VC-22 X *) is formed from the recovered first virtual container VC-11 X or VC-21 X and from first stuffing bytes (FS U or FS 21 ), respectively, in that the first virtual auxiliary container (VC-12 X * or VC-22 X *) is inserted into a first tributary unit TU-12 X or TU-22 X , respectively, in that in demultiplexing direction either a second link - 11 - 89 P 1996 DE container (S—11 21 or S-21 21 ) is formed from a second tributary unit TU-11 2 or TU-21 2 with a second 2048 or 8448 kbit/s gap clock (LT 12 or LT 22 ) with the addition of second pointer bytes Vl 12 -V4 12 or Vl 22 -V4 22 , respectively, or in that a second virtual auxiliary container (VC-12 2 * or VC-22 2 *) is removed from a second tributary unit (TU-12 2 or TU-22 Z ), respectively, a second virtual container VC-11 21 or VC-21 21 is formed from the second virtual auxiliary container (VC-12 2 * or VC-22 2 *) by removing second stuffing bytes (FS 12 or FS 22 ), respectively, and a second link container (S-ll 21 or S-21 21 ) is formed from the second virtual container VC-11 21 or VC-21 21 with the addition of second pointer bytes Vl 12 -V4 12 or Vl 22 -V4 22 with the assistance of the second 2048 or 8448 kHz gap clock (LT 12 or LT 22 ), respectively, and in that a second overhead (OH 12 or OH 22 ) is added to the second link container (S-ll 21 or S-21 2 i) with the assistance of a second 2048 or 8448 kHz clock (T 12 or T 22 ), respectively, in that the second link container (S-ll 21 or S-21 21 ) is transmitted via a 2048 or 8448 kbit/s link (L 12 or L 22 ), respectively, in that a tributary unit TU-11 22 or TU-21 22 is formed from the second link container (S-ll 22 or S-21 22 ) by removing the second overhead (0H 12 or 0H 22 ), respectively, in that the second virtual container VC-11 22 or VC-2122 is recovered from the tributary unit TU-11 22 or TU-21 22 with the removal of the second pointer bytes Vl 12 -V4 12 or V122-V422, respectively, in that a second container C-ll 2 or C-21 2 is formed from the recovered second virtual container VC-11 22 or VC-21 22 with the removal of the second path overhead V5 12 or V5 22 , respectively, and in that a 1544 or 6312 kbit/s signal to be received is removed, with destuffing, from the second container C-ll 2 or C-21 2 , respectively.
2. Method according to Claim 1, characterized in that the first 2048 or 8448 kHz gap clock (LT n or LT 21 ) is - 12 - 89 P 1996 DE obtained from a first 2048 or 8448 kHz clock (T X1 or T 21 ), which was derived from the second recovered link container (S-ll 22 or S-21 22 ), respectively.
3. Method according to Claim 1, characterized in that the second 2048 or 8448 kHz gap clock (LT 12 or LT 22 ) is obtained from the second 2048 or 8448 kHz clock (T 12 or T 22 ), respectively.
4. Method according to Claim 1, characterized in that a gap is inserted into the gap clock (LT n , LT 12 , LT 21 , LT 22 ) for the overhead (0H n , 0H 12 , 0H 21 , 0H 22 ), for the pointer bytes Vl 11 -V4 11 , Vl 12 -V4 12 , Vl 21 -V4 21 , Vl 22 -V4 22 and for the path overhead V5 n , V5 12 , V5 21 , V5 22 .
5. Method according to Claim 1, characterized in that as first byte of each of the four frames (SR1-SR4) of the link containers (S-ll n or S-21 u ) a frame alignment signal (RKW) and a service word (MW) are inserted alternately into the overhead (OH n , OH 12 , OH 21 , OH 22 ) .
6. Method according to Claim 1, characterized in that, beginning with the third byte, each fourth byte is selected as stuffing byte (FS n , FS 12 , FS 21 , FS 22 ) in the virtual auxiliary container (VC-12 X * or VC-22 X *, VC-12 Z * or VC-22 2 *, respectively).
7. A method of transmitting a 1544 or 6312 kbit/s signal according to any preceding claim, substantially as hereinbefore described with reference to and as illustrated in the accompanying drawings.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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DE3941050 | 1989-12-12 |
Publications (1)
Publication Number | Publication Date |
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IE904466A1 true IE904466A1 (en) | 1991-06-19 |
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ID=6395322
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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IE446690A IE904466A1 (en) | 1989-12-12 | 1990-12-11 | Method of transmitting 1544 or 6312 kbit/s signals via 2048¹or 8448 kbit/s links in the synchronous digital multiplex¹hierarchy |
Country Status (11)
Country | Link |
---|---|
EP (1) | EP0432556B1 (en) |
JP (1) | JPH0767101B2 (en) |
AT (1) | ATE121887T1 (en) |
AU (1) | AU630773B2 (en) |
BR (1) | BR9006294A (en) |
DE (1) | DE59008969D1 (en) |
ES (1) | ES2070978T3 (en) |
FI (1) | FI906090A (en) |
IE (1) | IE904466A1 (en) |
NO (1) | NO905351L (en) |
PT (1) | PT96153A (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
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GB9114841D0 (en) * | 1991-07-10 | 1991-08-28 | Gpt Ltd | Sdh data transmission timing |
US5579323A (en) * | 1994-07-22 | 1996-11-26 | Alcatel Network Systems, Inc. | Virtual tributary/tributary unit transport method and apparatus |
US5633892A (en) * | 1994-07-22 | 1997-05-27 | Alcatel Network Systems, Inc. | Hybrid line coding method and apparatus using 4B/3T encoding for payload bits and 1B/1T encoding for framing information |
US5490142A (en) * | 1994-09-30 | 1996-02-06 | Alcatel Network Systems, Inc. | VT group optical extension interface and VT group optical extension format method |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
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NL8203110A (en) * | 1982-08-05 | 1984-03-01 | Philips Nv | FOURTH ORDER DIGITAL MULTIPLEX SYSTEM FOR TRANSMISSION OF A NUMBER OF DIGITAL SIGNALS WITH A NOMINAL BIT SPEED OF 44 736 KBIT / S. |
US4975908A (en) * | 1987-12-15 | 1990-12-04 | Siemens Aktiengesellschaft | Basic pulse frame and method for a digital signal multiplex hierarchy |
-
1990
- 1990-11-20 JP JP2312978A patent/JPH0767101B2/en not_active Expired - Lifetime
- 1990-11-26 AT AT90122536T patent/ATE121887T1/en not_active IP Right Cessation
- 1990-11-26 DE DE59008969T patent/DE59008969D1/en not_active Expired - Fee Related
- 1990-11-26 EP EP90122536A patent/EP0432556B1/en not_active Expired - Lifetime
- 1990-11-26 ES ES90122536T patent/ES2070978T3/en not_active Expired - Lifetime
- 1990-12-11 AU AU67965/90A patent/AU630773B2/en not_active Ceased
- 1990-12-11 FI FI906090A patent/FI906090A/en not_active IP Right Cessation
- 1990-12-11 BR BR909006294A patent/BR9006294A/en unknown
- 1990-12-11 IE IE446690A patent/IE904466A1/en unknown
- 1990-12-11 NO NO90905351A patent/NO905351L/en unknown
- 1990-12-11 PT PT96153A patent/PT96153A/en not_active Application Discontinuation
Also Published As
Publication number | Publication date |
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ATE121887T1 (en) | 1995-05-15 |
EP0432556A2 (en) | 1991-06-19 |
PT96153A (en) | 1992-08-31 |
FI906090A0 (en) | 1990-12-11 |
FI906090A (en) | 1991-06-13 |
AU6796590A (en) | 1991-06-20 |
AU630773B2 (en) | 1992-11-05 |
EP0432556A3 (en) | 1992-06-03 |
JPH0767101B2 (en) | 1995-07-19 |
EP0432556B1 (en) | 1995-04-26 |
JPH03191629A (en) | 1991-08-21 |
NO905351L (en) | 1991-06-13 |
DE59008969D1 (en) | 1995-06-01 |
ES2070978T3 (en) | 1995-06-16 |
NO905351D0 (en) | 1990-12-11 |
BR9006294A (en) | 1991-09-24 |
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