ID27447A - Unit kontrol memori - Google Patents

Unit kontrol memori

Info

Publication number
ID27447A
ID27447A IDW20002698A ID20002698A ID27447A ID 27447 A ID27447 A ID 27447A ID W20002698 A IDW20002698 A ID W20002698A ID 20002698 A ID20002698 A ID 20002698A ID 27447 A ID27447 A ID 27447A
Authority
ID
Indonesia
Prior art keywords
control unit
memory control
memory
unit
control
Prior art date
Application number
IDW20002698A
Other languages
English (en)
Inventor
Daisuka Kondou
Toru Aoki
Original Assignee
Matsushita Electric Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Ind Co Ltd filed Critical Matsushita Electric Ind Co Ltd
Publication of ID27447A publication Critical patent/ID27447A/id

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0607—Interleaved addressing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Memory System (AREA)
IDW20002698A 1999-04-30 2000-04-21 Unit kontrol memori ID27447A (id)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11123294A JP2000315173A (ja) 1999-04-30 1999-04-30 メモリ制御装置

Publications (1)

Publication Number Publication Date
ID27447A true ID27447A (id) 2001-04-12

Family

ID=14856994

Family Applications (1)

Application Number Title Priority Date Filing Date
IDW20002698A ID27447A (id) 1999-04-30 2000-04-21 Unit kontrol memori

Country Status (5)

Country Link
JP (1) JP2000315173A (id)
KR (1) KR20010053272A (id)
CN (1) CN1302405A (id)
ID (1) ID27447A (id)
WO (1) WO2000067129A1 (id)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002342164A (ja) * 2001-05-22 2002-11-29 Hitachi Ltd 記憶装置及びデータ処理装置並びに記憶部制御方法
EP1428139B1 (en) 2001-08-14 2015-06-03 Microsoft Technology Licensing, LLC System and method for extracting content for submission to a search engine
WO2004006103A1 (en) * 2002-07-09 2004-01-15 Globespanvirata Incorporated Method and system for improving access latency of multiple bank devices
CN1300707C (zh) * 2002-07-23 2007-02-14 华为技术有限公司 外部sdram读写处理方法
JP4499982B2 (ja) * 2002-09-11 2010-07-14 株式会社日立製作所 メモリシステム
CN100580640C (zh) * 2003-01-27 2010-01-13 松下电器产业株式会社 存储器控制装置
KR100539964B1 (ko) * 2003-06-27 2005-12-28 주식회사 하이닉스반도체 반도체 메모리 소자의 프리차지 장치 및 이를 이용한 프리차지 방법
EP1513072A3 (en) * 2003-09-02 2009-10-21 Thomson Licensing Method for multibank memory scheduling
EP1513157A1 (en) * 2003-09-02 2005-03-09 Deutsche Thomson-Brandt GmbH Method for multibank memory scheduling
JP4069078B2 (ja) * 2004-01-07 2008-03-26 松下電器産業株式会社 Ｄｒａｍ制御装置およびｄｒａｍ制御方法
TWI247539B (en) 2004-10-22 2006-01-11 Via Tech Inc Method and system for uploading the sub-title file
KR100666929B1 (ko) 2004-10-30 2007-01-11 주식회사 하이닉스반도체 메모리 뱅크 구조
JP4690424B2 (ja) * 2005-12-26 2011-06-01 パナソニック株式会社 コマンド処理装置、方法、及び集積回路装置
EP2226727A1 (en) * 2007-12-21 2010-09-08 Panasonic Corporation Memory device and memory device control method
JP2010211618A (ja) * 2009-03-11 2010-09-24 Toshiba Corp 半導体記憶装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0261751A3 (en) * 1986-09-25 1990-07-18 Tektronix, Inc. Concurrent memory access system
JPH03248243A (ja) * 1990-02-26 1991-11-06 Nec Corp 情報処理装置
US5226134A (en) * 1990-10-01 1993-07-06 International Business Machines Corp. Data processing system including a memory controller for direct or interleave memory accessing
AU5294193A (en) * 1992-10-01 1994-04-26 Flavors Technology Inc. Method and apparatus for memory interleave reduction

Also Published As

Publication number Publication date
JP2000315173A (ja) 2000-11-14
KR20010053272A (ko) 2001-06-25
WO2000067129A1 (en) 2000-11-09
CN1302405A (zh) 2001-07-04

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