HK53994A - Apparatus for maintaining consistency in a multi-processor computer system using virtual caching - Google Patents

Apparatus for maintaining consistency in a multi-processor computer system using virtual caching

Info

Publication number
HK53994A
HK53994A HK53994A HK53994A HK53994A HK 53994 A HK53994 A HK 53994A HK 53994 A HK53994 A HK 53994A HK 53994 A HK53994 A HK 53994A HK 53994 A HK53994 A HK 53994A
Authority
HK
Hong Kong
Prior art keywords
computer system
processor computer
maintaining consistency
virtual caching
caching
Prior art date
Application number
HK53994A
Other languages
English (en)
Inventor
Edmund Kelly
Michel Cekleov
Michel Dubois
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of HK53994A publication Critical patent/HK53994A/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G06F12/0831—Cache consistency protocols using a bus scheme, e.g. with bus monitoring or watching means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1045—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache
    • G06F12/1063—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache the data cache being concurrently virtually addressed

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Multi Processors (AREA)
HK53994A 1990-01-05 1994-05-24 Apparatus for maintaining consistency in a multi-processor computer system using virtual caching HK53994A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US46122590A 1990-01-05 1990-01-05

Publications (1)

Publication Number Publication Date
HK53994A true HK53994A (en) 1994-06-03

Family

ID=23831689

Family Applications (1)

Application Number Title Priority Date Filing Date
HK53994A HK53994A (en) 1990-01-05 1994-05-24 Apparatus for maintaining consistency in a multi-processor computer system using virtual caching

Country Status (6)

Country Link
US (1) US5361340A (xx)
JP (1) JP3493409B2 (xx)
KR (1) KR930004430B1 (xx)
CA (1) CA2026224C (xx)
GB (1) GB2239724B (xx)
HK (1) HK53994A (xx)

Families Citing this family (52)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06318174A (ja) * 1992-04-29 1994-11-15 Sun Microsyst Inc キャッシュ・メモリ・システム及び主メモリに記憶されているデータのサブセットをキャッシュする方法
JPH06290076A (ja) * 1993-04-05 1994-10-18 Nec Ic Microcomput Syst Ltd デバッグ装置
DE69429777T2 (de) * 1993-09-30 2002-10-17 Apple Computer System zur dezentralen massenspeichersteuerung eines rechners mit virtuellem speicher
US5813046A (en) * 1993-11-09 1998-09-22 GMD--Forschungszentrum Informationstechnik GmbH Virtually indexable cache memory supporting synonyms
US5588129A (en) * 1994-02-09 1996-12-24 Ballard; Clinton L. Cache for optical storage device and method for implementing same
US5584007A (en) * 1994-02-09 1996-12-10 Ballard Synergy Corporation Apparatus and method for discriminating among data to be stored in cache
SE515718C2 (sv) * 1994-10-17 2001-10-01 Ericsson Telefon Ab L M System och förfarande för behandling av minnesdata samt kommunikationssystem
US6006312A (en) * 1995-02-27 1999-12-21 Sun Microsystems, Inc. Cachability attributes of virtual addresses for optimizing performance of virtually and physically indexed caches in maintaining multiply aliased physical addresses
US5787476A (en) * 1995-05-05 1998-07-28 Silicon Graphics, Inc. System and method for maintaining coherency of virtual-to-physical memory translations in a multiprocessor computer
JPH0926945A (ja) * 1995-07-10 1997-01-28 Toshiba Corp 情報処理装置
US5809537A (en) * 1995-12-08 1998-09-15 International Business Machines Corp. Method and system for simultaneous processing of snoop and cache operations
US5787445A (en) * 1996-03-07 1998-07-28 Norris Communications Corporation Operating system including improved file management for use in devices utilizing flash memory as main memory
US6041396A (en) * 1996-03-14 2000-03-21 Advanced Micro Devices, Inc. Segment descriptor cache addressed by part of the physical address of the desired descriptor
US5897664A (en) * 1996-07-01 1999-04-27 Sun Microsystems, Inc. Multiprocessor system having mapping table in each node to map global physical addresses to local physical addresses of page copies
US6199152B1 (en) 1996-08-22 2001-03-06 Transmeta Corporation Translated memory protection apparatus for an advanced microprocessor
US5991819A (en) * 1996-12-03 1999-11-23 Intel Corporation Dual-ported memory controller which maintains cache coherency using a memory line status table
US6282625B1 (en) 1997-06-25 2001-08-28 Micron Electronics, Inc. GART and PTES defined by configuration registers
US6249853B1 (en) 1997-06-25 2001-06-19 Micron Electronics, Inc. GART and PTES defined by configuration registers
US6069638A (en) * 1997-06-25 2000-05-30 Micron Electronics, Inc. System for accelerated graphics port address remapping interface to main memory
KR100421687B1 (ko) * 1997-08-11 2004-03-10 트랜스메타 코포레이션 개선된 마이크로프로세서를 위한 변환 메모리 보호 장치
CN100392618C (zh) * 1997-08-11 2008-06-04 全斯美达有限公司 保护计算机内存储器被写入的系统、方法和设备
US6304910B1 (en) * 1997-09-24 2001-10-16 Emulex Corporation Communication processor having buffer list modifier control bits
US6148387A (en) 1997-10-09 2000-11-14 Phoenix Technologies, Ltd. System and method for securely utilizing basic input and output system (BIOS) services
US6252612B1 (en) 1997-12-30 2001-06-26 Micron Electronics, Inc. Accelerated graphics port for multiple memory controller computer system
US6157398A (en) * 1997-12-30 2000-12-05 Micron Technology, Inc. Method of implementing an accelerated graphics port for a multiple memory controller computer system
US7071946B2 (en) * 1997-12-30 2006-07-04 Micron Technology, Inc. Accelerated graphics port for a multiple memory controller computer system
KR19990070788A (ko) * 1998-02-24 1999-09-15 윤종용 가상캐쉬 메모리의 어라이징 방지방법
US6275872B1 (en) * 1998-10-20 2001-08-14 Bellsouth Intellectual Property Corporation Method for performing migration of uninitialized entries from a storage to a repository within an intelligent peripheral in an advanced intelligent network
US7065633B1 (en) 1999-01-28 2006-06-20 Ati International Srl System for delivering exception raised in first architecture to operating system coded in second architecture in dual architecture CPU
US7111290B1 (en) * 1999-01-28 2006-09-19 Ati International Srl Profiling program execution to identify frequently-executed portions and to assist binary translation
US7941647B2 (en) 1999-01-28 2011-05-10 Ati Technologies Ulc Computer for executing two instruction sets and adds a macroinstruction end marker for performing iterations after loop termination
US7275246B1 (en) 1999-01-28 2007-09-25 Ati International Srl Executing programs for a first computer architecture on a computer of a second architecture
US7013456B1 (en) 1999-01-28 2006-03-14 Ati International Srl Profiling execution of computer programs
US8127121B2 (en) 1999-01-28 2012-02-28 Ati Technologies Ulc Apparatus for executing programs for a first computer architechture on a computer of a second architechture
US6763452B1 (en) 1999-01-28 2004-07-13 Ati International Srl Modifying program execution based on profiling
US6954923B1 (en) 1999-01-28 2005-10-11 Ati International Srl Recording classification of instructions executed by a computer
US8074055B1 (en) 1999-01-28 2011-12-06 Ati Technologies Ulc Altering data storage conventions of a processor when execution flows from first architecture code to second architecture code
US8121828B2 (en) 1999-01-28 2012-02-21 Ati Technologies Ulc Detecting conditions for transfer of execution from one computer instruction stream to another and executing transfer on satisfaction of the conditions
US6978462B1 (en) 1999-01-28 2005-12-20 Ati International Srl Profiling execution of a sequence of events occuring during a profiled execution interval that matches time-independent selection criteria of events to be profiled
US6779107B1 (en) 1999-05-28 2004-08-17 Ati International Srl Computer execution by opportunistic adaptation
US7254806B1 (en) 1999-08-30 2007-08-07 Ati International Srl Detecting reordered side-effects
US6469705B1 (en) * 1999-09-21 2002-10-22 Autodesk Canada Inc. Cache addressing
US6934832B1 (en) 2000-01-18 2005-08-23 Ati International Srl Exception mechanism for a computer
US6968469B1 (en) 2000-06-16 2005-11-22 Transmeta Corporation System and method for preserving internal processor context when the processor is powered down and restoring the internal processor context when processor is restored
US7502901B2 (en) * 2003-03-26 2009-03-10 Panasonic Corporation Memory replacement mechanism in semiconductor device
JP4783229B2 (ja) * 2006-07-19 2011-09-28 パナソニック株式会社 キャッシュメモリシステム
JP4821887B2 (ja) * 2009-06-08 2011-11-24 日本電気株式会社 コヒーレンシ制御システム、コヒーレンシ制御装置及びコヒーレンシ制御方法
US8719547B2 (en) 2009-09-18 2014-05-06 Intel Corporation Providing hardware support for shared virtual memory between local and remote physical memory
KR101355105B1 (ko) * 2012-01-03 2014-01-23 서울대학교산학협력단 캐시 일관성 보장을 위한 공유 가상 메모리 관리 장치
US9678872B2 (en) * 2015-01-16 2017-06-13 Oracle International Corporation Memory paging for processors using physical addresses
US11550455B2 (en) * 2016-06-07 2023-01-10 Palo Alto Research Center Incorporated Localized visual graph filters for complex graph queries
US10747679B1 (en) * 2017-12-11 2020-08-18 Amazon Technologies, Inc. Indexing a memory region

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB232526A (en) * 1924-09-22 1925-04-23 Progression Sa Improvements relating to change speed gearing
US4136385A (en) * 1977-03-24 1979-01-23 International Business Machines Corporation Synonym control means for multiple virtual storage systems
US4400770A (en) * 1980-11-10 1983-08-23 International Business Machines Corporation Cache synonym detection and handling means
US4985829A (en) * 1984-07-31 1991-01-15 Texas Instruments Incorporated Cache hierarchy design for use in a memory management unit
US4785398A (en) * 1985-12-19 1988-11-15 Honeywell Bull Inc. Virtual cache system using page level number generating CAM to access other memories for processing requests relating to a page
US4885680A (en) * 1986-07-25 1989-12-05 International Business Machines Corporation Method and apparatus for efficiently handling temporarily cacheable data
US5091846A (en) * 1986-10-03 1992-02-25 Intergraph Corporation Cache providing caching/non-caching write-through and copyback modes for virtual addresses and including bus snooping to maintain coherency
US5113510A (en) * 1987-12-22 1992-05-12 Thinking Machines Corporation Method and apparatus for operating a cache memory in a multi-processor
US4992930A (en) * 1988-05-09 1991-02-12 Bull Hn Information Systems Inc. Synchronous cache memory system incorporating tie-breaker apparatus for maintaining cache coherency using a duplicate directory
GB8814076D0 (en) * 1988-06-14 1988-07-20 Int Computers Ltd Data processing system
US4939641A (en) * 1988-06-30 1990-07-03 Wang Laboratories, Inc. Multi-processor system with cache memories
US5097409A (en) * 1988-06-30 1992-03-17 Wang Laboratories, Inc. Multi-processor system with cache memories
US5029070A (en) * 1988-08-25 1991-07-02 Edge Computer Corporation Coherent cache structures and methods
US5148533A (en) * 1989-01-05 1992-09-15 Bull Hn Information Systems Inc. Apparatus and method for data group coherency in a tightly coupled data processing system with plural execution and data cache units
US5222224A (en) * 1989-02-03 1993-06-22 Digital Equipment Corporation Scheme for insuring data consistency between a plurality of cache memories and the main memory in a multi-processor system

Also Published As

Publication number Publication date
JPH03220644A (ja) 1991-09-27
GB9018686D0 (en) 1990-10-10
KR910014814A (ko) 1991-08-31
JP3493409B2 (ja) 2004-02-03
GB2239724B (en) 1993-11-24
KR930004430B1 (ko) 1993-05-27
CA2026224C (en) 1995-10-10
CA2026224A1 (en) 1991-07-06
US5361340A (en) 1994-11-01
GB2239724A (en) 1991-07-10

Similar Documents

Publication Publication Date Title
GB2239724B (en) Apparatus for maintaining consistency in a multi-processor computer system using virtual caching
GB2202381B (en) Improvements in or relating to support apparatus for portable computer expansion unit
EP0451963A3 (en) Interactive computer system
GB2136996B (en) Multiprocessor computer system for forming a picture display
EP0486239A3 (en) Rasterization processor for a computer graphics system
DE69131816D1 (de) Computerunterstütztes Lieferungssystem für Ausbildung
EP0505029A3 (en) Multi-processor computer system
EP0421818A3 (en) Interactive computer graphics system for making precise drawings
IL116353A (en) Multiprocessing computer system
EP0414565A3 (en) Portable graphic computer apparatus
SG47048A1 (en) Method and apparatus for operating a single cpu computer system as a multiprocessor system
EP0489594A3 (en) Computer graphics system
FR2544939B1 (fr) Systeme et procede de reprojection d'images acquises par retroprojection en tomodensitographie
EP0311034A3 (en) Cache memory control apparatus for a virtual memory data-processing system
EP0462446A3 (en) System for simulating computer program execution
EP0483967A3 (en) Apparatus for increasing the number of registers available in a computer processor
AU586282B2 (en) Arithmetic unit for use in a data processing system
EP0486195A3 (en) Computer graphics system
GB9102732D0 (en) Computer system
EP0338089A4 (en) Apparatus for protecting local memory in a multiprocessor system
SG33394G (en) Apparatus for maintaining consistency in a multi-processor computer system using virtual caching.
GB2257878B (en) Method for tracing line image in an image processor
EP0422643A3 (en) Computing system for data processing apparatus
GB2233480B (en) Multiprocessor data processing system
AU8096391A (en) Computer aided design system utilizing large surface image

Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)