HK2296A - Apparatus and method for synchronization of arithmetic exceptions in parallel pipelined execution units - Google Patents

Apparatus and method for synchronization of arithmetic exceptions in parallel pipelined execution units

Info

Publication number
HK2296A
HK2296A HK2296A HK2296A HK2296A HK 2296 A HK2296 A HK 2296A HK 2296 A HK2296 A HK 2296A HK 2296 A HK2296 A HK 2296A HK 2296 A HK2296 A HK 2296A
Authority
HK
Hong Kong
Prior art keywords
instructions
execution units
arithmetic
exception
instruction
Prior art date
Application number
HK2296A
Other languages
English (en)
Inventor
David N Cutler
David A Orbits
Dileep Bhandarkar
Wayne Cardoza
Richard T Witek
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Publication of HK2296A publication Critical patent/HK2296A/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30079—Pipeline control instructions, e.g. multicycle NOP
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Image Processing (AREA)
HK2296A 1987-03-20 1996-01-04 Apparatus and method for synchronization of arithmetic exceptions in parallel pipelined execution units HK2296A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US2824887A 1987-03-20 1987-03-20
PCT/US1988/000815 WO1988007239A1 (en) 1987-03-20 1988-03-18 Apparatus and method for synchronization of arithmetic exceptions in parallel pipelined execution units

Publications (1)

Publication Number Publication Date
HK2296A true HK2296A (en) 1996-01-12

Family

ID=21842385

Family Applications (1)

Application Number Title Priority Date Filing Date
HK2296A HK2296A (en) 1987-03-20 1996-01-04 Apparatus and method for synchronization of arithmetic exceptions in parallel pipelined execution units

Country Status (10)

Country Link
EP (1) EP0307448B1 (xx)
JP (1) JP2778717B2 (xx)
AT (1) ATE85853T1 (xx)
AU (1) AU615438B2 (xx)
CA (1) CA1304823C (xx)
DE (1) DE3878513T2 (xx)
DK (1) DK647888A (xx)
HK (1) HK2296A (xx)
IE (1) IE62074B1 (xx)
WO (1) WO1988007239A1 (xx)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5197133A (en) * 1988-12-19 1993-03-23 Bull Hn Information Systems Inc. Control store addressing from multiple sources
US5075840A (en) * 1989-01-13 1991-12-24 International Business Machines Corporation Tightly coupled multiprocessor instruction synchronization
EP0510429A3 (en) * 1991-04-24 1993-12-01 Ibm Millicode register management system
CA2060555A1 (en) * 1991-04-24 1992-10-25 Robert J. Bullions, Iii System and method for draining an instruction pipeline
US6044456A (en) * 1998-01-05 2000-03-28 Intel Corporation Electronic system and method for maintaining synchronization of multiple front-end pipelines
US8078843B2 (en) 2008-01-31 2011-12-13 International Business Machines Corporation Facilitating processing in a computing environment using an extended drain instruction

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS564844A (en) * 1979-06-26 1981-01-19 Nec Corp Information processor
JPS6043535B2 (ja) * 1979-12-29 1985-09-28 富士通株式会社 情報処理装置
JPS61285541A (ja) * 1985-06-13 1986-12-16 Nec Corp 情報処理装置
IN170672B (xx) * 1987-07-01 1992-05-02 Digital Equipment Corp
US5063497A (en) * 1987-07-01 1991-11-05 Digital Equipment Corporation Apparatus and method for recovering from missing page faults in vector data processing operations

Also Published As

Publication number Publication date
DK647888D0 (da) 1988-11-18
EP0307448B1 (en) 1993-02-17
ATE85853T1 (de) 1993-03-15
DE3878513T2 (de) 1993-09-16
CA1304823C (en) 1992-07-07
JP2778717B2 (ja) 1998-07-23
DK647888A (da) 1988-11-18
AU1490888A (en) 1988-10-10
DE3878513D1 (de) 1993-03-25
IE62074B1 (en) 1994-12-14
IE880818L (en) 1988-09-20
JPH01503340A (ja) 1989-11-09
WO1988007239A1 (en) 1988-09-22
EP0307448A1 (en) 1989-03-22
AU615438B2 (en) 1991-10-03

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Legal Events

Date Code Title Description
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)