HK1025695A1 - Signal processing method and device - Google Patents

Signal processing method and device

Info

Publication number
HK1025695A1
HK1025695A1 HK00104859A HK00104859A HK1025695A1 HK 1025695 A1 HK1025695 A1 HK 1025695A1 HK 00104859 A HK00104859 A HK 00104859A HK 00104859 A HK00104859 A HK 00104859A HK 1025695 A1 HK1025695 A1 HK 1025695A1
Authority
HK
Hong Kong
Prior art keywords
signal
sigma
delta modulator
pdm
noise ratio
Prior art date
Application number
HK00104859A
Other languages
English (en)
Inventor
Lauri Lipasti
Arhippa Kovanen
Original Assignee
Atmel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Corp filed Critical Atmel Corp
Publication of HK1025695A1 publication Critical patent/HK1025695A1/xx

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/30Delta-sigma modulation
    • H03M3/458Analogue/digital converters using delta-sigma modulation as an intermediate step
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3002Conversion to or from differential modulation
    • H03M7/3004Digital delta-sigma modulation
    • H03M7/3015Structural details of digital delta-sigma modulators
    • H03M7/302Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution
    • H03M7/3024Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only
    • H03M7/3028Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only the quantiser being a single bit one
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3002Conversion to or from differential modulation
    • H03M7/3004Digital delta-sigma modulation
    • H03M7/3015Structural details of digital delta-sigma modulators
    • H03M7/3031Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path
    • H03M7/3033Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs
    • H03M7/304Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs with distributed feedback, i.e. with feedback paths from the quantiser output to more than one filter stage

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Analogue/Digital Conversion (AREA)
HK00104859A 1997-10-09 2000-08-03 Signal processing method and device HK1025695A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI973919A FI103745B1 (fi) 1997-10-09 1997-10-09 Signaalinkäsittelymenetelmä ja -laite
PCT/US1998/017743 WO1999020004A1 (en) 1997-10-09 1998-08-26 Signal processing method and device

Publications (1)

Publication Number Publication Date
HK1025695A1 true HK1025695A1 (en) 2000-11-17

Family

ID=8549695

Family Applications (1)

Application Number Title Priority Date Filing Date
HK00104859A HK1025695A1 (en) 1997-10-09 2000-08-03 Signal processing method and device

Country Status (11)

Country Link
EP (1) EP1021876A4 (xx)
JP (1) JP2002510455A (xx)
KR (1) KR20010012348A (xx)
CN (1) CN1112777C (xx)
CA (1) CA2274637A1 (xx)
FI (1) FI103745B1 (xx)
HK (1) HK1025695A1 (xx)
MY (1) MY133001A (xx)
NO (1) NO992777L (xx)
TW (1) TW408531B (xx)
WO (1) WO1999020004A1 (xx)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1195353C (zh) * 2001-12-03 2005-03-30 方虎堂 脉冲面积调制数字功率处理方法及装置
US6606044B2 (en) 2002-01-02 2003-08-12 Motorola, Inc. Method and apparatus for generating a pulse width modulated signal
KR101853818B1 (ko) 2011-07-29 2018-06-15 삼성전자주식회사 오디오 신호 처리 방법 및 그에 따른 오디오 신호 처리 장치
EP2927805A1 (en) * 2014-03-31 2015-10-07 Nxp B.V. Control system
TWI559202B (zh) * 2014-10-01 2016-11-21 義隆電子股份有限公司 電容式觸控裝置及其刺激訊號產生電路與方法
CN110310635B (zh) * 2019-06-24 2022-03-22 Oppo广东移动通信有限公司 语音处理电路及电子设备

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01204528A (ja) * 1988-02-10 1989-08-17 Fujitsu Ltd A/d変換器
DE69107059T2 (de) * 1990-01-31 1995-08-24 Analog Devices Inc Sigma-delta-modulator.
US5245344A (en) * 1991-01-15 1993-09-14 Crystal Semiconductor High order switched-capacitor filter with dac input
US5625358A (en) * 1993-09-13 1997-04-29 Analog Devices, Inc. Digital phase-locked loop utilizing a high order sigma-delta modulator
US5442353A (en) * 1993-10-25 1995-08-15 Motorola, Inc. Bandpass sigma-delta analog-to-digital converter (ADC), method therefor, and receiver using same
US5748126A (en) * 1996-03-08 1998-05-05 S3 Incorporated Sigma-delta digital-to-analog conversion system and process through reconstruction and resampling
JPH09266447A (ja) * 1996-03-28 1997-10-07 Sony Corp 語長変換装置及びデータ処理装置

Also Published As

Publication number Publication date
CN1256037A (zh) 2000-06-07
CA2274637A1 (en) 1999-04-22
NO992777L (no) 1999-07-28
CN1112777C (zh) 2003-06-25
KR20010012348A (ko) 2001-02-15
MY133001A (en) 2007-10-31
EP1021876A1 (en) 2000-07-26
FI103745B (fi) 1999-08-31
WO1999020004A1 (en) 1999-04-22
TW408531B (en) 2000-10-11
FI103745B1 (fi) 1999-08-31
FI973919A (fi) 1999-04-10
JP2002510455A (ja) 2002-04-02
NO992777D0 (no) 1999-06-08
EP1021876A4 (en) 2003-05-02
FI973919A0 (fi) 1997-10-09

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Legal Events

Date Code Title Description
PF Patent in force
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20120826