GB988115A - Method of fabricating semiconductor devices - Google Patents

Method of fabricating semiconductor devices

Info

Publication number
GB988115A
GB988115A GB2529963A GB2529963A GB988115A GB 988115 A GB988115 A GB 988115A GB 2529963 A GB2529963 A GB 2529963A GB 2529963 A GB2529963 A GB 2529963A GB 988115 A GB988115 A GB 988115A
Authority
GB
United Kingdom
Prior art keywords
wafer
photoresist
layer
portions
silicon oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2529963A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RCA Corp
Original Assignee
RCA Corp
Radio Corporation of America
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RCA Corp, Radio Corporation of America filed Critical RCA Corp
Publication of GB988115A publication Critical patent/GB988115A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/7688Filling of holes, grooves or trenches, e.g. vias, with conductive material by deposition over sacrificial masking layer, e.g. lift-off
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291Oxides or nitrides or carbides, e.g. ceramics, glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293Organic, e.g. plastic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Weting (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

988,115. Semi-conductor devices. RADIO CORPORATION OF AMERICA. June 25, 1963 [July 31, 1962], No. 25299/63. Heading H1K. At least one major face of a wafer of semiconductor material is coated with silicon oxide upon which a layer of photoresist is deposited and after exposing portions thereof to light the unexposed portions are removed together with the silicon oxide regions thereby exposed and metal film is then deposited over this face of the assembly after which the wafer is treated in an organic solvent which softens the resist and removes the remaining portions thereof together with the corresponding overlying regions of the metal film. In the embodiment a wafer of N-type silicon 10 (Fig. 1a) has a number of P-N junctions 14 formed therein by diffusion of boron into the surface. A further diffusion of arsenic or phosphorus into the P-type regions 13 produces further P-N junctions 16. A coating of silicon oxide 17 is then formed on the semi-conductor surface by heating the wafer in steam, and a layer of photoresist 18 deposited on the coating 17. On top of the photoresist, which may consist of bichromated proteins or of film forming polyesters derived from 2-propenylidene malonic compounds and bifunctional glycols, is placed a glass mask plate 19 having a pattern of darkened areas 20 thereon. Irradiation of the mask by ultra-violet radiation from 3 to 5 minutes followed by a treatment of the coated wafer in an organic solvent such as liquid hydrocarbons, alcohols, or mixtures thereof produces the configuration shown in Fig. 1c. The whole of the exposed top surface of the device is then coated by evaporation with aluminium or a film of metallic alloys before immersion in a solvent which softens the photoresist 18. The remaining portions of the layer 18 are then removed, together with the metal film portions covering these parts of the layer 18. After subdivision the individual elements are finished off in conventional manner.
GB2529963A 1962-07-31 1963-06-25 Method of fabricating semiconductor devices Expired GB988115A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US21369562A 1962-07-31 1962-07-31

Publications (1)

Publication Number Publication Date
GB988115A true GB988115A (en) 1965-04-07

Family

ID=22796141

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2529963A Expired GB988115A (en) 1962-07-31 1963-06-25 Method of fabricating semiconductor devices

Country Status (4)

Country Link
BE (1) BE635672A (en)
DE (1) DE1246127B (en)
GB (1) GB988115A (en)
NL (1) NL295980A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0050415A1 (en) * 1980-09-15 1982-04-28 Photon Power Inc. Process for forming a pattern of transparent conductive material
EP0072933A1 (en) * 1981-08-24 1983-03-02 International Business Machines Corporation Method for photolithographic pattern generation in a photoresist layer

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3386864A (en) * 1963-12-09 1968-06-04 Ibm Semiconductor-metal-semiconductor structure
DE2929739C2 (en) * 1979-07-23 1984-10-31 Brown, Boveri & Cie Ag, 6800 Mannheim Method for removing part of a metal layer from a semiconductor wafer

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE555335A (en) * 1956-02-28
FR77789E (en) * 1957-08-12 1962-04-20 Int Standard Electric Corp Improvements in Junction Semiconductor Devices and Method of Making Them
BE570279A (en) * 1957-08-12 1900-01-01
US2981877A (en) * 1959-07-30 1961-04-25 Fairchild Semiconductor Semiconductor device-and-lead structure

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0050415A1 (en) * 1980-09-15 1982-04-28 Photon Power Inc. Process for forming a pattern of transparent conductive material
EP0072933A1 (en) * 1981-08-24 1983-03-02 International Business Machines Corporation Method for photolithographic pattern generation in a photoresist layer

Also Published As

Publication number Publication date
BE635672A (en)
DE1246127B (en) 1967-08-03
NL295980A (en)

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