GB2552117B - Method and apparatus for performing a shift and exclusive or operation in a single instruction - Google Patents
Method and apparatus for performing a shift and exclusive or operation in a single instructionInfo
- Publication number
- GB2552117B GB2552117B GB1715480.8A GB201715480A GB2552117B GB 2552117 B GB2552117 B GB 2552117B GB 201715480 A GB201715480 A GB 201715480A GB 2552117 B GB2552117 B GB 2552117B
- Authority
- GB
- United Kingdom
- Prior art keywords
- exclusive
- shift
- single instruction
- instruction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/3001—Arithmetic instructions
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30029—Logical and Boolean instructions, e.g. XOR, NOT
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/3016—Decoding the operand specifier, e.g. specifier format
- G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
- G06F9/3816—Instruction alignment, e.g. cache line crossing
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
- G06F9/3893—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Computational Mathematics (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Analysis (AREA)
- Executing Machine-Instructions (AREA)
- Advance Control (AREA)
- Complex Calculations (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/653,704 US9747105B2 (en) | 2009-12-17 | 2009-12-17 | Method and apparatus for performing a shift and exclusive or operation in a single instruction |
| GB1119720.9A GB2483575B (en) | 2009-12-17 | 2010-10-29 | Method and apparatus for performing a shift and exclusive or operation in a single instruction |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| GB201715480D0 GB201715480D0 (en) | 2017-11-08 |
| GB2552117A GB2552117A (en) | 2018-01-10 |
| GB2552117B true GB2552117B (en) | 2018-07-18 |
Family
ID=44152595
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB1715480.8A Active GB2552117B (en) | 2009-12-17 | 2010-10-29 | Method and apparatus for performing a shift and exclusive or operation in a single instruction |
| GB1119720.9A Active GB2483575B (en) | 2009-12-17 | 2010-10-29 | Method and apparatus for performing a shift and exclusive or operation in a single instruction |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB1119720.9A Active GB2483575B (en) | 2009-12-17 | 2010-10-29 | Method and apparatus for performing a shift and exclusive or operation in a single instruction |
Country Status (8)
| Country | Link |
|---|---|
| US (5) | US9747105B2 (enExample) |
| JP (5) | JP5567668B2 (enExample) |
| KR (1) | KR101411064B1 (enExample) |
| CN (7) | CN104699456B (enExample) |
| DE (1) | DE112010004887B4 (enExample) |
| GB (2) | GB2552117B (enExample) |
| TW (5) | TWI562067B (enExample) |
| WO (1) | WO2011084214A2 (enExample) |
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| US8515052B2 (en) | 2007-12-17 | 2013-08-20 | Wai Wu | Parallel signal processing system and method |
| US9747105B2 (en) * | 2009-12-17 | 2017-08-29 | Intel Corporation | Method and apparatus for performing a shift and exclusive or operation in a single instruction |
| WO2013081588A1 (en) * | 2011-11-30 | 2013-06-06 | Intel Corporation | Instruction and logic to provide vector horizontal compare functionality |
| US10318291B2 (en) | 2011-11-30 | 2019-06-11 | Intel Corporation | Providing vector horizontal compare functionality within a vector register |
| WO2013095513A1 (en) * | 2011-12-22 | 2013-06-27 | Intel Corporation | Packed data operation mask shift processors, methods, systems, and instructions |
| CN104185837B (zh) | 2011-12-23 | 2017-10-13 | 英特尔公司 | 在不同的粒度等级下广播数据值的指令执行单元 |
| WO2013095618A1 (en) | 2011-12-23 | 2013-06-27 | Intel Corporation | Instruction execution that broadcasts and masks data values at different levels of granularity |
| EP2798804A4 (en) * | 2011-12-26 | 2015-09-23 | Intel Corp | COMMUNICATION BETWEEN COPROCESSORS WITH DIRECT CONNECTION SYNCHRONIZATION |
| CN104025033B (zh) | 2011-12-30 | 2017-11-21 | 英特尔公司 | 利用控制操纵的simd可变移位和循环 |
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2009
- 2009-12-17 US US12/653,704 patent/US9747105B2/en active Active
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2010
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5909520A (en) * | 1997-08-25 | 1999-06-01 | The United States Of America As Represented By The Secretary Of The Navy | Noise coding processor |
| JP2001142694A (ja) * | 1999-10-01 | 2001-05-25 | Hitachi Ltd | データフィールドのエンコード方法、情報フィールドの拡張方法、及び、コンピュータシステム |
Non-Patent Citations (1)
| Title |
|---|
| Saziedes et al., "Implementation of Context Based Value Predictors", December 1997, Technical Report #ECE-TR-97-8, University of Wisconsin-Madison. * |
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