GB2345364B - Information processing system - Google Patents

Information processing system

Info

Publication number
GB2345364B
GB2345364B GB0007303A GB0007303A GB2345364B GB 2345364 B GB2345364 B GB 2345364B GB 0007303 A GB0007303 A GB 0007303A GB 0007303 A GB0007303 A GB 0007303A GB 2345364 B GB2345364 B GB 2345364B
Authority
GB
United Kingdom
Prior art keywords
processor
processors
bus
unit
multiplex
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0007303A
Other versions
GB2345364A (en
GB0007303D0 (en
Inventor
Tohru Watabe
Yasutomo Sakurai
Takumi Kishino
Yoshio Hirose
Kouichi Odahara
Kazuhiro Nonomura
Takumi Takeno
Shinya Kato
Takato Noda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP07354196A external-priority patent/JP3502216B2/en
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority claimed from GB9929773A external-priority patent/GB2342479B/en
Publication of GB0007303D0 publication Critical patent/GB0007303D0/en
Publication of GB2345364A publication Critical patent/GB2345364A/en
Application granted granted Critical
Publication of GB2345364B publication Critical patent/GB2345364B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1658—Data re-synchronization of a redundant component, or initial sync of replacement, additional or spare unit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/1654—Error detection by comparing the output of redundant processing systems where the output of only one of the redundant processing components can drive the attached hardware, e.g. memory or I/O
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1679—Temporal synchronisation or re-synchronisation of redundant processing components at clock signal level
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/181—Eliminating the failing redundant component
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/182—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits based on mutual exchange of the output between redundant processing components
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2002—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
    • G06F11/2007—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)

Abstract

A Triple Modular Redundancy (TMR) unit 10 comprises a plurality of processors connected by a bus and simultaneously executing the same processing operation. One of the processors is a master processor and the remaining processors are slaves. Information formed only by the master processor is outputted to the bus. Each processor has a multiplex control circuit 48 which compares the output information formed by the respective processor with the information outputted to the bus, thereby detecting a failure and allowing an internal circuit 46 to execute necessary processes. Various aspects of the TMR unit are described, but the claims relate to using an existence processor display flag circuit (340, Fig. 27A) indicating which processor(s) is/are normally operating among the plurality of processors constructing the multiplex unit and which processor(s) is/are disconnected from the multiplex unit due to a failure or the like.
GB0007303A 1995-07-13 1996-07-08 Information processing system Expired - Fee Related GB2345364B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP17710295 1995-07-13
JP07354196A JP3502216B2 (en) 1995-07-13 1996-03-28 Information processing equipment
GB9929773A GB2342479B (en) 1995-07-13 1996-07-08 Information processing system

Publications (3)

Publication Number Publication Date
GB0007303D0 GB0007303D0 (en) 2000-05-17
GB2345364A GB2345364A (en) 2000-07-05
GB2345364B true GB2345364B (en) 2000-08-16

Family

ID=27269827

Family Applications (2)

Application Number Title Priority Date Filing Date
GB9614344A Expired - Fee Related GB2303234B (en) 1995-07-13 1996-07-08 Information processing system
GB0007303A Expired - Fee Related GB2345364B (en) 1995-07-13 1996-07-08 Information processing system

Family Applications Before (1)

Application Number Title Priority Date Filing Date
GB9614344A Expired - Fee Related GB2303234B (en) 1995-07-13 1996-07-08 Information processing system

Country Status (1)

Country Link
GB (2) GB2303234B (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2268817A (en) * 1992-07-17 1994-01-19 Integrated Micro Products Ltd Fault-tolerant computer system
WO1994008293A1 (en) * 1992-10-02 1994-04-14 Compaq Computer Corporation Method and apparatus for operating tightly coupled mirrored processors

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2268817A (en) * 1992-07-17 1994-01-19 Integrated Micro Products Ltd Fault-tolerant computer system
WO1994008293A1 (en) * 1992-10-02 1994-04-14 Compaq Computer Corporation Method and apparatus for operating tightly coupled mirrored processors

Also Published As

Publication number Publication date
GB2303234A (en) 1997-02-12
GB2303234B (en) 2000-06-07
GB2345364A (en) 2000-07-05
GB0007303D0 (en) 2000-05-17
GB9614344D0 (en) 1996-09-04

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20050708