GB2323475A - Controlling the generation of hillocks in liquid crystal devices - Google Patents
Controlling the generation of hillocks in liquid crystal devices Download PDFInfo
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- GB2323475A GB2323475A GB9813759A GB9813759A GB2323475A GB 2323475 A GB2323475 A GB 2323475A GB 9813759 A GB9813759 A GB 9813759A GB 9813759 A GB9813759 A GB 9813759A GB 2323475 A GB2323475 A GB 2323475A
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- 239000002184 metal Substances 0.000 claims abstract description 156
- 239000000758 substrate Substances 0.000 claims abstract description 50
- 239000003870 refractory metal Substances 0.000 claims abstract description 30
- 238000009792 diffusion process Methods 0.000 claims abstract description 6
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- 230000015572 biosynthetic process Effects 0.000 claims abstract description 4
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- 238000002844 melting Methods 0.000 claims description 15
- 229910000838 Al alloy Inorganic materials 0.000 abstract description 23
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 21
- 229910052782 aluminium Inorganic materials 0.000 abstract description 12
- 229910052750 molybdenum Inorganic materials 0.000 abstract description 4
- 229910052715 tantalum Inorganic materials 0.000 abstract description 4
- 229910052758 niobium Inorganic materials 0.000 abstract description 3
- 229910052719 titanium Inorganic materials 0.000 abstract description 3
- 229910052721 tungsten Inorganic materials 0.000 abstract description 3
- 239000004411 aluminium Substances 0.000 abstract 1
- 229910052720 vanadium Inorganic materials 0.000 abstract 1
- 229910052726 zirconium Inorganic materials 0.000 abstract 1
- 239000010408 film Substances 0.000 description 123
- 229910017141 AlTa Inorganic materials 0.000 description 50
- 238000000034 method Methods 0.000 description 27
- 239000010407 anodic oxide Substances 0.000 description 22
- 229920002120 photoresistant polymer Polymers 0.000 description 14
- 239000011521 glass Substances 0.000 description 13
- 238000004519 manufacturing process Methods 0.000 description 13
- 238000000137 annealing Methods 0.000 description 10
- 239000004065 semiconductor Substances 0.000 description 7
- 238000013459 approach Methods 0.000 description 6
- 238000007796 conventional method Methods 0.000 description 6
- 238000000151 deposition Methods 0.000 description 6
- 230000008021 deposition Effects 0.000 description 5
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 5
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- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- AZDRQVAHHNSJOQ-UHFFFAOYSA-N alumane Chemical group [AlH3] AZDRQVAHHNSJOQ-UHFFFAOYSA-N 0.000 description 2
- BYFGZMCJNACEKR-UHFFFAOYSA-N aluminium(i) oxide Chemical compound [Al]O[Al] BYFGZMCJNACEKR-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
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- VSZWPYCFIRKVQL-UHFFFAOYSA-N selanylidenegallium;selenium Chemical compound [Se].[Se]=[Ga].[Se]=[Ga] VSZWPYCFIRKVQL-UHFFFAOYSA-N 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- LEONUFNNVUYDNQ-UHFFFAOYSA-N vanadium atom Chemical compound [V] LEONUFNNVUYDNQ-UHFFFAOYSA-N 0.000 description 2
- 241000465531 Annea Species 0.000 description 1
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- 241001256590 Eulophia alta Species 0.000 description 1
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- 239000007788 liquid Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Thin Film Transistor (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
A liquid crystal display device comprises a substrate (1) a first metal layer (2a,b,c) formed on said substrate (1), and a second metal layer (3a,b,c) formed on said first metal layer (2a,b,c), the first and second metal layers having substantially the same coefficient of thermal expansion, and the first layer including a material for suppressing diffusion in said first layer during changes in temperature, due to the differences in the coefficients of thermal expansion of the first metal layer and said substrate, so that the formation of hillocks tends to be reduced. The first metal layer preferably comprises an alloy of aluminium and a diffusion-suppressing refractory metal such as Ta, Ti, Mo, W, Nb, Zr or V. The second metal layer may comprise aluminium or an aluminium alloy.
Description
CONTROLLING THE GENERATION OF HILLOCKS IN LIQUID CRYSTAL DEVICES
The present invention relates to a liquid crvstal display device, and more particularly, to a Liquid crystal display device in which the generation of hillocks
is controlled.
Thin film rraruistors (TFT) have been widely used as a switching device for Switching, in response to an image Signal, picture elements (pixel) in an active matrix liquid crystal dispiay device. This so called "TFT-LCD" is composed or
a bosom plare on which *ILin film transistors and corresponding pixel electrodes
are formed, a top plate having colour filters for corresponding pixel electrodes and a common electrode, and liquid crystal filled between the top and bottom
plates.
In the thin film transistor (TFT) of the above TFT-LCD, to reduce a line delay,
an aluminum metal film having a low resistivity is used for a gate electrode, a
gate line, source/drain electrodes, a pad and the Like. However, this type of
TFTs have a problem in that hillocks are generated on the surface of the alurnitturn metal film due to a compressive stress generated between the aluminum metal and an insulating substrate on which the aluminum metal is
formed.
The compressive stress is generated because the insulating substrate is bent due to the difference in the coefficients of thermal expansion between the insulating substrate and the aluminum metal during the subsequent high temperature process (e.g. deposition of a gate insulating film by plasma enhancement chemical vapor disposition "PECVD" and the like). More specifically, since the coefficient of thermal expansion of aluminum Al (about 20x1041 C) is greater than that of glass (about 4x1041 C) which constitutes the insulating substrate, the glass substrate inhibits the expansion of the aluminum metal film during the high temperature process, causing the substrate to bend or bulge.
Then such a compressive stress is applied to the aluminum metal film, aluminum atoms in the Al metal film tend to diffuse from the place where the stress is high to the place where the stress is low. Then, the aluminum atoms rise to the surface of the aluminum metal film to relieve the compressive stress, thereby generating the hillock.
Since the film which is deposited on the aluminum metal film in the subsequent process may not go over the sudden rise (or step) of the hillock, the metal line is shorted due to etchant in the subsequent etching process, deteriorating the process yield. To solve the above problem, various approaches have been proposed. For example, Fig. 1 is a plan view of a signal line of a conventional liquid crystal display device. The signal line is composed of a gate line 1 arranged on a substrate, a gate electrode 2 connected to gate line 1 (i.e., composed of 2a and in a vertical direction), and a pad 3 (i.e., composed of 2c connected to gate line 1 in a horizontal direction).
Fig. 2 is a cross-sectional view of the liquid crystal display of Fig. 1, taken along lines A-A', B-B', and C-C'. The cross-section taken along line A-A' is that of the gate electrode. The cross-section taken along line B-B' is that of the gate line. The cross-section taken along line C-C' is that of the pad. An Al metal line 2a, 2b, 2c of a single film structure is formed on an insulating substrate 1.
An anodic oxide film 3 is formed on the surface of each of Al metal lines 2a and 2b (i.e., gate lines 2a and 2b), and on Al metal line 2c (i.e., pad part 2c) except for an open portion thereof.
Further, a refractory metal 4 is formed on the portion of Al metal line 2c which is not covered by anodic oxide film 3. A gate insulating film 1 on which each
Al metal line 2a, 2b, 2c is formed except for the portion of Al metal line 2c on which the refractory metal is formed.
Figs. 3a, 3b, 3c and 3d are cross-sectional views for illustrating a conventional method of manufacturing the liquid crystal display of Fig. 1, taken along lines
A-A', B-B', and C-C' The cross-section taken along the line A-A' is that of the gate electrode. The cross-section taken along line B-B', is that of the gate line.
The cross-section taken along line C-C' is that of the pad. Referring to Fig. 3a, an Al metal is deposited on an insulating substrate 1. The Al metal is selectively removed photo-lithographically to form a gate electrode 2a, a gate line 2b, and a pad 2c constituting Al metal lines.
Referring to Fig. 3b, a photoresist (PR) film (not shown) is formed on the entire surface of insulating substrate 1 on which Al metal line 2a, 2b, 2c is formed.
Then, the PR film is patterned so as to be left only on Al metal line 2c of the pad. Using the patterned PR film as a mask, through anodic oxidation, an anodic oxide film 3 of Al2O is formed on the surface of Al metal lines 2a and 2b of the gate electrode and gate line, respectively, and on Al metal line 2c of the pad except for the part of the pad on which the PR is left (i.e., open portion of Al metal line 2c of the pad). The anodic oxidize film is not formed on the open portion of Al metal line 2c of the pad, to maintain the current flow in the electrode part performing TAB when the LCD is operated.
Referring to Fig. 3c, after removing the PR pattern, a refractory metal is deposited on the entire surface of insulating substrate 1 on which the Al metal line is formed. The refractory metal is photo-lithographically removed selectively to form a refractory metal film 4 only on the open portion of A1 metal line 2c where the pad is exposed. The refractory metal is left only on the open portion of the pad to suppress the hillock generated on the surface of the Al metal during the subsequent high temperature process (e.g., deposition of a gate insulating film by PECVD and the like).
Since no anodic oxide film is formed on the open portion of the pad, the hillock is generated on the surface of the Al metal of the pad during the subsequent high temperature process. This causes the metal line to be shorted due to etchant in the subsequent process, thereby deteriorating the yield. Since the refractory metal is left on the open portion of the pad, the hillock is suppressed due to the mechanical force applied from refractory metal film 4.
Referring to Fig. 3d, an insulating film is formed on the entire surface. Then, a PR film is formed on the entire surface except for refractory metal film 4 of the open portion of the pad. Using the PR film patterned as such as a mask, a gate insulating film 5 of the pad is removed. Then, the patterned photoresist film is removed, thereby forming a pad's open metal line 2c without gate insulating film 5 thereover.
In the above approach, an Al metal having a low resistivity is used as the signal line to minimize the line delay, but the hillock generated during the high temperature process is not suppressed by the anodic oxide film formed on the Al metal. Due to the generation of the hillock, the metal line is hosted by the etchant in the subsequent process, thereby deteriorating the yield.
In an alternative approach for suppressing the generation of the hillock on the aluminum metal, the gate electrode is formed in a single film structure of an aluminum alloy. In such an aluminum alloy, an impurity metal such as Ta, Si and Cu is added to an aluminum site in several atomic percents to suppress the diffusion of the aluminum, thereby inhibiting the generation of the hillock.
However, this approach has a drawback in that it tends to increase the line resistivity, thus making it inapplicable to large area and/or high definition TFT
LCDs.
For example, Fig. 4 is a cross-sectional view for illustrating another conventional method for making the liquid crystal display (shown in Japanese
Laid-Open patent application 6-104437), taken along lines A-A', B-B', and C-C' in Fig. 1. The cross-section taken along line A-A' is that of the gate electrode.
The cross-section taken along line B-B' is that of the gate line. The cross-section taken along line C-C' is that of the pad.
Referring to Fig. 4 each Al/AlTa metal line 2a, 2b, 2c is formed on an insulating substrate 1, and composed of an Al metal film and an AlTa metal film stacked on the Al metal film. An anodic oxide film 3 is formed on the surface of Al/AlTa metal lines 2a (i.e., gate electrode) and 2b (i.e., gate line) and on the sidewalls of Al/AITa metal line 2c of the pad. A gate insulating film 4 is formed over the entire surface of insulating substrate 1 on which Al/AlTa metal line 2a, 2b, 2c is formed except for the open portion of Al/AITa metal line 2c of the pad. A refractory metal 5 is formed on the open portion of Al/AITa metal line 2c of the pad and on a portion of gate insulating film 4.
Figs. 5a through Se are cross-sectional views for illustrating yet another conventional method of manufacturing the liquid crystal display taken along lines
A-A', B-B', and C-C'. the cross-section taken along line A-A' is that of the gate electrode. The cross-section taken along line B-B' is that of the gate line. The cross-section taken along line C-C' is that of the pad.
Referring to Fig. 5a, an Al metal is deposited on an insulating substrate 1. An
AlTa metal of an Al alloy having a refractory metal added to AlTa is deposited on the Al metal. The combined Al metal and AlTa metal film structure is selectively removed photo-lithographically, to form a Al/AlTa metal line 2 of a double film structure in which the AlTa film is stacked on the Al film.
Referring to Fig. Sb, a photoresist film 6 is formed on the entire surface of insulating substrate 1 on which each Al/AITa metal line 2a, 2b, 2c is formed.
Then, photoresist film 6 is patterned so as to be left only on the top portion of
Al/AlTa metal line 2c of the pad.
Referring to Fig. 5c, using the patterned photoresist film as a mask, through anodic oxidation, an anodic oxide film 3 is formed on the surface of Al/AlTa metal line 2a, 2b of the gate electrode and gate line, respectively, and only on the sidewalls of Al/AITa metal line 2c so as to expose the pad for electrical connection to the outside. An anodic oxide film, A1203 is formed on the sidewalls of the Al metal film of Al/AITa metal line 2a, 2b, 2c, and AlTaOx is formed on the surface of the AlTa metal film of Al/AlTa metal line 2a, 2b, and of the sidewalls of metal line 2c.
Referring to Fig. 5d, a gate insulating film 4 is deposited on the entire surface of insulating substrate 1 on which Al/AlTa metal line 2a, 2b 2c is formed. A gate insulating film 4 is removed photo-lithographically only from the top portion of Al/AlTa metal line 2c of the pad.
Referring to Fig. 5e, a refractory metal is deposited on the entire surface of gate insulating film 4, and Al/AITa metal line 2c in which the pad portion is exposed.
The refractory metal is selectively removed photo-litho-graphically, to form a refractory metal film 5 so as to be left only on the open portion of Al/AlTa metal line 2c. In the open portion of the pad where no anodic oxide film is formed, the generation of the hillock is inhibited only by the mechanical force applied thereto bythe AlTa film during the subsequent high temperature process (e.g., deposition of the gate insulating film by PECVD or CVD). To enhance such inhibition, refractory metals such as Cr. Nio and Ta are additionally deposited to cover the open portion of the pad.
According to the above approach, where a pure Al is used for the gate electrode, and an Al alloy having a refractory metal added to the Al metal is formed on the top of the Al electrode, the anodic oxide film and/or aluminum alloy (AlTa) over the Al electrode suppresses the hillock generated on the surface of the Al electrode during the subsequent high temperature process, due to the mechanical force applied to the Al electrode. However, the above approach has several drawbacks.
For example, the structure of the glass substrate/Al film/AlTa film stacked in that order does not suppress the Al diffusion caused by the compressive stress generated between the glass substrate and the Al film during the high temperature process. Therefore, when the mechanical force applied to the Al metal by the layers formed over the Al metal is not sufficient and/or no anodic oxidate film is formed over the Al metal, the generation of the hillock cannot be controlled sufficiently only by the mechanical force of the AlTa. It can reduce the number of hillocks, but large size hillocks still appear.
Further, to suppress the generation of the large size hillock, the Al alloy deposited on the Al metal is designed to have a thickness (i.e., about 2-3000 ) greater than that of the Al metal (i.e., about 1000 ). However, the deposition of thicker Al alloy having a higher resistivity on the Al metal increases the overall line delay. Furthermore, since the Al alloy (AlTa) has a high resistivity, it is not suitable for AM-LCDs with a large picture size, high aperture ratio or high resolution.
In order to solve the aforementioned problems, it is an object of the present invention to provide the structure of a liquid crystal display device and a method of manufacturing same, in which a process is simplified and a buffer layer is formed between a glass substrate and an Al metal film, thereby preventing or reducing the occurrence of hillocks.
According to a first aspect of the present invention, there is provided apparatus for a liquid crystal display device comprising: a substrate; a first metal layer over said substrate, said first metal layer including an aluminum alloy having a first metal with a first melting temperature; and a second metal layer over said first metal layer, said second metal layer including a pure aluminum or an aluminum alloy having a second metal with a second melting temperature lower than said first melting temperature. The invention also relates to a thin film transistor, a liquid crystal display and a contact pad for a liquid crystal device comprising the apparatus as described in the preceding paragraph.
According to a second aspect of the invention there is provided a method for making a liquid crystal display device, comprising the steps of: forming a first metal layer over a substrate, said first metal layer including an aluminum alloy having a first metal with a first melting temperature; and forming a second metal layer over said first metal layer, said second metal layer including a pure aluminum or an aluminum alloy having a second metal with a second melting temperature lower than said first melting temperature.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.
For a better understanding of the invention, embodiments will now be described by way of example, with reference to the accompanying drawings, in which:
Fig. 1 is a plan view of a signal line of a conventional liquid crystal display device;
Fig. 2 is a cross-sectional view of the liquid crystal display of Fig. 1, taken along lines A-A', B-B', and C-C'.
Figs. 3a, 3b, 3c and 3d are various cross-sectional views for illustrating a conventional method of manufacturing the liquid crystal display of Fig. 1, taken along lines A-A', B-B', and C-C'.
Fig. 4 is across-sectional view for illustrating another conventional method of manufacturing the liquid crystal display of Fig. 1, taken along the lines A-A',
B-B', and C-C'
Figs. 5a, Sb, Sc, Sd and Se are various cross-sectional views for illustrating another conventional method of manufacturing the liquid crystal display of Fig.
1, taken along lines A-A', B-B', and C-C'
Fig. 6 is a plan view of a liquid crystal display device according to an embodiment of the present invention
Figs. 7a, 7b and 7c are various cross-sectional views for illustrating a method of manufacturing the liquid crystal display of Fig. 6 according to an embodiment of the present invention, taken along lines A-A', B-B', and C-C'.
Fig. 8a, 8b, 8c, 8d and 8e are various cross-sectional views for illustrating another method of manufacturing the liquid crystal display of Fig. 6 according to an embodiment of the present invention, taken along lines A-A', B-B' and
C-C'.
Fig. 9 is a graph showing the density variation of the hillock formation versus the thickness of the AlTa buffer layer.
Fig. 10 is a graph showing the density variation of the hillock formation versus the annealing temperature.
Fig. 11 is a graph showing the size variation of the hillock versus the gate metal structure.
Fig. 12 is a cross-sectional view for illustrating yet another method of manufacturing the liquid crystal display of Fig. 6 according to an embodiment of the present invention, taken along lines A-A', B-B' and C-C'.
Fig. 13 is a cross-sectional view for illustrating yet another method of manufacturing the liquid crystal display of Fig. 6 according to an embodiment of the present invention, taken along lines A-A', B-B', and C-C'.
Fig. 6 is a plan view of a liquid crystal display device according to an embodiment of the present invention. A gate line 1 is arranged on a substrate.
A gate electrode 2 is formed so as to be connected with gate line 1 substantially perpendicular to gate line 1. A data line 3 is formed in the direction crossing gate line 1 perpendicularly.
Fig. 7a to 7c are various cross-sectional views for illustrating a method making the liquid crystal display of Fig. 6 according to an embodiment of the present invention, taken along lines A-A', B-B', and C-C'. The cross-section taken along line A-A' is that of the thin film transistor including gate electrode 2. The crosssection taken along line B-B' is that of the gate line. The cross-section taken along line C-C' is that of the pad representing date line 3.
In the structure of the liquid crystal display device, referring to Figs. 7b and 7c, each first metal layer 2a, 2b, 2c is formed on a substrate 1 and preferably composed of an aluminum alloy. In the Al alloy, an impurity is added to an aluminum site including a refractory metal having a first melting temperature.
On each first metal layer 2a, 2b, 2c, a corresponding second metal layer 3a, 3b, 3c, respectively, is formed. Each second metal layer 3a, 3b, 3c is preferably composed of a pure aluminum, or an aluminum alloy preferably having a refractory metal with a second melting temperature lower than the first melting temperature.
Further, a first anodic oxide film 4a is formed on the sidewalls of each first metal layer 2a, 2b, 2c; and a second anodic oxide film 4b is formed on the surface of each second metal layer 3a, 3b, and also on the surface of second metal layer 3c except for an open portion of second metal layer 3c of the pad.
A first insulating film 5 is formed on the entire surface of insulating substrate 1 and the entire surface of first and second metal layers 2a-2c and 3a-3c except for the open portion of second metal layer 3c of the pad.
A preferred manufacturing method of the above structure will be described hereinafter. Referring to Fig. 7a, each first metal layer 2a, 2b, 2c, which is formed on an insulating substrate 1, as embodied herein, is preferably composed of an aluminum alloy. The Al alloy preferably includes, by about 0.2-2 atomic So, a refractory metal having a melting temperature greater than about 1500"C. Subsequently, a second metal layer 3a, 3b, 3c having a pure aluminum, or an Al alloy having a refractory metal with a melting temperature less than about 1500"C, which is added to Al by about 0.1-2 atomic %, is formed on first metal layer 2a, 2b, 2c, respectively. Each second metal layer 3a, 3b, 3c is preferably stacked on first metal layer 2a, 2b, 2c, respectively.
The above refractory metal of first metal layer 2a, 2b, 2c preferably includes one or more of tantalum (Ta), titanium (Ti), molybdenum (Mo), tungsten (W), niobium (Nb), zirconium (Zr), and vanadium (V). The above refractory metal of second metal layer 3a, 3b, 3c preferably includes one or more of silicon and copper. In the structure of the device as described above, during the subsequent high temperature process, although no anodic oxide film is formed over the first/second metal layers, no hillock is generated on the surface of the second metal layer.
Referring to Fig. ab, first metal layer 2a, 2b, 2c and second metal layer 3a, 3b, 3c are selectively removed photo-lithographically at the same time using a common mask, thereby patterning concurrently the first/second metals layers stacked on top of another constituting a double film structure. In other words, an island composed of the second metal film layer stacked on the first metal layer is concurrently produced.
During the subsequent high temperature process (e.g., deposition of an insulating film Sio2, SiNx by PECVD or CVD), although no anodic oxide film is formed over the first/second metal layers, no hillock is generated on the metal layer.
Referring to Fig. /b, a photoresist film is panerned so as to be left only on the open pad portion of second metal layer 3c on line C-C' Through anodic oxidation process, first anodic oxide film 4a is formed on the sidewalls of each first metal layer 2a, 2b, 2c, and second anodic oxide film 4b is formed on the entire surface of each of second metal layers 3a and 3b, and second metal layer 3c except for the open portion of second metal layer 3c on line C-C'. Each of first and second anodic oxide films 4a and 4b, as embodied herein, preferably has an angle which is not zero with respect to the lateral direction of substrate.
Referring to Fig. 7c, a first insulating film 5 (preferably SiO2, SiNx) is formed over the entire surface of insulating substrate 1 and first and second metal layers 2a - 2c and 3a - 3c. Then, first insulating film S is photolithographically removed selectively, thereby exposing the open portion of second metal layer 3c of the pad on line C-C'.
Figs. 8a - 8e show cross-sectional views for illustrating another method of manufacturing the display of Fig. 6 according to an embodiment of the present invention, taken lines A'-A', B-B', and C-C'. The cross-section taken along line A-A' is that of the thin film transistor. The cross-section taken along line B-B' is that of the gate line. The cross-section taken along line C-C' is that of the pad.
Referring to Fig. 8a, a first rnetal layer 2a, 2b, 2c is formed on an insulating substrate 1 and preferably composed of an aluminum alloy. The Al alloy preferably has a refractory metal with a melting temperature greater than about 1500"C added to the Al by about 0.1-2 atomic %. Then, a second metal layer 3a, 3b, 3c is formed on first metal layer 2a, 2b, 2c, respectively, Each second metal layer 3a, 3b, 3c preferably includes a pure aluminum or an Al alloy having a refractory metal with a melting temperature less than about lSOO0C added to the Al by about 0.1-2 atomic io.
The above refractory metal of first metal layer 2a, 2b, 2c preferably includes one or more of tantalum (Ta), titanium (Ti), molybdenum (Mo), tungsten (W), niobium (Nb), zirconium (Zr), and vanadium (V). The above refractory metal of second metal layer preferably includes one or more of silicon copper. Then, first metal layer 2a, 2b, 2c and corresponding second metal layer 3a, 3b, 3c are photo-lithographically removed selectively at the same time using a common mask, thereby forming a stacked metal line having a double film structure.
Referring to Fig. 8b, a photoresist film (not shown) is formed on the entire surface of the resultant structure and patterned so as to be left only on the open pad portion of second metal layer 3c on line C-C' (pad open region). Then, through anodic oxidation, a first anodic oxide film 4a is formed on the sidewalls of each first metal layer 2a, 2b, and 2c, and a second anodic oxide film 4b is formed on the entire surface of each second metal layer 3a, 3b on lines A-A' and B-B', and second metal layer 3c on line C-C' except for the open pad portion thereof.
Each of first and second anodic oxide films 4a and 4b preferably has an angle which is not zero with respect to the lateral direction of substrate 1. Then, a first insulating film 5 (preferably SiOt or SiNx) formed by PECVD or C l)) is formed on the entire surface of insulating substrate 1. In this structure, even where first insulating film S is not formed over anodic oxide film 4a, 4c, no hillock is generated.
Referring to Fig. 8c, first insulating film 5 is photo-lithographically removed selectively, so as to expose the open pad portion of second metal layer 3c on line C-C'.
Referring to Fig. 8d, after sequentially depositing a semiconductor layer and a doped semiconductor layer on first insulating film 5, a patterned semiconductor layer 6 and a patterned doped semiconductor layer 7 are photolitho-graphically patterned on first insulating film 5 on line A-A'. Then, a metal layer is deposited on the entire surface of the resultant structure and patterned photo-lithographically to form a third metal layer 8 of the source/drain electrodes on doped semiconductor layer 7 and second metal layer 3c on line C-C'.
Referring to Fig. 8e, a second insulating film 9 is formed on the entire surface of third metal layer 8 and first insulating film 5 and removed photolithographically to form a contact hole selectively on the drain region of third metal layer 8 and to expose a portion of third metal layer 8 on line C-C'. Then, a transparent conductive film is deposited on the entire surface of the resultant structure and patterned photo-lithographically to form a pixel electrode and a transparent electrode 10. The pixel electrode is so formed to be connected through the contact hole formed on the drain electrode on line A-A', and transparent electrode 10 is so formed on a portion of second insulating film 9 and on third metal layer 8 on line C-C'.
In the structure where the glass substrate, AlTa and Al are stacked in this order, The Al diffusion caused by the compressive stress generated due to the difference in the coefficients of thermal expansion between glass/AlTa/Al is suppressed by Ta. Thus, no hillock is generated.
Further, since the Al film formed on the AlTa film has the same coefficient of thermal expansion (and material characteristics) as that of the
AlTa, the compressive stress is not generated in the interface between the AlTa and Al films during the subsequent high temperature process. Since the compressive stress which exists between the glass substrate and the Al film is relieved by the AlTa (buffer) layer intermediate the glass substrate and the Al film, no hillock on the Al film is generated.
Therefore, no hillock is generated on the Al film, regardless of whether the mechanical force (by anodic oxide film and/or refractory metal) is applied to the Al film or not. This feature has been demonstrated through experiments, explained below. Fig. 9 is a graph showing the density variation of the hillock versus the thickness of the AlTa buffer layer. The annealing is performed for about 30 minutes at the temperature of about 320"C. The thickness of the Al on the AlTa buffer layer is about 3000 .
Referring to Fig. 9, when the AlTa buffer layer is not used (i.e. AlTa thickness is zero in Fig. 9), the hillock is generated to a density of about 17X109/m2. When the thickness of the AlTa buffer layer is 500 . the hillock is generated to a density of about 3X109/m'. When the thickness of the AlTa buffer layer is equal to or greater than about 1000 , no hillock is generated.
Fig. 10 is a graph showing the density variation of the hillock versus the annealing temperature. The thickness of the Al on the AlTa buffer layer is about 3000A. The annealing is performed for about 30 minutes. In the case where there is no AlTa buffer layer, but only a pure aluminum, when the annea temperature is about 1300C, the hillock was generated to a density of about 3Xl09/m2. When the annealing temperature is further increased to about 210"C, the density of the hillock increases to about aXl09/m2. WThen the annealing temperature is further increased to about 300"C, the density of the hillock increases to about lSXl0/m2. When the annealing temperature is yet further increased to about 4500 C, the density of the hillock increases to about 2SXl09/m2.
In the case where the AlTa buffer layer having a thickness of 500 is used, when the annealing temperature is about 300"C, the hillock is generated to a density of about 3X109/m2. When the annealing temperature is increased to about 450"C, the density of the hillock increases to about 20X109/m2. Funher, in the case where the thickness of the AlTa buffer layer is increased to 1000 , no hillock is generated.
Fig. 11 is a graph showing the size variation of the hillock with respect to various structures of the gate metal. The condition is that the annealing is performed for 30 minutes at a temperature of about 320"C. In case (A) where a pure aluminum having a thickness of about 3000A is formed directly on the substrate, the height of the hillock is about 0.5,um. That is, there is a large number of hillocks, but the size of each hillock is relatively small.
In case (B) where the Al film with a thickness of about 1000A is formed on the substrate and the AlTa having a thickness of about 3000A is formed over the Al, the height of the hillock is about 0.7urn. That is, the number of hillocks is decreased. However, since the amount of pressure applied to the Al film by the AlTa buffer layer varies over the surface of the Al film, the size of the hillock increases in the areas where the amount of the pressure is relatively weak.
In case (C) where the AlTa buffer layer having a thickness of about 500 is formed on the substrate and the Al film having a thickness of about 3000A is formed on the AlTa buffer layer, the height of the hillock is about 0.2um. tri case (D) where the AlTa buffer layer having a thickness of about 1000 is formed on the substrate and the Al film having a thickness of about 3000A is formed on the AlTa buffer layer, no hillock was generated.
Fig. 12 is a cross-sectional view illustrating a method of making the liquid crystal display of Fig. 6 according to an embodiment of the present invention, taken along the lines A-A', B-B', and C-C' The process sequence of
Fig. 12 is partially same as that of Fig. 8a through Fig. 8d. referring to Fig. 12, a transparent conductive film is deposited on the entire surface of the resultant structure of Figs. 8a-8d and patterned photo-lithographically to form a transparent electrode 10 on a portion of drain region 8 on line A-A' and on third metal layer 8 on line C-C' Then, an insulating film 9 is deposited on the entire surface and patterned photo-lithographically to form a second insulating film 9 on the entire surface of insulating substrate 1 excluding transparent electrode 10 on third metal layer 8 on line C-C'.
Fig. 13 is a cross-sectional view for illustrating yet another method for making the liquid crystal display of Fig. 6 according to an embodiment of the present invention, taken along lines A-A', B-B', and C-C'. The process sequence of Fig. 13 is partially the same as that for Fig. 8a-8c. A semiconductor layer and a doped semiconductor layer are sequentially deposited on the entire surface of the resultant structure of Figs. 8a-8c, and patterned photo-lithographically.
Then, a transparent conductive film is deposited on the entire surface and selectively patterned photo-lithographically to form a transparent electrode 10 on the pixel region of a first insulating film 5 on line A-A' and a second metal layer 3c on line C-C' Then, a third metal layer is deposited on the entire surface and patterned photo-lithographically using a mask for the source/drain, to form a third metal layer 8 on a portion of transparent electrode 10 on the line A-A' and transparent electrode 10 on the line C-C'. Then, an insulating film is deposited on the entire surface and patterned photo-lithographically to form a second insulating film 9 on the entire surface of an insulating substrate 1 except for third metal layer 8 on line C-C'.
The embodiments described provide several unique features. For example, in the structure where the glass substrate, AlTa film and Al film are stacked in that order, the Al diffusion caused by the compressive stress generated due to the difference in the coefficient of thermal expansion between the glass substrate, AlTa film, and Al film is suppressed by Ta. Thus, no hillock is generated.
Further, since the Al film formed on the AlTa film has the same coefficient of thermal expansion (and material characteristics) as that of the AlTa film, the compressive stress is not generated in the interface between the AlTa and Al films during the subsequent high temperature process. Since the compressive stress which exists between the glass substrate and the Al film is relieved by the AlTa buffer layer intermediate the glass and the Al film, no hillock on the Al film is generated. Since no hillock is generated, the occurrence of a step in the metal line in the subsequent process is decreased. Therefore, the shorting of the metal line caused by etchant in the etching process is prevented.
Furthermore, since the defects such as the hillock and the shorting of the metal line are prevented, the yield is improved. Yet further, it is possible to simultaneously etch the AlTa/Al stacked on the substrate. Yet further, since it is not necessary to form a refractory metal layer such as Cr, Mo and the like to prevent the hillock on the open portion of the pad, the process is further simplified. Since the generation of the hillock is prevented, the shorting in the crossing part of the gate line and the data line is prevented.
Other embodiments of the invention will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims.
Claims (3)
1. Apparatus for a liquid crystal display device comprising a substrate, a first metal layer formed on said substrate, and a second metal layer formed on said first metal layer, the first and second metal layers having substantially the same coefficient of thermal expansion, and the first layer including a material for suppressing diffusion in said first layer during changes in temperature, due to the differences in the coefficients of thermal expansion of the first metal layer and said substrate, so that the formation of hillocks tends to be reduced.
2. Apparatus according to Claim 1, wherein said material is a refractory metal.
3. Apparatus according to Claim 1 or 2, wherein the first metal layer has a melting temperature greater than or equal to 15000 C, and said second metal layer has a melting temperature less than 1500"C.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019950042555A KR0186206B1 (en) | 1995-11-21 | 1995-11-21 | Liquid crystal display element and its manufacturing method |
| GB9624157A GB2307597B (en) | 1995-11-21 | 1996-11-20 | Controlling the generating of hillocks in liquid crystal devices |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| GB9813759D0 GB9813759D0 (en) | 1998-08-26 |
| GB2323475A true GB2323475A (en) | 1998-09-23 |
| GB2323475B GB2323475B (en) | 1999-08-11 |
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ID=26310438
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB9813759A Expired - Fee Related GB2323475B (en) | 1995-11-21 | 1996-11-20 | Controlling the generation of hillocks in liquid crystal devices |
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| Country | Link |
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| GB (1) | GB2323475B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP3902003A3 (en) * | 2020-04-23 | 2022-02-23 | Samsung Display Co., Ltd. | Display apparatus |
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|---|---|---|---|---|
| GB1386268A (en) * | 1971-06-30 | 1975-03-05 | Ibm | Electrical contact structure |
| EP0256557A2 (en) * | 1986-08-19 | 1988-02-24 | Fujitsu Limited | Semiconductor device having thin film wiring layer and method of forming thin wiring layer |
| EP0395560A2 (en) * | 1989-04-17 | 1990-10-31 | International Business Machines Corporation | Multilayered intermetallic connection for semiconductor devices |
| EP0488264A2 (en) * | 1990-11-30 | 1992-06-03 | Kabushiki Kaisha Toshiba | Method of manufacturing a semiconductor device with improved electromigration resistance |
| EP0524754A2 (en) * | 1991-07-16 | 1993-01-27 | Nec Corporation | A film wiring and a method of its fabrication |
| US5349205A (en) * | 1991-12-02 | 1994-09-20 | Matsushita Electric Industrial Co., Ltd. | Thin-film transistor array with anodic oxide for use in a liquid crystal display |
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1996
- 1996-11-20 GB GB9813759A patent/GB2323475B/en not_active Expired - Fee Related
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1386268A (en) * | 1971-06-30 | 1975-03-05 | Ibm | Electrical contact structure |
| EP0256557A2 (en) * | 1986-08-19 | 1988-02-24 | Fujitsu Limited | Semiconductor device having thin film wiring layer and method of forming thin wiring layer |
| EP0395560A2 (en) * | 1989-04-17 | 1990-10-31 | International Business Machines Corporation | Multilayered intermetallic connection for semiconductor devices |
| EP0488264A2 (en) * | 1990-11-30 | 1992-06-03 | Kabushiki Kaisha Toshiba | Method of manufacturing a semiconductor device with improved electromigration resistance |
| EP0524754A2 (en) * | 1991-07-16 | 1993-01-27 | Nec Corporation | A film wiring and a method of its fabrication |
| US5349205A (en) * | 1991-12-02 | 1994-09-20 | Matsushita Electric Industrial Co., Ltd. | Thin-film transistor array with anodic oxide for use in a liquid crystal display |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP3902003A3 (en) * | 2020-04-23 | 2022-02-23 | Samsung Display Co., Ltd. | Display apparatus |
| US11647656B2 (en) | 2020-04-23 | 2023-05-09 | Samsung Display Co., Ltd. | Display apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| GB2323475B (en) | 1999-08-11 |
| GB9813759D0 (en) | 1998-08-26 |
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Effective date: 20111120 |