GB2298657B - Methods of forming metal interconnects in semiconductor devices - Google Patents

Methods of forming metal interconnects in semiconductor devices

Info

Publication number
GB2298657B
GB2298657B GB9604614A GB9604614A GB2298657B GB 2298657 B GB2298657 B GB 2298657B GB 9604614 A GB9604614 A GB 9604614A GB 9604614 A GB9604614 A GB 9604614A GB 2298657 B GB2298657 B GB 2298657B
Authority
GB
United Kingdom
Prior art keywords
methods
semiconductor devices
forming metal
metal interconnects
interconnects
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB9604614A
Other versions
GB2298657A (en
GB9604614D0 (en
Inventor
Gyung-Su Cho
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
Hyundai Electronics Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Electronics Industries Co Ltd filed Critical Hyundai Electronics Industries Co Ltd
Publication of GB9604614D0 publication Critical patent/GB9604614D0/en
Publication of GB2298657A publication Critical patent/GB2298657A/en
Application granted granted Critical
Publication of GB2298657B publication Critical patent/GB2298657B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76853Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76861Post-treatment or after-treatment not introducing additional chemical elements into the layer
    • H01L21/76864Thermal treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76843Barrier, adhesion or liner layers formed in openings in a dielectric
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841Barrier, adhesion or liner layers
    • H01L21/76843Barrier, adhesion or liner layers formed in openings in a dielectric
    • H01L21/76846Layer combinations
GB9604614A 1995-03-04 1996-03-04 Methods of forming metal interconnects in semiconductor devices Expired - Fee Related GB2298657B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950004447A KR0148325B1 (en) 1995-03-04 1995-03-04 Formation method of metal layer in semiconductor device

Publications (3)

Publication Number Publication Date
GB9604614D0 GB9604614D0 (en) 1996-05-01
GB2298657A GB2298657A (en) 1996-09-11
GB2298657B true GB2298657B (en) 1998-09-30

Family

ID=19409231

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9604614A Expired - Fee Related GB2298657B (en) 1995-03-04 1996-03-04 Methods of forming metal interconnects in semiconductor devices

Country Status (6)

Country Link
JP (2) JPH08250596A (en)
KR (1) KR0148325B1 (en)
CN (1) CN1057868C (en)
DE (1) DE19608208B4 (en)
GB (1) GB2298657B (en)
TW (1) TW288171B (en)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100430684B1 (en) * 1996-12-31 2004-07-30 주식회사 하이닉스반도체 Method of forming thermally stable metal line of semiconductor device using doubly or triply deposited amorphous and crystalline tungsten nitride layer
JP3040715U (en) * 1997-02-19 1997-08-26 株式会社熊谷 Packaging bag
KR100480576B1 (en) * 1997-12-15 2005-05-16 삼성전자주식회사 Forming method of metal wiring in semiconductor device
KR100494320B1 (en) * 1997-12-30 2005-08-31 주식회사 하이닉스반도체 Diffusion prevention film formation method of semiconductor device
KR100559028B1 (en) * 1998-12-29 2006-06-15 주식회사 하이닉스반도체 Copper wiring formation method of semiconductor device
KR100495856B1 (en) * 1998-12-30 2005-09-02 주식회사 하이닉스반도체 Copper metal wiring formation method of semiconductor device
JP3562628B2 (en) * 1999-06-24 2004-09-08 日本電気株式会社 Diffusion barrier film, multilayer wiring structure, and method of manufacturing the same
US6569751B1 (en) * 2000-07-17 2003-05-27 Lsi Logic Corporation Low via resistance system
DE10154500B4 (en) * 2001-11-07 2004-09-23 Infineon Technologies Ag Process for the production of thin, structured, metal-containing layers with low electrical resistance
JP4683188B2 (en) 2002-11-29 2011-05-11 日本電気株式会社 Semiconductor device and manufacturing method thereof
JP4222841B2 (en) * 2003-01-15 2009-02-12 三洋電機株式会社 Manufacturing method of semiconductor device
TW200526806A (en) * 2004-01-15 2005-08-16 Tokyo Electron Ltd Film-forming method
US7253501B2 (en) * 2004-08-03 2007-08-07 Taiwan Semiconductor Manufacturing Company, Ltd. High performance metallization cap layer
US20060113675A1 (en) * 2004-12-01 2006-06-01 Chung-Liang Chang Barrier material and process for Cu interconnect
JP5204964B2 (en) * 2006-10-17 2013-06-05 ルネサスエレクトロニクス株式会社 Manufacturing method of semiconductor device
CN101017793B (en) * 2007-02-16 2013-06-05 上海集成电路研发中心有限公司 A making method for diffusing blocking layer
CN101459174B (en) * 2007-12-13 2010-07-07 和舰科技(苏州)有限公司 Conductive structure for semiconductor chip and its producing method
CN102810504A (en) * 2011-05-31 2012-12-05 无锡华润上华半导体有限公司 Process for growing thick aluminium

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0209654A2 (en) * 1985-05-13 1987-01-28 Kabushiki Kaisha Toshiba Semiconductor device having wiring electrodes
US5136362A (en) * 1990-11-27 1992-08-04 Grief Malcolm K Electrical contact with diffusion barrier
EP0514103A1 (en) * 1991-05-14 1992-11-19 STMicroelectronics, Inc. Barrier metal process for sub-micron contacts
EP0525637A1 (en) * 1991-07-24 1993-02-03 Applied Materials, Inc. Method for the formation of tin barrier layer with preferential (111) crystallographic orientation
US5494860A (en) * 1995-03-14 1996-02-27 International Business Machines Corporation Two step annealing process for decreasing contact resistance

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0174743A3 (en) * 1984-09-05 1988-06-08 Morton Thiokol, Inc. Process for transition metal nitrides thin film deposition
US4998157A (en) * 1988-08-06 1991-03-05 Seiko Epson Corporation Ohmic contact to silicon substrate
EP0448763A1 (en) * 1990-03-30 1991-10-02 Siemens Aktiengesellschaft Process and apparatus for manufacturing conductive layers or structures for highly integrated circuits
US5308655A (en) * 1991-08-16 1994-05-03 Materials Research Corporation Processing for forming low resistivity titanium nitride films
US5462895A (en) * 1991-09-04 1995-10-31 Oki Electric Industry Co., Ltd. Method of making semiconductor device comprising a titanium nitride film
JPH05121378A (en) * 1991-10-29 1993-05-18 Sony Corp Method of manufacturing semiconductor device
US5254499A (en) * 1992-07-14 1993-10-19 Micron Technology, Inc. Method of depositing high density titanium nitride films on semiconductor wafers
JP2570576B2 (en) * 1993-06-25 1997-01-08 日本電気株式会社 Method for manufacturing semiconductor device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0209654A2 (en) * 1985-05-13 1987-01-28 Kabushiki Kaisha Toshiba Semiconductor device having wiring electrodes
US5136362A (en) * 1990-11-27 1992-08-04 Grief Malcolm K Electrical contact with diffusion barrier
EP0514103A1 (en) * 1991-05-14 1992-11-19 STMicroelectronics, Inc. Barrier metal process for sub-micron contacts
EP0525637A1 (en) * 1991-07-24 1993-02-03 Applied Materials, Inc. Method for the formation of tin barrier layer with preferential (111) crystallographic orientation
US5494860A (en) * 1995-03-14 1996-02-27 International Business Machines Corporation Two step annealing process for decreasing contact resistance

Also Published As

Publication number Publication date
JP3122845B2 (en) 2001-01-09
CN1057868C (en) 2000-10-25
GB2298657A (en) 1996-09-11
KR960035843A (en) 1996-10-28
KR0148325B1 (en) 1998-12-01
TW288171B (en) 1996-10-11
DE19608208B4 (en) 2006-02-23
JPH08250596A (en) 1996-09-27
DE19608208A1 (en) 1996-09-05
JP2000082742A (en) 2000-03-21
CN1141506A (en) 1997-01-29
GB9604614D0 (en) 1996-05-01

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Legal Events

Date Code Title Description
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20070304