GB2212944A - Mask for manufacture of integrated circuits - Google Patents
Mask for manufacture of integrated circuits Download PDFInfo
- Publication number
- GB2212944A GB2212944A GB8727958A GB8727958A GB2212944A GB 2212944 A GB2212944 A GB 2212944A GB 8727958 A GB8727958 A GB 8727958A GB 8727958 A GB8727958 A GB 8727958A GB 2212944 A GB2212944 A GB 2212944A
- Authority
- GB
- United Kingdom
- Prior art keywords
- wafer
- improved process
- mask
- manufacture
- integrated circuits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
- G03F1/60—Substrates
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
Abstract
A step and repeat process using a mask transfers circuit information onto a die forming a portion of a wafer (Fig 3). The circuit information is confined within the mask which is of octagonal shape to maximise the number of steps across a given surface area of wafer and to provide a maximum area of transferred circuits. <IMAGE>
Description
IMPROVED PROCESS IN THE litANUFAClitJRE OF INTEGRATED
CIRCUITS The present invention relates to an improved process in the manufacture of integrated circuits.
In the process of manufacturing integrated circuits (IC's) most manufacturers use optical methods for transfer of circuit information onto the silicon wafer. To achieve the necessary resolution and alignment accuracy to fabricate devices whose critical dimensions are of the order of single microns, involves the use of 'Steppers' to expose the photo-resists which control the electrical features of the circuit.
The stepperetakes a precision mask (or 'Reticle') and projects its image onto a small area of the wafer being processed, it then 'steps' a precise amount in the X direction and then the Y direction and repeats the exposure until the wafer is completely exposed.
The stepper is usually the final stage of photo-reduction, the reticle usually being 5 or 10 times the final IC size. This final reduction directly onto the wafer maintains the quality of the image by removing one photographic stage and by being larger is less sensitive to small defects.
A disadvantage of use of steppers is the increased exposure time as the image is stepped over the wafer and the equipment cost.
As process quality improves, defect- density falls and wafer sizes rise, it becomes possible to achieve economic yield of larger and larger devices. Ultimately the largest single device that can be made using steppers is limited by the 'aperature' of the reticle (the size of the 'window'), normally circular. For a typical stepper with a reticle at x 5, a 10 cm aperature can produce a single die of 2 cm maximum dimension.
As the normal shape of a die is rectangular the actual maximum dimension will be 2 cm DIAGONAL. A square shape will of course present the maximum useable area of such a die, thus 14 x 14 mm presents an area of approximately 196 mm2.
The dimension of 14 x 14 mm is determined by the stepper pitch to enable a rectangular array of dies to be assembled on the wafer and subsequently to be scribed along constant pitch and orthogonal lines.
As a percentage of the available reticle window 14 x 14 mm only represents 62% of the available aperature area.
An aim of the present invention is to provide a more efficient aperature filling shape so that larger area dies can be made and expensive equipment more efficiently utilised.
According to the present invention there is provided an improved process in the manufacture of integrated circuits, whereby an optical means including a mask is used to transfer circuit information onto a die forming a portion of a wafer, said optical means is stepped across the wafer to transfer the circuit information a plurality of times onto the wafer, wherein the circuit information is confined within the mask which is substantially of octagonal shape to maximise the number of steps across a given surface area of wafer to provide a maximum density of transferred circuits.
An embodiment of the present invention will now be described with reference to the accompanying drawing in which:
Figure 1 shows a reticle field having a square or rectangular die or assembly of dies,
Figure 2 shows an octagonal die or assembly of dies, and,
Figure 3 shows a wafer scribed in square section.
Referring to Figure 1, the reticle field is shown having a conventional maximum fill consisting of a square die or assembly of dies B, or a rectangular die or assembly of dies C.
Figure 2 shows an octagonal die or assembly of dies D.
If a regular octagonal circuit is produced the achievable circuit area raises to 283 mm2, a larger area by approximately 44% over the basic square shape; a reticle fill of approximately 90it.
Referring to Figure 3, when the octagonal circuit is stepped on a regular X/Y matrix, the result is abutment, but with regular 'diamond' shaped un-exposed areas. The structure can thus be scribed in a normal manner and produces rectangular dies E as normal, but with small 'dead' corners.
In fact most practical circuits will not work out as regular octagons, but as approximations thereto. In fact any shape which has two extreme horizontal and two extreme vertical planes will abut in a regular X/Y matrix.
The present invention finds application in any IC manufacturing process where to achieve the highest levels of integration possible within the confines of stepper technology will require reticle filling techniques such as that described to improve machine utilisation.
Optical lithographic techniques will always have circular fields and will never be efficiently used without such techniques.
Gate arrays could be made approximately 40% larger by this technique.
A further refinement could be the utilisation of the 'diamond shaped spaces', between the octagonal dies.
These could be made use of by a second pass of the stepper, inserting into the space a number of circuit options.
a) Process control structures. These are probed during
manufacture to extract important process parameters. They are 'scribed through' when the wafer is scribed as they have no useful purpose on the completed chip.
b) An interconnecting means in the form of a 'stitching chip'
provides a method for interconnecting the octagonal chips by a series of 'overlapping exposures' (fingers). This would enable octagons to be clustered.
c) Further they could form the basis of a practical wafer scale
integration implementation methodology.
The 'diamond circuits' would then contain:
a stitch connection to the nearby octagonal chips,
a self test control circuits, and
a communication link to adjacent 'diamond chips', for configuration,
and be the controlling 'infrastructure' required to test and configure working sub circuits into a whole circuit.
Claims (7)
1. An improved process in the manufacture of integrated circuits, whereby an optical means including a mask is used to transfer circuit information onto a die forming a portion of a wafer, said optical means is stepped across the wafer to transfer the circuit information a plurality of times onto the wafer, wherein the circuit information is confined within the mask which is substantially of octagonal shape to maximise the number of steps across a given surface area of wafer to provide a maximum density of transferred circuits.
2. An improved process as claimed in claim 1, wherein the given surface area is of octagonal shape.
3. An improved process as claimed in claim 2, wherein the mask is stepped on a regular X/Y matrix.
4. An improved process as claimed in claim 3, wherein spaces between adjacent dies are provided with process control structures.
5. An improved process as claimed in claim 3 or 4 wherein spaces between adjacent dies are provided with interconnecting means for interconnecting circuits on adjacent dies.
6. An improved process in the manufacture of integrated circuits substantially as hereinbefore described.
7. An improved process in the manufacture of integrated circuits substantially as hereinbefore described with reference to the accompanying drawings.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB8727958A GB2212944B (en) | 1987-11-30 | 1987-11-30 | Improved process in the manufacture of integrated circuits |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB8727958A GB2212944B (en) | 1987-11-30 | 1987-11-30 | Improved process in the manufacture of integrated circuits |
Publications (3)
Publication Number | Publication Date |
---|---|
GB8727958D0 GB8727958D0 (en) | 1988-01-06 |
GB2212944A true GB2212944A (en) | 1989-08-02 |
GB2212944B GB2212944B (en) | 1991-10-23 |
Family
ID=10627745
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB8727958A Expired - Fee Related GB2212944B (en) | 1987-11-30 | 1987-11-30 | Improved process in the manufacture of integrated circuits |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2212944B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0644581A1 (en) * | 1993-09-16 | 1995-03-22 | Nec Corporation | Wafer Stepper |
-
1987
- 1987-11-30 GB GB8727958A patent/GB2212944B/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0644581A1 (en) * | 1993-09-16 | 1995-03-22 | Nec Corporation | Wafer Stepper |
US5452053A (en) * | 1993-09-16 | 1995-09-19 | Nec Corporation | Wafer stepper |
Also Published As
Publication number | Publication date |
---|---|
GB2212944B (en) | 1991-10-23 |
GB8727958D0 (en) | 1988-01-06 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
732 | Registration of transactions, instruments or events in the register (sect. 32/1977) | ||
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 19981130 |