GB2179679A - Forming a dielectric film and semiconductor device including said film - Google Patents
Forming a dielectric film and semiconductor device including said film Download PDFInfo
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- GB2179679A GB2179679A GB08620609A GB8620609A GB2179679A GB 2179679 A GB2179679 A GB 2179679A GB 08620609 A GB08620609 A GB 08620609A GB 8620609 A GB8620609 A GB 8620609A GB 2179679 A GB2179679 A GB 2179679A
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- silicon
- aluminum
- oxide
- thickness
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 16
- 238000000034 method Methods 0.000 claims abstract description 32
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 28
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 26
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 24
- 239000010703 silicon Substances 0.000 claims abstract description 24
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 17
- 239000001301 oxygen Substances 0.000 claims abstract description 17
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 17
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 17
- 230000003647 oxidation Effects 0.000 claims abstract description 16
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 16
- 238000005546 reactive sputtering Methods 0.000 claims abstract description 12
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 11
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 11
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims abstract description 10
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical class [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims abstract description 9
- 239000000203 mixture Substances 0.000 claims abstract description 6
- 230000015572 biosynthetic process Effects 0.000 claims description 6
- 239000000463 material Substances 0.000 claims description 5
- 235000012239 silicon dioxide Nutrition 0.000 claims description 5
- 239000000377 silicon dioxide Substances 0.000 claims description 5
- 230000007423 decrease Effects 0.000 claims description 2
- 238000004544 sputter deposition Methods 0.000 claims description 2
- 230000001590 oxidative effect Effects 0.000 claims 1
- 239000004576 sand Substances 0.000 claims 1
- 239000000758 substrate Substances 0.000 abstract description 12
- 239000011521 glass Substances 0.000 abstract description 6
- 229910052751 metal Inorganic materials 0.000 abstract description 2
- 239000002184 metal Substances 0.000 abstract description 2
- 239000010408 film Substances 0.000 description 27
- GQPLMRYTRLFLPF-UHFFFAOYSA-N Nitrous Oxide Chemical compound [O-][N+]#N GQPLMRYTRLFLPF-UHFFFAOYSA-N 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 229910052681 coesite Inorganic materials 0.000 description 2
- 229910052906 cristobalite Inorganic materials 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 239000002243 precursor Substances 0.000 description 2
- 229910052682 stishovite Inorganic materials 0.000 description 2
- 229910052905 tridymite Inorganic materials 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 238000010420 art technique Methods 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 229910002092 carbon dioxide Inorganic materials 0.000 description 1
- CURLTUGMZLYLDI-UHFFFAOYSA-N carbon dioxide Natural products O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 description 1
- UBAZGMLMVVQSCD-UHFFFAOYSA-N carbon dioxide;molecular oxygen Chemical compound O=O.O=C=O UBAZGMLMVVQSCD-UHFFFAOYSA-N 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000001272 nitrous oxide Substances 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000005086 pumping Methods 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
- H01L29/513—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/02—Pretreatment of the material to be coated
- C23C14/027—Graded interfaces
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/08—Oxides
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/08—Oxides
- C23C14/081—Oxides of aluminium, magnesium or beryllium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
- H01L29/40114—Multistep manufacturing processes for data storage electrodes the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Mechanical Engineering (AREA)
- Ceramic Engineering (AREA)
- Organic Chemistry (AREA)
- Metallurgy (AREA)
- Materials Engineering (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Manufacturing & Machinery (AREA)
- Formation Of Insulating Films (AREA)
- Thin Film Transistor (AREA)
Abstract
Silicon (44) is oxidized in an oxygen-containing ambient to form a first region (48) of silicon oxide. Once oxidation has begun, reactive sputtering of aluminum in an oxygen plasma is initiated. This forms a second region (50) of said dielectric film which comprises a mixture of silicon and aluminum oxides. A third region (52) comprising substantially aluminum oxide is formed by the continuing reactive sputtering step. In making a MOSFET device, for instance, a metal electrode layer (54) may be deposited over the third region (52), and source and drain regions (56, 58) may be formed in the silicon (44) provided as a layer formed on a substrate (42) such as of glass. A semiconductor device comprising said three region dielectric film interposed between an electrode and a semiconductor body has little or no shift in threshold voltage, providing good stability, and can be fabricated in substantially less time and/or at lower temperatures than prior art methods. <IMAGE>
Description
SPECIFICATION
Method of forming a dielectric film and semiconductor device including said film
The present invention relates to a method of forming a dielectricfilm on a silicon body and a semiconductor device fabricated by such a method.
Dielectric materials such as silicon oxide (SiOx wherein 1 < x < 2) are widely used in the manufacture of semiconductor devices. These materials find use not only as final passivation coatings for completed devices but also as intermediate insulating layers for multi-layer devices. Thermally grown oxides, such as silicon oxide, are typically employed as dielectric films, e.g. a gate dielectric, in semiconductor devices such as EAROM (electrically alterable read only memory), a MOSFET(metal-oxidesemiconductor field effect transistor), capacitors and the like.Thermal oxidation methods, by which the best silicon oxide films are produced, are usually carried out by placing silicon in an oxygen ambient at temperatures between 800 and 12000. In manysitu- ations these temperatures are too high for the su b strate. For instance, in applications where the dielect- ricfilmtobeformedispartofasemiconductorde- vice being fabricated over a glass substrate, lower process temperatures are required.Specifically, in the area of liquid crystal displays, thin film transistors are fabricated over glass substrates having a softening point of about 650 C. Therefore, to therm allygrowan oxide onto silicon over glass, thetemperature ofthe substrate in the oxygen ambient is kept at about 60000 which requires about 120 hours to grow60-70 nanometers (nm) of silicon oxide.
Silicon oxide (SiOx), aluminium oxide, and silicon nitride can be deposited attemperatures below 60000 by glow discharge and other chemical vapor deposition (CVD) techi niques, in a fraction of the time requiredforthermal growth, e.g. a few hours or less.
However, the dielectric quality of the deposited film ispoorcomparedtothethermallygrown material.
Specifically, the transistor turn on voltage for deposited silicon dioxide films is typically unstable. It is believed that charge traps within the film and/or at the silicon-dielectric interface cause the film to accumu
late a charge upon the initial applications of voltage.
Subsequent applications of voltage are characterized bya shift in the turn on, orthreshold,voltage of 5to
10 volts or more, compared to little or no shift in the threshold voltage forthermally grown oxide.
Further, in applications requiring a dielectric over
hydrogenated amorphous silicon, it is desirable to
keep processing temperatures below about 4000C.
This is because the semiconductive properties of amorphous silicon change at temperatures above 400 C, probably due to a loss of hydrogen from the film above that point.
It would be desirable therefore to have a method of
producing a dielectric film at a temperature below 6000C and preferably below 4000C wherein the rate of film formation is substantially increased overthermally grown films inthattemperature range without a substantial sacrifice in dielectric stability.
A process offorming a three region dielectric film on silicon and a semiconductor device employing such a film are disclosed herein. Silicon is oxidized in an oxygen-containing ambient. The oxidation step forms a first region of silicon oxide. Once oxidation has begun, reactive sputtering of aluminum in an oxygen plasma is initiated. This forms a second region of said dielectric film which comprises a mixture of silicon and aluminum oxides. Athird region comprising substantially aluminum oxide is formed by the continuing reactive sputtering step.
A semiconductor device comprising said three region dielectric film interposed between an electrode and a semiconductor body has little or no shift in threshold voltage providing good stability, and can be fabricated in substantially less time and/or at lowertemperaturesthan prior art methods.
Intheaccompanying drawings;
Figure 7 is a cross-sectional view of an apparatus suitable forforming the dielectric film for the device of the present invention;
Figure2 is a cross-sectional view of a semiconductor device of the present invention.
Figure3 illustrates the shift in threshold voltage for a device with a dielectric film having a plasma-grown first region.
Figure 4 illustrates the shift in threshold voltage for a device with a dielectricfilm having athermally grown first region.
The present method forms a three region dielectric film over a film or substrate of silicon (amorphous, polycrystalline, single crystal) by combining oxidation and reactive sputtering techniques. A first region comprising silicon oxide (SiOx wherein 1 < x < 2) is formed by either plasma orthermal oxidation of the silicon. The plasma oxidation process can be carried out at temperatures between 250C and 3000C whereasthethermal process can be used wheretemperatures of 60000 and above can be tolerated. A second region comprising a mixture of silicon and aluminum oxides is formed by the reactive sputtering of aluminum in an oxygen plasma. Continuation of the reactive sputtering ultimately provides the third region comprising substantially aluminum oxide.
An apparatus suitable for carrying out the present process is illustrated in Figure 1. The apparatus 10 includes a vacuum chamber 12 which can be a glass bell jar. lnthevacuum chamber 12 is an electrode 14 which can be a screen, coil or plate of a material that is a good electrical conductor, such as aluminum.
The electrode 14 is connected to a power supply 16, which may be DC, AC or RF to produce a voltage potential. Behind the electrode 14 is a magnet 18 which is electrically insulated from the electrode 14which helps concentrate the plasma in the electrode area.
An aluminum target20 is also present in the event thatthe electrode 14 is otherthan aluminum. A magnet 22 is behind the target 20. An outlet 24from thevacuum chamber 12 allowsforevacuation ofthe system and is connected to a pumping station, not shown. Afirst inlet 26 and a second inlet 28 are can necked to gas bleed systems not shown, for adding the appropriate gas or gases. The apparatus also includes a heat source (not shown) to heat the ambient to a desired temperature.
If the first region is to be thermally grown, the vacuum chamber 12 is evacuated and a source of oxygen such as CO2, N2O, 2, H20 is introduced through the first inlet 26. Thetemperature in the chamber 12 isthen elevated to about6000Cand ade- sired thickness of SiO2 is grown onto the silicon surface.
Alternatively, the first region can be grown at a lowertemperature by plasma oxidation as described by Kaganowicz et al. in U.S. Patent No.4,576,829 issued March 18, 1986. In this process the substrate 30, being of or having thereover, silicon (amorphous, polycrystalline or single crystal), is placed in front of the electrode 14. The substrate 30 overlies a mounting plate 32 and is typically placed about 1 inch from the electrode 14. The mounting plate 32 should be of a material that can act as a heat sink during the plasma oxidation process to control the temperature of the substrate 30. Such a heat sink arrangement is described in U.S. Patent 4,361,595 to Kaganowiczet al.The consideration is that the plasma may tend to heatthe substrate 30 well above 3000C and therefore the substrate temperature should be maintained belowabout3000C. Other conventional means of maintaining the temperature of the substrate 30 can likewise be utilized.
The vacuum chamber 12 isthen evacuated through outlet24to a pressureofabout0.2to 1 .0x 10-6 Torr. An oxygen containing gaseous precursor is introduced intothechamberl2throughtheinlet 26 to a pressure of about 50 Millitorr. Appropriate oxygen-containing precursors include oxygen, carbon dioxide and nitrous oxide and the like. In orderto initiate the oxygen plasma, about 300 to 600 watts of 13.56 MHz RF power is applied to the electrode 14to provide an effective power density of between about 1 and 15 Watts/cm2 ad preferably about 5 to 7 Watt/cm2.
The formation of the second region of the dielectric film ofthe present invention involves the utilization of an oxygen-containing plasma, as well. Therefore, if first region was grown thermally, the vacuum chamberisevacuatedandallowedtocool and the plasma is initiated as described above. If the first region is grown by the plasma oxidation technique,the plasma is merely maintained. The formation ofthe second region is by the reactive sputtering ofthe aluminum from eitherthe electrode 14 orthe target 20. That is, the oxygen plasma oxidizes the aluminum, then sputtersthe aluminum oxide offof the electrode 14.It is believed that atthe sametime the plasma causes some ofthe grown silicon oxide from the first region to sputter and redeposit in with the aluminum oxide being deposited from the reactive sputtering process. In this waythe second region comprises a mixture of silicon and aluminum oxides.
The concentration of silicon oxide decreases with increasing distance from the first region and conversely, the concentration of aluminum oxide increases with increasing distance from thefirst region.
Once the dielectricfilm has accumulated to a thick ness wherein no more ofthe silicon oxide ofthefirst region can be sputtered and codeposited back into thefilmwiththealuminumoxide,thecontinued sputtering of the electrode 14 or target 20 by the oxygen plasma forms the third region comprising substantially aluminum oxide. This reactive sputtering can be maintained to provide a desired final film thickness.
It should be noted that when the first region is plasma grown, the plasma oxidation down into the silicon continueswhilethe second region is being formed until the thickness of the accumulating dielectric prevents further diffusion of oxygen therethrough. If the first region is thermally grown, some further oxidation is possible during the formation of the second region; however, this is less probable where the thermally grown first region is greater than 10 nanometers in thickness.
The first region generally has a thickness of between about 5 and 20 nanometers, if plasma grown, and can have a greaterthickness if thermally grown, such as about 100 nanometers.
The second region has been generallyfoundto have a thickness between about 2 and 30 nanometers.
The third region comprising A1203 can be any con- venientthickness but is generally kept between about 10 and 100 nanometers.
The overall thickness of the three region film can be any desired thickness according to the application involved, for instance about 100 nanometers has been found suitable for thin film transistors.
Figure 2 illustrates one embodiment ofthe present invention; that being a metal-oxide-semiconductor field effect transistor (MOSFET) 40. It should be noted thatanysemiconductordevice requiring a high quality thin film dielectricwouldbenefitbythepre- sent invention.
The transistor device 40 is fabricated by means known in the art. Over a glass substrate 42 is deposited a silicon layer 44. Then a dielectricfilm 46 ofthe present invention comprising a first region 48, a second region 50 overlying said first region 48, and a thick region 52 overlying said second region 50, is deposited over said silicon layer 44 by the methods outlined in detail above. An electrode 54which serves as a gate in this device and which is a conductor, e.g. metal.silicides, polysilicon, is deposited over the dielectric46 using standard photolithography techniques. Using self-aligned ion implant techniques, the silicon layer 44 can be provided with source 56 and drain 58 regions of one conductivity type and a channel region 60 of the opposite con ductivity type.
While dielectric films produced by standard low temperature ( < 500 C) techniques, such as glow discharge and CVD, generally produce unstable MOS
FETs with threshold voltage shifts of 5 to 10 volts and more, devices produced by the present method show improved stability. Also, the rate of film formation is substantially enhanced compared to thermal oxidation techniques.
Figures3and4illustratethestabilityofsemi- conductor devices fabricated according to the present invention. In each Figure, the drain current I in the transistor of Figure 2, is plotted as a function of the gate voltage applied to the gate electrode 54oaf Figure 2. The solid line represents the currentforthe initial application of -5 volts to the source 56 with the drain 58 at 0 volts. The dotted line represents the cur rent for a subsequent application of -5 volts to the source 56 after a + 10 volt bias was applied to the gate electrode 54 for 30 minutes at 1 500C.
Specifically, Figure 3 illustrates the improved st abilityforathree region dielectric film in a MOSFET wherein the first region was plasma grown providing that the entire dielectric was formed at about 130 C.
While Figure 3 shows about a 2 volt shiftforthe threshold voltage in such a device following a +10 volt bias, 1 500C, 30 minute test, this is substantial improvement in stability over the prior arttechniques.
Figure 4 shows the results of another MOSFET produced in accordance with the present invention. In this case the first region comprised about 6 nanometers of SiO2 which was thermally grown at about 6000C in about 8 hours. The second and third regions were deposited at about 1 300C in about 0.5 hours providing a total film thickness of about 7.5 nanometers in 8.5 hours. The shift in threshold voltage isneglig- ible afterthe + 10 volt bias after 30 minutes at 150 C.
This stability is comparableto thatofathermally grown layerwhichwouldtakeabout 120 hoursto grow at 600 C.
Claims (17)
1. A process of forming a dielectricfilm on a silicon body comprising:
a) oxidizing the surface of the silicon body in an oxygen-containing ambient to form a first region of said film comprising silicon oxide;
b) sputtering aluminum to form a second region comprising a mixture of silicon and aluminum oxides over said first region; and
c) forming a third region of substantially aluminum oxide over said second region by reactive sputtering of aluminum.
2. The process of claim 1 wherein step;
(a) is carried out in an oxygen-containing plasma, which plasma is maintained throughout steps;
(b) and (c) to provide said reactive sputtering of aluminum.
3. The process ofclaim2whereinthetem- perature ofthe ambient is maintained belowabout 300 C.
4. The process of claim 2 wherein step;
(a) is preceded by the formation of a thickness of silicon dioxide on the silicon by thermal oxidation.
5. The process of claim 2 wherein the plasma has an effective power density of between about 1 and 15 Watts/cm2.
6. The process of claim 1 wherein step;
a) is carried out by thermal oxidation.
7. The process of claim 6 wherein the thermal oxidation is carried out at a temperature of about 6000C.
8. A semiconductor device including an oxide dielectricfilm wherein said oxide dielectric film is formed by the process of claim 1.
9. In a semiconductor device including a body of semiconductor material and an electrode separated by a dielectric film, the improvement wherein said dielectricfilm comprises
a first region comprising silicon oxide;
a second region overlying said first region comprising a mixture of silicon and aluminum oxides, wherein the concentration of silicon oxide decreases and the concentration of aluminum oxide increases with increasing distance from said first region; and
a third region overlying said second region comprising aluminum oxide.
10. The device of claim 8 wherein said first region has a thickness of between about 5 and 100 nanometers.
11. The device of claim 9 wherein said first region is plasma grown and has a thickness between about
Sand 20 nanometers.
12. The device of claim 8 wherein said second region has a thickness between about 2 and 30 nanometers.
13. The device of claim 8 wherein said third region has a thickness between about 10 and 100 nanometers.
14. The device of claim 8 wherein said device is a metal-oxide-semiconductorfield effecttransistor.
15. The device of claim 13 wherein said first re- gion has a thickness of about 6 nanometers of thermally grown silicon dioxide.
16. A semiconductor device substantially as hereinbefore described and shown with reference to
Figure 2 ofthe accompanying drawings.
17. a processforforming a dielectricfilm substantially as hereinbefore described, with reference to the accompanying drawings.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US76997585A | 1985-08-27 | 1985-08-27 |
Publications (3)
Publication Number | Publication Date |
---|---|
GB8620609D0 GB8620609D0 (en) | 1986-10-01 |
GB2179679A true GB2179679A (en) | 1987-03-11 |
GB2179679B GB2179679B (en) | 1990-01-04 |
Family
ID=25087086
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB8620609A Expired - Fee Related GB2179679B (en) | 1985-08-27 | 1986-08-26 | Method of forming a dielectric film and semiconductor device including said film |
Country Status (5)
Country | Link |
---|---|
JP (1) | JPS6358843A (en) |
KR (1) | KR940005290B1 (en) |
DE (1) | DE3628399A1 (en) |
GB (1) | GB2179679B (en) |
SG (1) | SG134792G (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0341964A2 (en) * | 1988-05-07 | 1989-11-15 | Sharp Kabushiki Kaisha | Silicon micro sensor and manufacturing method therefor |
US5310610A (en) * | 1988-05-07 | 1994-05-10 | Sharp Kabushiki Kaisha | Silicon micro sensor and manufacturing method therefor |
EP0637061A1 (en) * | 1993-06-29 | 1995-02-01 | Digital Equipment Corporation | Threshold optimization for SOI transistors through use of negative charge in the gate oxide |
EP0971380A1 (en) * | 1997-03-28 | 2000-01-12 | TAKAHASHI, Migaku | Method for manufacturing magnetoresistance element |
WO2004013377A1 (en) * | 2002-08-02 | 2004-02-12 | Korea Research Institute Of Chemical Technology | Method for preparation of aluminum oxide thin film |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1204544A (en) * | 1966-09-02 | 1970-09-09 | Hitachi Ltd | Semiconductor device and method of manufacturing the same |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3287243A (en) * | 1965-03-29 | 1966-11-22 | Bell Telephone Labor Inc | Deposition of insulating films by cathode sputtering in an rf-supported discharge |
US3502950A (en) * | 1967-06-20 | 1970-03-24 | Bell Telephone Labor Inc | Gate structure for insulated gate field effect transistor |
JPS523782B2 (en) * | 1972-12-19 | 1977-01-29 | ||
DE2452289A1 (en) * | 1974-11-04 | 1976-05-06 | Siemens Ag | SEMICONDUCTOR COMPONENT |
JPS5527644A (en) * | 1978-08-17 | 1980-02-27 | Nec Corp | Multi-layer wiring type semiconductor device |
JPS5572043A (en) * | 1978-11-27 | 1980-05-30 | Fujitsu Ltd | Preparation of semiconductor device |
DE3122382A1 (en) * | 1981-06-05 | 1982-12-23 | Ibm Deutschland | METHOD FOR PRODUCING A GATE INSULATION LAYER STRUCTURE AND USE OF SUCH A STRUCTURE |
-
1986
- 1986-08-21 DE DE19863628399 patent/DE3628399A1/en not_active Withdrawn
- 1986-08-26 GB GB8620609A patent/GB2179679B/en not_active Expired - Fee Related
- 1986-08-26 JP JP61201179A patent/JPS6358843A/en active Pending
- 1986-08-26 KR KR1019860007073A patent/KR940005290B1/en active IP Right Grant
-
1992
- 1992-12-30 SG SG1347/92A patent/SG134792G/en unknown
Patent Citations (1)
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GB1204544A (en) * | 1966-09-02 | 1970-09-09 | Hitachi Ltd | Semiconductor device and method of manufacturing the same |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0341964A2 (en) * | 1988-05-07 | 1989-11-15 | Sharp Kabushiki Kaisha | Silicon micro sensor and manufacturing method therefor |
EP0341964A3 (en) * | 1988-05-07 | 1991-03-20 | Sharp Kabushiki Kaisha | Silicon micro sensor and manufacturing method therefor |
US5310610A (en) * | 1988-05-07 | 1994-05-10 | Sharp Kabushiki Kaisha | Silicon micro sensor and manufacturing method therefor |
EP0637061A1 (en) * | 1993-06-29 | 1995-02-01 | Digital Equipment Corporation | Threshold optimization for SOI transistors through use of negative charge in the gate oxide |
EP0971380A1 (en) * | 1997-03-28 | 2000-01-12 | TAKAHASHI, Migaku | Method for manufacturing magnetoresistance element |
EP0971380A4 (en) * | 1997-03-28 | 2000-06-28 | Migaku Takahashi | Method for manufacturing magnetoresistance element |
WO2004013377A1 (en) * | 2002-08-02 | 2004-02-12 | Korea Research Institute Of Chemical Technology | Method for preparation of aluminum oxide thin film |
Also Published As
Publication number | Publication date |
---|---|
KR870002638A (en) | 1987-04-06 |
GB8620609D0 (en) | 1986-10-01 |
JPS6358843A (en) | 1988-03-14 |
DE3628399A1 (en) | 1987-03-05 |
GB2179679B (en) | 1990-01-04 |
KR940005290B1 (en) | 1994-06-15 |
SG134792G (en) | 1993-03-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
732E | Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977) | ||
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 19940826 |