GB2093401A - Composite film - Google Patents

Composite film Download PDF

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Publication number
GB2093401A
GB2093401A GB8200313A GB8200313A GB2093401A GB 2093401 A GB2093401 A GB 2093401A GB 8200313 A GB8200313 A GB 8200313A GB 8200313 A GB8200313 A GB 8200313A GB 2093401 A GB2093401 A GB 2093401A
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United Kingdom
Prior art keywords
composite film
film
lead
accordance
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB8200313A
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GB2093401B (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
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Filing date
Publication date
Priority claimed from JP567281A external-priority patent/JPS57120361A/en
Priority claimed from JP706881A external-priority patent/JPS57120397A/en
Priority claimed from JP706981A external-priority patent/JPS57120398A/en
Priority claimed from JP1618281A external-priority patent/JPS57130457A/en
Priority claimed from JP1618381A external-priority patent/JPS57130458A/en
Priority claimed from JP56024028A external-priority patent/JPS57138167A/en
Application filed by Tokyo Sanyo Electric Co Ltd, Sanyo Electric Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Publication of GB2093401A publication Critical patent/GB2093401A/en
Application granted granted Critical
Publication of GB2093401B publication Critical patent/GB2093401B/en
Expired legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4821Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4839Assembly of a flat lead with an insulating support, e.g. for TAB
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B15/00Layered products comprising a layer of metal
    • B32B15/04Layered products comprising a layer of metal comprising metal as the main or only constituent of a layer, which is next to another layer of the same or of a different material
    • B32B15/08Layered products comprising a layer of metal comprising metal as the main or only constituent of a layer, which is next to another layer of the same or of a different material of synthetic resin
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B7/00Layered products characterised by the relation between layers; Layered products characterised by the relative orientation of features between layers, or by the relative values of a measurable parameter between layers, i.e. products comprising layers having different physical, chemical or physicochemical properties; Layered products characterised by the interconnection of layers
    • B32B7/04Interconnection of layers
    • B32B7/12Interconnection of layers using interposed adhesives or interposed materials with bonding properties
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49534Multi-layer
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49572Lead-frames or other flat leads consisting of thin flexible metallic tape with or without a film carrier
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5384Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
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    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/022Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2307/00Properties of the layers or laminate
    • B32B2307/20Properties of the layers or laminate having particular electrical or magnetic properties, e.g. piezoelectric
    • B32B2307/202Conductive
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2398/00Unspecified macromolecular compounds
    • B32B2398/10Thermosetting resins
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2457/00Electrical equipment
    • HELECTRICITY
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
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    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/14Integrated circuits
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    • H01L2924/151Die mounting substrate
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    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
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    • H01L2924/1517Multilayer substrate
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    • H01L2924/181Encapsulation

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Wire Bonding (AREA)

Abstract

A composite film comprises two copper films (11, 12) adhered to and insulated from each other by a thermal setting resin (13) to be shaped in a belt shape. A lead frame is formed by etching one copper film of the composite film such that a plurality of lead patterns (15) are in succession defined including a plurality of leads (16) arranged approximately equispaced to extend in the length direction and the other copper film of the composite film is etched to form supporting patterns (19) corresponding to the respective lead patterns and for supporting the corresponding ones. A semiconductor element (20) is provided in association with the respective lead patterns and the semiconductor element is connected to the respective leads of the corresponding lead patterns by wire bonding, while the respective leads are connected to external terminals (22). The semiconductor element, the lead patterns and a portion of the external terminals are molded with a resin material so that a mold layer (23) is formed and then the composite film is severed for each of the mold layers, whereby a semiconductor device is provided. <IMAGE>

Description

SPECIFICATION Composite film, semiconductor device employing the same and method of manufacturing Background of the Invention Field of the Invention The present invention relates to a composite film, a semiconductor device employing the same and a method of manufacturing the same. More specifically, the present invention relates to a semiconductor device fabricated by applying a socalled film carrier system by utilizing a novel composite film and a method of manufacturing the same.
Description of the Prior Art A conventional method of semiconductor devices on a mass production basis employed a lead frame obtained by pressing a metallic flake.
However, a conventional lead frame thus pressed made it impossible to supply such lead frame in a continuous or endless manner. Therefore, United States Patent No. 3,689,991 was proposed which constitutes the background of the present invention. The referenced United States patent employs a flexible film carrier as shown in Fig. 1.
Such flexible film is formed by adhering a copper film 3 onto a heat resistant plastic layer 1 of such as polyimide, polyamideimide or mailer with an adhesive agent 2. Such flexible film is transferred in succession in the longitudinal direction and lead patterns each having a plurality of leads are formed, thereby to provide flexible lead frames. By employing a flexible film as shown in Fig. 1, semiconductor devices can be manufactured with higher efficiency on a mass production basis as compared with conventional employment of lead frames made of metallic flakes as punched.
However, such conventional method of manufacturing semiconductor devices utilizing a flexible film employing such conventional heat resistant plastic has not yet become popular. The reason is that organic resin such as polyimide used as a plastic layer 1 for supporting the copper films 3 is so expensive that it costs as high as approximately 50 dollars per 1 m2. In addition, even in the case where multilayer circuiting is made using such films, problems are involved.
More specifically, since resin such as polyimide forming the above described plastic layer 1 has expansibility/compressibility, it becomes difficult to form pass through holes passing therethrough.
Even if such pass through holes are formed, it was necessary to apply through hole plating 4 for the purpose of connecting the copper films 3 and 3 on both surfaces, as shown in Fig. 2. The reason is that the diameter of each pass through hole is susceptible of change due to expansibility/compressibility of the plastic layer 1.
On the other hand, conventionally hybrid integrated circuits have been fixed on a board made of aluminum, for example. A conventional approach of employing such aluminum boards is of poor convenience of operation. Accordingly, another approach of utilizing such a film carrier as shown in Fig. 1 could be thought of. However, a conventional film carrier is expensive as described above and thermal conductivity of polyimide for example is poor, so that the advantage of hybrid integrated circuits that heat dissipation is good is degraded. As a result, it was impossible to utilize such conventional film carrier as shown in Fig. 1 in manufacture of hybrid integrated circuits.
Summary of the Invention A composite film in accordance with the present invention comprises a first and second conductive films adhered to each other with an adhesive agent of such as thermal setting resin so that both are electrically insulated from each other. The first conductive film of the composite film is utilized for formation of a lead pattern and the second conductive film is utilized for supporting the lead pattern thus formed. Thus a film lead frame applicable to a film carrier system is provided.
According to the present, a flexible composite film is provided with simplicity by merely adhering conductive films to each other. An adhesive layer for adhering the two conductive films is formed to a thickness of say 20 to 100 ,am and accordingly the two conductive films can provide a withstand voltage of approximately 600 V at the least and approximately 2500 V on the average. Therefore, the inventive composite film can be advantageously utilized in manufacture of semiconductor devices and other electronic components by applying a so-called film carrier system.
Since the inventive film lead frame is structured such that a lead pattern formed by one conductive film is supported by the other conductive film, utilization of the other conductive film makes it possible to implement multilayered connection with ease. In addition, conventional through hole plating can be dispensed with even in the case where leads formed with one conductive film and leads formed with the other conductive film are electrically connected to each other. For example, a through hole can be formed with ease by pricking with a needle having a sharp tip end a portion of the composite film where the lead formed with one conductive film and the lead formed with the other conductive film are overlapped. In addition, the lead formed with one conductive film is deformed by piercing of such needle to come into contact with the lead formed with the other conductive film.Therefore, two leads can be electrically connected with ease by simply filling thereafter a solder of conductive paste in the passing through hole. The fact that the adhesive layer is extremely thin leads to facility of through hole connection.
Utilization of such composite film as described above enables mass production of semiconductor devices with ease and efficiency. Lead patterns each having a plurality of leads are formed by etching one conductive film of the thus prepared composite film. A semiconductor element is fixed in associated with the lead pattern and the respective leads of the corresponding lead pattern are electrically connected to the semiconductor element. The respective leads of the lead pattern are connected to external terminals. Thereafter at least the semiconductor element, the lead pattern and a portion of the external terminals are molded for each lead pattern, whereby a mold layer is formed. Then finally the composite film is severed for each mold layer, whereby each semiconductor apparatus is separated.Thus semiconductor devices can be manufactured on a mass production basis in accordance with a socalled film carrier system by utilizing a novel composite film comprising two conductive films adhered to each other. Since not heat resistive plastic such as polyimide of an expensive cost is utilized in such composite film, semiconductor devices per se can also be provided with a less expensive costs.
The composition film is formed in a belt shape and is continually transferred and the above described successive steps are carried out while the composite film is continually transferred. By doing so, the respective steps can be performed while the composite film is transferred in a film state until the final step of molding and thus a method of manufacturing semiconductor devices can be established by a film carrier system.
In forming lead patterns with one conductive film, a plurality of leads included in each of the lead patterns are formed with these electrically separated. Since the respective leads are electrically independent of each other, a circuit function of a semiconductor element as fixed can be tested in the film state, i.e. without carrying out any step for electrically isolating the respective leads. Since a circuit function of the semiconductor element can be thus tested with ease in the course of the manufacturing process, a yield rate of the completed products can be considerably enhanced.
In forming a film lead frame by utilizing a composite film of a belt form, a reinforcing portion for reinforcing the mechanical strength of the film is formed separately from the lead pattern by the use of one conductive film. Such reinforcing portion extends in the length direction of the composite film of the belt shape. Accordingly, when semiconductor devices and other electronic components are manufactured in accordance with a film carrier system, a lead pattern can be protected from being destroyed by the force being exerted while the film lead frame is transferred by means of the index holes.
A support pattern is formed for supporting the respective lead patterns by the use of the other conductive film of the composite film. A metallic piece fixing pattern may be formed for fixing a metallic piece by the use of the other conductive film separately from the above described support pattern. The metallic piece is fixed onto the fixing pattern and thereafter the adhesive agent or thermal setting resin at the position corresponding to the metallic piece is removed. A semiconductor element is fixed onto the metallic piece on one conductive film surface. The embodiment thus utilizing a metallic piece for fixing a semiconductor element enables such metallic piece to function as a portion for placement of a semiconductor element and also to function as a heat sink, thereby to provide preferred heat dissipation.
Accordingly, the embodiment in discussion can be advantageously utilized in manufacture of hybrid integrated circuits.
Accordingly, a principal object of the present invention is to provide a novel composite film.
Another object of the present invention is to provide a semiconductor device utilizing such novel composite film.
A further object of the present invention is to provide a method for manufacturing a semiconductor device with high efficiency by the use of a novel composite film as a lead frame of a film carrier system.
One aspect of the present invention resides in a composite film comprising two conductive films adhered to each other through an adhesive layer.
Another aspect of the present invention resides in a film lead frame wherein a lead frame is formed using one conductive film of the above described composite film and a supporting member for supporting the lead frame is formed by the use of the other conductive film of the above described composite film.
A further aspect of the present invention resides in a method for manufacturing a semiconductor device by applying a so-called film carrier system by using such film lead frame.
These objects and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
Brief Description of the Drawings Fig. 1 is a sectional view showing one example of a flexible film applicable to a conventional film carrier system which constitutes the background of the present invention; Fig. 2 is a sectional view showing one example of multilayered circuiting by the use of such conventional flexible film; Figs. 3A and 3B show one example of a composite film in accordance with the present invention, wherein Flg. 3A is a section view take along the line lIlA-lIlA in Fig. 3B and Fig. 3B is a plan view of the Fig. 3A; Figs. 4 to 10 are views showing in sequence the respective steps for manufacturing a semiconductor device by the use of a novel composite film in accordance with the present invention; Fig. 1 1 is a view showing another example of a supporting pattern; ; Figs. 12 and 13 are views showing one example of a multilayered wiring connection by the use of a novel composite film; Figs. 1 4A to 1 4C are views showing in sequence the respective steps for performing such multilayered wiring connection; Figs. 15A to 15C are views showing in sequence the respective steps of another example for performing such multilayered wiring connection; Figs. 1 6 to 19 are views showing in sequence the respective steps of a further example for manufacturing a semiconductor device by the use of a novel composite film; Fig. 20 is a view showing one example of a lead pattern, as actually practiced, on one surface of a film lead frame; Fig. 21 is a view showing one example of a supporting pattern, as actually practiced, on the other surface of the Fig. 20 film lead frame.
Description of the Preferred Embodiments Figs. 3A and 3B are views showing one example of a composite film in accordance with the present invention, wherein Fig. 3A is a sectional view taken along the line lIlA-lIlA in Fig, 3B. A composite film 10 comprises two conductive films or copper films 11 and 12 adhered to each other with an adhesive agent 13, as shown in Figs. 3A and 3B.The embodiment shown is formed with two copper films 11 and 12 each of which is that which is usually used for a printed circuit board having a thickness of approximately 35,us. An adhesive agent 13 of thermal setting resin such as epoxy resin is coated on the whole surface of one or both of the copper films 11 and 12 and then both films are adhered to each other and then the composite thus obtained is compressed by means of, for example, a roller, not shown, so that the two copper films 11 and 12 may be unitary with the adhesive agent 13 sandwiched therebetween, thereby to provide a composite film 10.Thermal setting resin for that purpose may be that described in Japanese Patent Publication No. 20394/1 980 published for opposition June 2, 1 980. The referenced Japanese patent publication gazette discloses phenol resin, melamine resin or epoxy resin as thermal setting resin. The thickness of the adhesive agent layer 13 is selected to be 20 to 100 jum. The lower limit of the thickness of the adhesive agent layer 13 is determined by the withstand voltage between the two copper films 11 and 12 and the upper limit is determined depending upon whether a passing through hole for passing through of the adhesive agent layer 13 can be simply formed when the two copper films are to be connected by way of through hole connection in multilayered connection to be described subsequently.Assuming that the thickness of the adhesive agent layer 13 is selected to be say 30,um in the above described range, a withstand voltage between the two copper films 11 and 12 would become at least 600 V and on the average more than 2500 V.
Such composite film is shaped to be in a belt shaped film by cutting the same into a predetermined width, say approximately 5 cm, required for products to be manufactured using the same. Such composite film of such belt shape is then cut to a predetermined unit length such as 50 m and is wound on a reel, not shown. Since the adhesive agent layer 13 is extremely thin, care must be taken that the two copper films 11 and 12 may not be short circuited on the cutting end surface when the composite film is pressed. * Meanwhile, such thin thickness of the adhesive agent layer 13 is effective in through hole connection of multilayered wiring, as to be described subsequently. The composite film of a belt shape is provided with index holes 14, 14,...
at equispaced intervals at both end portions where no lead patterns to be described subsequently are provided, as shown in Fig. 38. The index holes 14, 14,... are formed by punching, for example, and the same may be used for the purpose of positioning and for the purpose of transferring of the composite film in the subsequent manufacturing steps. Thus, the inventive composite film eliminates necessity of employing such expensive adhesive agent as polyimide conventionally employed and is provided by simply adherein the two conductive films with an adhesive agent, with the result that the same is provided with an extremely inexpensive cost. Such composite film can be advantageously utilized in manufacturing electronic components such as semiconductor devices in accordance with a socalled film carrier system.
Now referring to Figs. 4 to 10, the respective steps of manufacturing a semiconductor device by the use of such novel composite film will be described in the following. Meanwhile, the embodiment utilizes a so-called film carrier system and fundamentally employs an approach disclosed in the previously referenced United States Patent No. 3,689,991.
First, a composite film 10 in a belt shape as shown in Figs. 3A and 3B is prepared. One copper film 11 of the composite film 10 is selectively etched, whereby a lead pattern 15 as shown in Fig. 4 is formed on one surface of the composite film. The lead pattern 15 comprises a plurality of leads 16, which are electrically independent of each other. A series pattern 17 including a series of index apertures 14 disposed in the longitudinal direction is formed at each of both ends on one surface of the composite film of a belt shape. The series pattern 17 is formed to protect the lead pattern 15 from being deformed by the force exerted when the composite film 10 is transferred by utilizing the index apertures 14. Accordingly, in order to increase protection of such lead pattern, connecting patterns 18 for connecting the series patterns 17 and 17 at both ends are formed as shown in Fig. 4.Thus, the lead pattern 15 is completely surrounded by the series patterns 17 and the connecting patterns 18. The respective leads 16 of the lead pattern 15 are electrically independent of such series patterns 1 7 and the connecting patterns 18.
Specifically, the lead pattern 15 comprises a fixing pad 1 61 for placement thereon of a semiconductor element, to be described subsequently, at an approximate central portion.
The respective leads 16 are disposed in a dual inline fashion. The leads 16 each comprise at one end thereof a connecting electrode 162 for wire bonding connection of a bonding wire to be connected to the semiconductor element. The other end of each of the leads 1 6 has a connecting electrode 1 63 for connection of an external terminal, not shown. Such lead patterns 15 are continually formed in succession in the longitudinal direction at predetermined intervals and in the same pattern as the composite film is continually transferred from a reel on which the composite film is wound, as shown in the previously referenced United States patent. The index apertures 14 function as an index for positioning thereof. Thus, such composite film can be utilized in a film carrier system.Since such lead patterns 15, the series patterns 17 and the connecting patterns 18 can be formed by etching, no force is undesirably exerted onto the composite film in forming such patterns and accordingly the thin adhesive agent layer 13 (Fig.
3A) is not broken and hence one copper film, i.e.
the above described respective patterns are not short circuited to the other copper film 12.
The other copper film 12 of the composite film 10 is etched as shown in Fig. 5. More specifically, supporting patterns 19a and 19b are formed on the other surface of the composite film by removing a portion of the copper film 12 by etching the same in a doughnut shape. More specifically, the supporting patterns 19a and 19b are formed by etching the other copper film 12 leaving a portion corresponding to the fixing pad 161 and the connecting electrodes 162 and 163 and a portion corresponding to the series patterns 17 and the connecting patterns 18 formed on one surface of the composite film.Meanwhile, the shape of these supporting patterns 1 9A and 1 9b is determined depending on the shape of the lead patterns formed on one surface of the composite film and the portion where the semiconductor element or other chip like components and external terminals are to be connected and the portion where bonding wires to be connected need be left in the other copper film. Accordingly, in the case where the composite film is employed in a low frequency circuit where no problem arises in conjunction with parasitic capacitance between both surfaces, the whole surface of the other copper film 1 2 can be utilized as a support pattern for supporting the lead patterns, thereby to protect the same from being deformed.In such case, the tensile strength of each of the leads of each of the lead patterns 1 5 formed on one surface of the composite film may be considered as exactly the same as that in the case of one continuous copper film, inasmuch as the respective leads are adhered to the other copper film 12 on the whole surface through the adhesive agent layer 13. Meanwhile, in the case where the other copper film 12 is totally utilized as a supporting pattern, the above described parasitic capacitance occurs and therefore the same might not be suited for a high frequency circuit. Therefore, in order to avoid it, a supporting pattern as shown in Fig. 5 may be formed, so that the other copper film 1 2 may be left only in a required portion.
Meanwhile, the above described etching of the copper films 11 and 12 of the composite film are carried out simultaneously. More specifically, a resist film is screen processed on each of the copper films 11 and 12 of the composite film such that the resist film may be in the shape corresponding to the lead patterns 15, the series patterns 17 and the connecting patterns 18 as shown in Fig. 4 on one copper film 11 of the composite film and the resist film may be in the shape corresponding to the supporting patterns 19a and 19b as shown in Fig. 5 on the copper film 12 of the composite film. Thereafter the composite film is transferred continuously into an etching apparatus capable of etching simultaneously both surfaces thereof, such that an etchant is jetted onto each of both surfaces of the composite film by nozzles facing each other.Thus, the patterns shown in Figs. 4 and 5 are thus simultaneously formed on both surfaces of the composite film. For the purpose of simultaneous formation of such patterns on both surfaces, two conductive films can be preferably etched by the same etchant. However, alternatively, one conductive film may be formed with say copper of good conductivity and the other conductive film may be formed with say aluminum so that the composite film may be etched with different etchants.
The composite film with the lead patterns 15 and the supporting patterns 19 formed as described above is wound on a reel, not shown, and is stocked. Then the composite film is supplied from the reel to the subsequent steps in a frame-by-frame fashion, i.e. intermittently by the use of the index apertures 14.
At the next step a semiconductor element 20 is fixed or die bonded onto the fixing pad 161 by the use of a silver paste or solder, as shown in Fig. 6.
Then, by using a well-known automatic bonding machine, the electrodes, not shown, of the semiconductor element 20 are connected to connecting electrodes 162 of the corresponding leads by means of bonding wires 21. Since the embodiment shown is structured such that the respective leads 16 included in the lead pattern 1 5 are formed to be electrically independent of each other, a function of the circuit including the semiconductor element 20 can be tested at that time. More specifically, test is made to check whether the circuit of the semiconductor element 20 properly functions by applying electricity by sticking a testing needle, for example, to the connecting electrodes 1 63 of the respective leads 16 included in the lead pattern 15. Functional trimming may be made at that time, as necessary.
In the case where not only the semiconductor element 20 but also other circuit elements have been mounted onto the lead pattern 15, the function of the whole circuit including all these elements can be tested, as a matter of course. If it is determined by the above described function test that a prescribed function is not performed, then the semiconductor element 20 is replaced by a proper one or the above described defective semiconductor element is marked so that the said element may not be subjected to further steps, with the result that the yield rate of the completed products is enhanced. If it is determined at that test that the element performs normal operation, then the composite is coated with silicone resin, so that the semiconductor element 20 and other circuit elements, if any, and bonding wires may be protected.
Then, as shown in Fig. 7, with the film of the belt shape maintained, the connecting electrodes 163 of the respective leads 1 6 included in the lead pattern 15 are connected to the external terminals 22 by soldering. At that time, the respective external terminals 22 are bent, as shown in Fig. 8, so that the same may not be short circuited to the series pattern 17 formed at both ends on one surface of the composite film.
Then, as shown in Fig. 9, mold layers 23, 23,... are formed. More specifically, following the step shown in Fig. 7, the mold layers 23 are formed one by one or plural by plural, while the composite film is in succession transferred. In forming the mold layers 23, epoxy resin of powder is sprayed and heated to be set or solidified. The mold layers 23 are formed on the whole, while a portion of each of the external terminals 22 is left exposed. Following the step shown in Fig. 9, the composite film is severed at the portion shown by one dotted line in Fig. 9, whereby separate semiconductor devices 24 are shown in Fig. 10 are provided. Thus, semiconductor devices can be manufactured with high efficiency by utilizing the inventive composite film and by applying the so-called film carrier system.
It is needless to say that the present invention can be applied not only to semiconductor devices but also to general electronic components. In such case, the lead pattern is changed depending on the components and electronic components of a chip shape are fixed in place of semiconductor elements.
Furthermore, as described in the foregoing, one copper film of the composite film is utilized for forming a support pattern. Accordingly, in order to increase the strength the thickness of the conductive film forming the supporting pattern may be increased as compared with the conductive film for forming the lead pattern.
Fig. 11 is a view showing another example of such supporting pattern. In the Fig. 11 example the other copper film 12 is etched and an oblique stripe supporting pattern 19' is provided. Such supporting pattern may be properly determined so as to correspond to the shape of the lead pattern as described previously. A point is that the shape of the lead pattern need be maintained so that the same may be destroyed during execution of the above described steps. However, since the embodiment shown is structured such that the respective leads included in the lead pattern are independent of the others, such supporting pattern need be formed to be at least partially overlapped to the respective leads. The reason is that it is difficult to maintain the lead pattern only with the adhesive agent layer 13 (Fig. 3A).
Fig. 12 is a view showing a further embodiment of the present invention. The embodiment shown is structured such that not only the supporting patterns 19a and 19b but also the connecting leads 25 are formed by the use of the other copper film 12 of the composite film. Thus, a multilayered connection can be performed by using the inventive composite film.The connecting leads 25 are connected to predetermined ones of the leads 16 included in the lead pattern 15 formed on one surface of the composite film by through hole connection, as shown in Fig.13. More specifically, a passing through hole is formed at the portion where the lead 16 of one surface and the connecting lead 25 of the other surface of the composite film are overlapped and a conductive material 26 of such as solder is poured into the passing through hole, whereby the lead 16 and the connecting lead 25 are connected. Thus, multilayered connection is achieved.
Such multilayered connection can be achieved by a process shown in Figs, 14A to 14C or in Figs.
15A to 15C, for example.
According to the example shown in Figs, 1 4A to 14C, first a passing through hole 26 penetrating the connecting lead 25 formed as described above and the lead 16 included in the lead pattern is formed. The passing through hole 26 is formed by piercing a sharp metallic needle 27 of approximately 1 mm at the tip end through the composite film or the film lead frame from the connection lead 25 to reach the lead 16. Since the adhesive agent layer 13 is as thin as approximately 30 ym, the adhesive agent layer 13 can be pierced with ease with the metallic needle 27, as is different from conventional polyimide. When the metallic needle 27 is pierced therethrough, the needle comes into contact with the lead 16 with the rear surface lead 25 deformed.Thereafter, as shown in Fig. 1 4C, the composite film or the film lead frame having the passing through apertures 26a thus formed is allowed to pass by on a jet stream solder tank 28.
Accordingly, the solder 28a reserved in the solder tank 28 flows into the passing through holes 26a as a function of surface tension. Since the adhesive agent layer 13 is extremely thin, through hole connection of the multilayered connection can be performed with ease at this step. Although solder is fixed to the copper films remaining on the other surface of the composite film or the film lead frame, the remaining copper film is the supporting pattern and any solder fixed onto such supporting pattern does not adversely affect the performance of the completed products nor cause any inconvenience at the further manufacturing steps.
In the case shown in Figs. 1 5A to 1 so, the metallic needle 27 is pierced from the lead 16.
Accordingly, as the metallic needle 27 is inserted, the lead 16 comes in contact with the connecting lead 24. Thereafter, as shown in Fig. 1 SC, a conductive paste 29 of such as a silver paste or a solder cream is screen processed on the passing through hole 26a thus formed. As a result, the passing through hole 26a is filled with the conductive paste 29. The conductive paste 29 thus filled is then heat treated. Accordingly, a solvent included in the conductive paste is dispersed and as a result the lead 16 and the connecting lead 25 are more fully connected electrically. Screen processing of the conductive paste 29 can be simultaneously performed with the screen processing of the conductive paste to be performed on the occasion of fixing a circuit element such as a semiconductor element onto the lead pattern.Accordingly, any particular step for forming the conductive paste 29 can be dispensed with and through hole connection of multilayered wiring can be performed with efficiency.
Figs. 1 6 to 19 are views showing in sequence the manufacturing process of a further embodiment of the present invention. The previously described embodiment was formed with the fixing pad 161 (Fig. 4) for fixing a semiconductor element. By contrast, the embodiment in discussion employs a metallic piece for fixing a semiconductor element.
Accordingly, as shown in Fig.16, the lead pattern 15 has no fixing pad formed. Instead, the lead pattern 15 has a vacant region 161' at an approximate central portion for disposing a semiconductor element. Then, as shown in Fig.
17, a supporting pattern 19b and a pattern 30 to be utilized for fixing the metallic piece are formed by using the other copper film 12 of the composite film. The pattern 30 also functions to support the lead pattern 1 5 formed on one surface of the composite film together with the supporting pattern 19b.
Then, as shown in Figs. 1 8 and 19, the metallic piece 31 is fixed to the pattern 30 and then the semiconductor element 20 is fixed onto the metallic piece 31. More specifically, in the course of transfer of the composite film or the film lead frame, the metallic piece 31 made of copper, for example, is fixed onto the pattern 30 by solder, for example, as shown in Fig.19. Then the adhesive agent layer existing above the metallic piece 31 is removed by a pincette, for example. Then the semiconductor element 20 is fixed onto the metallic piece 31 thus fixed by a silver paste or solder. Then the semiconductor element 20 thus fixed and the connecting electrodes 1 62 of the respective leads included in the corresponsing lead pattern are connected by the bonding wires 21.Thereafter test is made and a resin mold layer is formed and composite films are severed to provide separate semiconductor devices, in the same manner as that of the previously described embodiments. Thus, according to the embodiment shown, since the semiconductor element 20 is fixed directly to the metallic piece 31, an excellent heat dissipating characteristic is achieved.
Accordingly, the embodiment shown can be advantageously utilized in manufacturing semiconductor elements of a large exothermic amount such as hybrid integrated circuits.
Furthermore, since the connecting electrodes 162 (Fig.16) has been supported by the metallic piece 31 even on the occasion of wire bonding between the semiconductor element and the leads, bonding can be performed better in a very stable state. In addition, in forming the mold layer 24 (Fig. 9), the metallic piece 31 may be covered wholly with the mold layer. However, if a larger heat dissipating amount is required, the surface opposite to that where the semiconductor element 20 of the metallic piece 31 is fixed may be left exposed from the mold layer. Since a conventional film carrier system utilized an insulating layer of poor thermal conductivity such as a polyimide, a semiconductor device of a large exothermic amount could not be fabricated by utilizing a film carrier system.
However, since the embodiment shown was structured such that a metallic piece is employed and a semiconductor element is fixed directly onto the same, the embodiment shown makes it possible to manufacture with high efficiency semiconductor devices of a large exothermic amount.
Figs. 20 and 21 are views showing actual examples of the lead pattern, the supporting pattern and the connecting leads manufactured in accordance with the embodiments shown in Figs, 16 to 19. Thus, the inventive composite film is utilized in manufacture of semiconductor devices, for example. Referring to Fig. 20, the lead pattern 15 includes sixty-two leads 16. Referring to Fig.
21, the supporting patterns 19a to 19g are formed, the metallic piece fixing pattern 31 is formed and the connecting leads 25 for multilayered connection are formed. The geometry and disposal of the supporting patterns 1 9b to 1 9g have been selected such that the above described parasitic capacitance may be as small as possible while the lead pattern shown in Fig. 20 may be assuredly supported. Thus it is desired that the area of the supporting pattern may be minimized.
Although the present invention has been described and illustrated in detail, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of limitation, the spirit and scope of the present invention being limited only by the terms of the appended claims.

Claims (44)

1. A composite film comprising a first conductive film, a second conductive film, and an adhesive agent layer interposed between said first conductive film and said second conductive film for adhering both to each other and for electrically isolating from each other.
2. A composite film in accordance with claim 1, wherein said adhesive agent layer comprises thermal setting resin.
3. A composite film in accordance with claim 2, wherein said adhesive agent layer has a thickness larger than a thickness for providing a withstand voltage larger than a voltage applied between said first conductive film and said second conductive film.
4. A composite film in accordance with claim 3, wherein the thickness of said adhesive agent layer is selected to be in the range of 20 to 100 Mm.
5. A composite film in accordance with claim 1, wherein said first conductive film and said second conductive film both have the same thickness.
6. A composite film in accordance with claim 1, wherein said first conductive film and said second conductive film each have a different thickness.
7. A composite film in accordance with claim 6, wherein said first conductive film is used for forming a lead pattern and said second conductive film is used for supporting said lead pattern, and said second conductive film has a thickness larger than the thickness of said first conductive film.
8. A composite film in accordance with claim 1, wherein said first conductive film and said second conductive film are made of a metallic material that can be etched by the same etchant.
9. A composite film in accordance with claim 1, wherein said first conductive film and said second conductive film are each made of a metallic material that can be etched by a different etchant.
10. A film lead frame comprising a composite film including two conductive films adhered to each other with thermal setting resin and isolated from each other, a plurality of lead patterns formed on one surface of said composite film and with one of said conductive films, each said lead pattern including a plurality of leads, and a supporting member formed on the other surface of said composite film with the other of said conductive films for supporting said lead pattern.
11. A film lead frame in accordance with claim 10, wherein said composite film is formed in a belt shape, and said lead pattern includes the same patterns formed at equispaced intervals disposed in the longitudinal direction of said composite film.
12. A film lead frame in accordance with claim 10 or 11, wherein said supporting member comprises a plurality of supporting patterns formed corresponding to the respective ones of said lead patterns.
13. A film lead frame in accordance with claim 12, which further comprises a connecting lead formed on the other surface of said composite film at the position where said supporting pattern does not exist.
14. A film lead frame in accordance with claim 13, which further comprises connecting means extending through said thermal setting resin for connecting said leads of said lead patterns and said connecting leads.
1 5. A film lead frame in accordance with claim 14, wherein said connecting means comprises passing through holes formed at the position where said lead of said lead pattern and said connecting lead are overlapped, and a conductive material filled in said passing through hole.
1 6. A film lead frame in accordance with claim 10, which further comprises a reinforcing portion formed on one surface of said composite film using said one composite film separately from said lead patterns for preventing said lead pattern from being deformed by external force.
1 7. A film lead frame in accordance with claim 16, wherein said composite film is formed in a belt shape, and said reinforcing portion comprises series pattern formed extending in the longitudinal direction of said composite film.
18. A film lead frame in accordance with claim 16 or 17, which further comprises a further reinforcing portion formed on the other surface of said composite film with the other composite film at the position corresponding to said reinforcing portion on said one surface of said composite film.
1 9. A film lead frame in accordance with claim 10, wherein said plurality of lead included in said lead pattern are formed to be electrically independent of each other.
20. A film lead frame in accordance with claim 19, wherein said supporting member comprises a supporting pattern formed with the other conductive film so as to correspond to each one of said lead patterns.
21. A film lead frame in accordance with claim 20, wherein said supporting pattern is formed to be overlapped to the respective ones of said plurality of leads at least a portion thereof.
22. A film lead frame in accordance with claim 20 or 21, which further comprises connecting leads formed on the other surface of said composite film with said other conductive film so as to be electrically independent from said supporting pattern and to be connected through said adhesive layer to any one of said leads of said lead pattern.
23. A semiconductor device comprising a composite film including two conductive films adhered to each other with thermal setting resin to be isolated from each other, a lead pattern formed on one surface of said composite film using one of said conductive films and including a plurality of leads.
a supporting member formed on the other surface of said composite film with the other of said conductive films for supporting said lead pattern, a semiconductor element fixed at a predetermined position associated with said lead pattern, connecting means for electrically connecting said semiconductor element and said lead pattern, a plurality of external terminals being connected to said plurality of leads of said lead pattern, and a mold layer for molding at least said composite film, said semiconductor element, said connecting means and said external terminals, excluding a portion of said external terminals.
24. A semiconductor device in accordance with claim 23, which further comprises an element placing portion formed on one surface of said composite film using said one of said conductive films at a predetermined position associated with said lead pattern for placing said semiconductor element thereon, said semiconductor element being fixed onto said element placing portion on said one surface of said composite film.
25. A semiconductor device in accordance with claim 23, which further comprises a metallic piece, and a metallic piece fixing portion formed on the other surface of said composite film using said other conductive film for fixing said metallic piece thereto, and wherein said semiconductor element is fixed onto said metallic piece from said one surface of said composite film after removing said thermal setting resin at a portion associated with said metallic piece fixing portion, said mold layer being formed to mold at least a portion or the whole of said metallic piece as well.
26. A semiconductor device in accordance with claim 23, wherein said connecting means comprises a bonding wire.
27. A semiconductor device in accordance with claim 23, wherein said supporting member comprises a supporting pattern formed to correspond to s#aid lead pattern.
28. A semiconductor device in accordance with claim 27, wherein said plurality of leads of said lead pattern are formed to be electrically independent of each other.
29. A semiconductor device in accordance with claim 28, wherein said supporting patterns are formed to be overlapped to the respective ones of said plurality of leads at least at the portion thereof.
30. A semiconductor device in accordance with claim 27, which further comprises a connecting lead formed on the other surface of said composite film using said other conductive film at a portion where said supporting pattern does not exist.
31. A semiconductor device in accordance with claim 30, which further comprises connecting means for connecting said plurality of leads and said connecting leads through said thermal setting resin.
32. A semiconductor device in accordance with claim 31, wherein said connecting means comprises a passing through hole formed at the position where any one of said plurality of leads and said connecting leads are overlapped, and a conductive material filled in said passing through hole.
33. A method of manufacturing a semiconductor device comprising the steps of preparing a composite film including two conductive films adhered to each other with thermal setting resin to be isolated from each other, etching one of said conductive films of said composite film for forming a plurality of lead patterns each having a plurality of leads on one surface of said composite film, fixing a semiconductor element onto one surface of said composite film associated with said lead pattern, electrically connecting said semiconductor element to one end of each of said leads of said lead pattern, connecting external terminals to the other end of each of said leads of said lead pattern, forming a mold layer for molding at least said composite film and said semiconductor element excluding a portion of each said external terminal and severing said composite film for providing a separate semiconductor device for each mold layer.
34. A method of manufacturing a semiconductor device in accordance with claim 33, wherein said composite film is formed in a belt shape, said plurality of lead patterns are formed at equispaced intervals in the longitudinal direction of said composite film, and each said step is carried out as said composite film is transferred in said longitudinal direction.
35. A method of manufacturing a semiconductor device in accordance with claim 33, which further comprises the step of etching the other conductive film of said composite film for forming a supporting pattern corresponding to said plurality of lead patterns for supporting the corresponding lead patterns.
36. A method of manufacturing a semiconductor device, comprising the steps of preparing a composite film including two conductive films adhered to each other with thermal setting resin to be isolated from each other, etching one of said conductive films of said composite film for forming on one surface of said composite film a plurality of lead patterns each including a plurality of leads, etching the other of said conductive films of said composite film for forming on the other surface of said composite film a metallic piece fixing pattern for fixing a metallic piece, fixing a metallic piece onto said metallic piece fixing pattern, removing said thermal setting resin at the position associated with said metallic piece, fixing a semiconductor element onto said metallic piece from said one surface of said composite film, connecting said semiconductor element to one end of each of said leads of said corresponding lead pattern, connecting external terminals to the other end of each of said leads of said lead pattern, forming a mold layer for molding at least said composite film, said semiconductor element and a portion or the whole of said metallic piece, excluding a portion of each said external terminal, and severing said composite film for providing a separate semiconductor device for each said mold layer.
37. A semiconductor device in accordance with claim 36, wherein said composite film is formed in a belt shape, said plurality of lead patterns are formed at equispaced intervals in the longitudinal direction of said composite film, and each said step is performed while said composite film is transferred in said longitudinal direction.
38. A method of manufacturing a semiconductor device in accordance with claim 36, which further comprises the steps of etching the other of said conductive films of said composite film for forming on the other surface of said composite film a plurality of supporting patterns for supporting said lead pattern so as to be formed corresponding to said plurality of lead patterns and independently of said metallic piece fixing patterns.
39. A method of manufacturing a semiconductor device in accordance with claim 35 or 38, which further comprises the steps of etching the other of said conductive films of said composite film for forming a connecting lead on the other surface of said composite film at the position where said supporting pattern does not exist, and connecting said leads of said lead patterns to said connecting leads.
40. A method of manufacturing a semiconductor device in accordance with claim 39, wherein said step of connecting said leads of said lead patterns to said connecting leads comprises the steps of forming passing through holes at the portion where said lead of said lead pattern and said connecting lead are overlapped to each other, and filling a conductive material into said passing through hole.
41. A method of manufacturing a semiconductor device in accordance with claim 40, wherein said step of filling said conductive material in said passing through hole comprises a step of screen processing a conductive paste onto said passing through hole.
42. A method of manufacturing a semiconductor device in accordance to claim 40, wherein said step of filling said conductive material into said passing through hole comprises the step of filling solder into said passing through hole while said composite film is allowed to pass by on a solder flow upward.
43. A composite film substantially as herein described with reference to any of Figures 3 to 21 of the accompanying drawings.
44. A semiconductor device made by a method substantially as herein described with reference to any of Figures 3 to 21 of the accompanying drawings.
GB8200313A 1981-01-17 1982-01-06 Composite film Expired GB2093401B (en)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP567281A JPS57120361A (en) 1981-01-17 1981-01-17 Structure of film substrate
JP706881A JPS57120397A (en) 1981-01-19 1981-01-19 Method of connecting both-side printed foil of both-side printed circuit board
JP706981A JPS57120398A (en) 1981-01-19 1981-01-19 Method of connecting both-side printed foil of both-side printed circuit board
JP1618281A JPS57130457A (en) 1981-02-04 1981-02-04 Mass assembling method of semiconductor device
JP1618381A JPS57130458A (en) 1981-02-04 1981-02-04 Film substrate structure
JP56024028A JPS57138167A (en) 1981-02-19 1981-02-19 Manufacture of semiconductor device

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GB2093401A true GB2093401A (en) 1982-09-02
GB2093401B GB2093401B (en) 1985-07-17

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2147457A (en) * 1983-09-28 1985-05-09 Philips Electronic Associated Encapsulated semiconductor device with composite conductive leads
EP0147807A2 (en) * 1983-12-27 1985-07-10 Rogers Corporation Method for forming a substrate for tape automated bonding for electronic circuit elements
US4803542A (en) * 1980-08-05 1989-02-07 Gao Gessellschaft Fur Automation Und Organisation Mbh Carrier element for an IC-module
GB2254186A (en) * 1991-03-23 1992-09-30 Samsung Electronics Co Ltd Semiconductor lead frame
WO2011141764A1 (en) * 2010-05-12 2011-11-17 Fci Method of manufacture of flexible printed circuits

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4803542A (en) * 1980-08-05 1989-02-07 Gao Gessellschaft Fur Automation Und Organisation Mbh Carrier element for an IC-module
GB2147457A (en) * 1983-09-28 1985-05-09 Philips Electronic Associated Encapsulated semiconductor device with composite conductive leads
EP0147807A2 (en) * 1983-12-27 1985-07-10 Rogers Corporation Method for forming a substrate for tape automated bonding for electronic circuit elements
EP0147807A3 (en) * 1983-12-27 1986-12-30 Rogers Corporation Method and apparatus for tape automated bonding of integrated circuits
GB2254186A (en) * 1991-03-23 1992-09-30 Samsung Electronics Co Ltd Semiconductor lead frame
WO2011141764A1 (en) * 2010-05-12 2011-11-17 Fci Method of manufacture of flexible printed circuits
CN102939801A (en) * 2010-05-12 2013-02-20 微连接股份公司 Method of manufacture of flexible printed circuits
CN102939801B (en) * 2010-05-12 2015-11-25 微连接股份公司 The method of manufacturing flexible printed circuit and the flexible print circuit manufactured by described method

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GB2093401B (en) 1985-07-17
DE3201133A1 (en) 1982-11-11

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