JPS57120398A - Method of connecting both-side printed foil of both-side printed circuit board - Google Patents

Method of connecting both-side printed foil of both-side printed circuit board

Info

Publication number
JPS57120398A
JPS57120398A JP706981A JP706981A JPS57120398A JP S57120398 A JPS57120398 A JP S57120398A JP 706981 A JP706981 A JP 706981A JP 706981 A JP706981 A JP 706981A JP S57120398 A JPS57120398 A JP S57120398A
Authority
JP
Japan
Prior art keywords
side printed
circuit board
foil
printed circuit
printed foil
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP706981A
Other languages
Japanese (ja)
Other versions
JPS6347157B2 (en
Inventor
Yoshio Miura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP706981A priority Critical patent/JPS57120398A/en
Priority to GB8200313A priority patent/GB2093401B/en
Priority to DE3201133A priority patent/DE3201133A1/en
Publication of JPS57120398A publication Critical patent/JPS57120398A/en
Publication of JPS6347157B2 publication Critical patent/JPS6347157B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
JP706981A 1981-01-17 1981-01-19 Method of connecting both-side printed foil of both-side printed circuit board Granted JPS57120398A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP706981A JPS57120398A (en) 1981-01-19 1981-01-19 Method of connecting both-side printed foil of both-side printed circuit board
GB8200313A GB2093401B (en) 1981-01-17 1982-01-06 Composite film
DE3201133A DE3201133A1 (en) 1981-01-17 1982-01-15 COMPOSITE LAYER ARRANGEMENT, IN PARTICULAR FOR USE IN A SEMICONDUCTOR ARRANGEMENT, AND METHOD FOR THE PRODUCTION THEREOF

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP706981A JPS57120398A (en) 1981-01-19 1981-01-19 Method of connecting both-side printed foil of both-side printed circuit board

Publications (2)

Publication Number Publication Date
JPS57120398A true JPS57120398A (en) 1982-07-27
JPS6347157B2 JPS6347157B2 (en) 1988-09-20

Family

ID=11655781

Family Applications (1)

Application Number Title Priority Date Filing Date
JP706981A Granted JPS57120398A (en) 1981-01-17 1981-01-19 Method of connecting both-side printed foil of both-side printed circuit board

Country Status (1)

Country Link
JP (1) JPS57120398A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60208894A (en) * 1984-04-03 1985-10-21 カシオ計算機株式会社 Method of producing flexible substrate
JPS60208888A (en) * 1984-04-03 1985-10-21 カシオ計算機株式会社 Method of producing flexible substrate
JP2002353615A (en) * 2001-05-22 2002-12-06 Shin Etsu Polymer Co Ltd Method of establishing continuity between wiring patterns on both faces of flexible printed wiring board, and flexible printed wiring board using the same

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02139270A (en) * 1988-11-21 1990-05-29 Matsushita Electric Ind Co Ltd Printer

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4950459A (en) * 1972-09-20 1974-05-16
JPS5026067A (en) * 1973-03-06 1975-03-18
JPS5156968A (en) * 1974-09-16 1976-05-19 Itt
JPS5351468A (en) * 1976-10-20 1978-05-10 Matsushita Electric Ind Co Ltd Method of producing printed circuit board
JPS5376366A (en) * 1976-12-18 1978-07-06 Fujitsu Ltd Method of producing ceramic circuit board
JPS55102291A (en) * 1979-01-29 1980-08-05 Nippon Mektron Kk Structure for and method of conducting through hole of flexible circuit substrate

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4950459A (en) * 1972-09-20 1974-05-16
JPS5026067A (en) * 1973-03-06 1975-03-18
JPS5156968A (en) * 1974-09-16 1976-05-19 Itt
JPS5351468A (en) * 1976-10-20 1978-05-10 Matsushita Electric Ind Co Ltd Method of producing printed circuit board
JPS5376366A (en) * 1976-12-18 1978-07-06 Fujitsu Ltd Method of producing ceramic circuit board
JPS55102291A (en) * 1979-01-29 1980-08-05 Nippon Mektron Kk Structure for and method of conducting through hole of flexible circuit substrate

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60208894A (en) * 1984-04-03 1985-10-21 カシオ計算機株式会社 Method of producing flexible substrate
JPS60208888A (en) * 1984-04-03 1985-10-21 カシオ計算機株式会社 Method of producing flexible substrate
JPH0434320B2 (en) * 1984-04-03 1992-06-05 Casio Computer Co Ltd
JPH0434319B2 (en) * 1984-04-03 1992-06-05 Casio Computer Co Ltd
JP2002353615A (en) * 2001-05-22 2002-12-06 Shin Etsu Polymer Co Ltd Method of establishing continuity between wiring patterns on both faces of flexible printed wiring board, and flexible printed wiring board using the same

Also Published As

Publication number Publication date
JPS6347157B2 (en) 1988-09-20

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