GB2087157A - Solder plating printed circuit boards - Google Patents
Solder plating printed circuit boards Download PDFInfo
- Publication number
- GB2087157A GB2087157A GB8041013A GB8041013A GB2087157A GB 2087157 A GB2087157 A GB 2087157A GB 8041013 A GB8041013 A GB 8041013A GB 8041013 A GB8041013 A GB 8041013A GB 2087157 A GB2087157 A GB 2087157A
- Authority
- GB
- United Kingdom
- Prior art keywords
- resist
- solder
- photo
- pads
- board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
- H05K3/062—Etching masks consisting of metals or alloys or metallic inorganic compounds
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3473—Plating of solder
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0302—Properties and characteristics in general
- H05K2201/0305—Solder used for other purposes than connections between PCB or components, e.g. for filling vias or for programmable patterns
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0361—Stripping a part of an upper metal layer to expose a lower metal layer, e.g. by etching or using a laser
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
- H05K2203/1377—Protective layers
- H05K2203/1394—Covering open PTHs, e.g. by dry film resist or by metal disc
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
- H05K3/064—Photoresists
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Metallurgy (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
A method of producing a printed circuit board which is selectively solder plated, especially a double sided board, wherein the board is initially provided with copper tracks and pads all solder plated; a film of photo-resist is laminated to the board usually on both surfaces thereof; the photo-resist is selectively exposed to light so that an etch-resist remains only on the pads; the remaining photo-resist is removed by a chemical developer; the solder is chemically stripped from the tracks while the pads are protected by the etch resist; and the etch resist is chemically stripped from the pads, thereby to produce a board on which only the pads are solder plated.
Description
SPECIFICATION
Production of selectively solder-plated regions on printed circuit boards
Field of invention
The present invention relates to the production of selectively solder-plated printed circuit boards. The process may be applied to single-sided boards but is of particular application to double-sided boards and especially those that have through hole plated connection between circuit faces.
Background to the invention
Some years ago, it became popular to solder-plate the complete conductor pattern of a printed circuit board so as to provide an etch resist and also solder on the pads, to which connections are to be made.
Whilst the process proved acceptable for some types of printed circuit board, the procedure has produced problems for boards having a solder mask where subsequent flow soldering processes are used. Non-selective plating of tin-lead on the conductors can result in the breakdown of the solder mask at the soldering stage which has an adverse effect on its appearance and insulating properties.
Development has therefore been directed to a method whereby the solder is applied to the pads alone so as to achieve so-called selective solderplating. The advantage of this is that there is no longer a deposit of solder on conductors which are beneath the solder mask coating.
Consequently, selectively solder-plated boards do not suffer from the blistering of the resist which can occur as a result of heating and melting of the solder-plated tracks beneath the resist as the pads are soldered. This blistering has been found to allow the ingress of moisture to the conductors of the board and this in turn has been found to lower the insulation properties of the solder mask.
Prior art
One process known to the applicants is known as the hot air-levelling process. In this process the conductor tracks are formed and coated with a solder mask except those areas where plating is required (for example on the printed circuit pads) using a silk-screening process or the like. The board is then dipped in a molten solder bath so that the solder adheres to the exposed copper pads. The solder will also ball on these pads and bridge and fill the holes in the board. Excess solder is removed by an air-knife blowing across the board face and through the holes. The process suffers from two problems:
1) thermal distortion of the board arising from the hot solder dip, and
2) removal of solder using an air-knife causes the remaining solder deposit to vary greatly in thickness.
Another process known to the applicants is that developed by Nevin Electric Limited. This process is known as the SSP process and is described in British
Patent Specification 1536772. The method is such that conductors are built up by way of pattern electro-plating and this is followed by selectively plating solder on the conductor pattern. Unwanted base copper is then etched away chemically after removal of the plating masks. The etching is not selective as is the case with conventionally formed boards, but relies on the thickness differential between base copper and electro-plated copper.
However, it is inevitable that some conductor copper is lost at this stage, dependent on the amount of etching required for the base copper.
Athird process known to the applicants is known as the Ronnanet process. This produces doublethickness pads and relies on a deposition of electroless coppet and a subsequent deposition of electroplated copper whether or not the board is a singlesided or plated-through.
It is therefore an object of the present invention to provide an improved process for producing selectively solder-plated regions of a printed circuit board. It is also an object of the invention to provide an improved printed circuit board of this type.
The invention
In the production of a printed circuit board having a printed circuit containing tracks and pads on at least one surface thereof and in which in its final form only the pads are to be solder-plated, the board is first formed by any known process which results in all of the tracks and pads being solder-plated, and thereafter
1) said at least one surface is laminated or coated with a photo-sensitive material (normally referred to as a photo-resist),
2) the said surface is exposed to light so as either to expose only the photo-resist in the region of each pad orto expose the photo-resist except in the region of each pad, depending on the properties of the photo-resist employed, thereby to form an etch-resist in the region of each pad,
3) a chemical developer is applied to the board so as to remove the photo-resist except in the regions of the pads as determined by the previous exposure to light, the developer being selected in accordance with the chosen photo-resist,
4) the board is washed,
5) the exposed solder is now stripped from the tracks using a chemical stripper which has only the minimum effect on copper so as not at all (or only minimally) to attack the copper tracks,
6) the board is again washed,
7) the resist material forming the etch-resist and remaining on the pads is then stripped using a chemical stripper compatible with the chosen photoresist material, and
8) the board is given a final wash.
Where the board is to be a double-sided and plated-through board, the initial process must be one which is capable of producing copper-plating through the holes in the board (in manner known per se) so as to produce the necessary interconnection between the conductors on one side and the conductors on the other side of the board. Additionally all the printed circuit bearing surfaces of the board must be coated or laminated with photo-resist material.
Typically the photographicfilm applied by step 2 of the process is Riston type 3315 'special' material as manufactured by Dupon (UK) Limited of Huntingdon, Cambridgeshire, England.
Conveniently a 1.5 mm layer is applied to each face, using a suitable laminating machine which applies film by means of heat and pressure.
In the exposure step 2 the board is conveniently exposed to light through a negative of the pads for that face. Development may preferably be carried out using Dupont developer as supplied for the film specified above or by a one per cent sodium carbonate solution.
According to a particularly preferred feature of the invention, the exposed solder is stripped using a liquid chemical such as the type known as T strip or more preferably STRIPS-ALL as produced by Robertsons Chemicals Limited of Diss, Norfolk, England.
Preferably the resist material is stripped from the solder-plated pad in accordance with step 7 by using a a liquid chemical produced by Robertson Chemicals
Limited and sold under the trade name EP118or EP96 but any other aqueous dry film stripper may be used.
It has been found that the step of stripping the solder is exothermic and if the stripping chemical goes beyond a critical temperature it may fail to strip the solder properly and may even break down and give off toxic fumes. To this end the throughput of the stripping bath of step 5 must be controlled to keep the bath temperature below the critical value. In addition or alternatively cooling means may be provided for cooling the bath to increase the throughput capacity thereof.
The invention may be applied to a board having a printed circuit on one surface only provided all the tracks and pads are initially solder-plated.
If such a board has holes in it from one side to the other, it is essential hat both faces of the circuit board are covered with the photo-resist material or film and the areas around any hole are photographically processed on both sides of the board so that no stripping solution can enter the hole nor contact the solder-plating around the mouth of any such hole by reaching it from the reverse side of the board through the hole.
After the process of the invention the exposed copper tracks may not be chemically clean to a sufficiently high standard. If subsequent cleaning of these tracks is necessary it is important that this is carried out by means of a process that does not galvanically deposit copper onto the solder-plating or solder onto the copper. Preferably therefore the board is scrubbed using only water or a chemically neutral or inert liquid with or without an abrasive powder which itself must be non-active chemically relative to the board and the metals exposed thereon.
After cleaning to the required standard a solderresist may be applied to the board (in known manner) to protect inter alia the tracks from further corrosion or tarnishing. The solder-resist (sometimes referred to as a solder mask), which is normally applied during one of the final stages of production of a printed circuit board, is usually applied by a silk-screening process. The area of the board remaining unmasked corresponds to the regions of the pads previously referred to and a photo-tool by which these regions can be determined during the exposure step 2 of the method of the invention, can conveniently be formed from the artwork or the like prepared from the known step of forming the silk screen and subsequent solder mask.
Typically a photographic transparency of the solder mask is prepared from which the silk screen is formed and either this transparency or the photographic inverse (i.e. negative versus positive or vice versa) may be used as the aforementioned phototool, the choice being dictated by the properties of the chosen photo-resist material first applied in step 1 of the aforementioned method. The invention also lies in a printed circuit board when formed by the process of the invention.
Derailed description of the process
In one example a double-sided printed circuit board is formed, connecting holes are drilled therethrough and copper-coated using deposition of electroless copper on the hole surfaces and also the copper faces. This is followed by the pattern-plating of further copper on the tracks, pads and walls of the interconnecting holes and finally further patternplating solder onto the tracks and pads.
In accordance with the invention both top and bottom surfaces of the board are then laminated using 1.5 mm Dupont Riston type 3315 'special' photo-resist material. This is achieved by applying the photo-resist film with a laminator which applies heat and pressure to the film.
Each of the faces of the laminated board is now exposed to light using a mask corresponding to the negative of the pad regions for that side of the board.
Alternatively a positive solder-mask photo-tool may be used derived from the artwork used to construct the silk screen for applying the solder mask to the final board in the known step of applying the solder mask or solder-resist thereto. In this way the pads and regions immediately surrounding the pads only are exposed to light and the laminated photo-resist material on the remainder of the board remains unexposed.
Those areas of the photo-resist film not exposed to light are then removed using either Dupont developer or 1% sodium carbonate solution. It will be appreciated that the development stage would not normally be applied until after both faces of a double-sided board had been exposed to light to form a resist material over the pads.
The board is then washed.
After washing the solder can be removed from the exposed areas of conductor using a solder-removing liquid such as "T Strip" or "Strips-all" as manufactured by Robertsons Chemicals Limited. It is impor tant that the correct stripper is used since if the wrong stripper is used it may lift the resist from the pads or begin to etch the copper tracks.
After the solder has been removed from the tracks, the board is again washed.
The resist material on the pads covering the solder remaining thereon, must now be removed and this is achieved using an aqueous dry film stripper such as
EP118 or EP96 of Robertsons Chemicals Limited.
However it is to be understood that most aqueous dry film strippers could be used particularly those based on potassium hydroxide.
After the resist material has been stripped, the board can be washed a final time.
In order to ensure that the lead-stripping process does not overheat the "T Strip" material, the stripping bath may be cooled or the throughput may be controlled so as to maintain bath temperatures below the critical value at which breakdown of the stripping action of the material and evolution of toxic gas occurs.
The advantage of the invention is that the selective plating does not damage the substrate as does the overheating arising from the solder dip in the air-levelling process nor is there any appreciable attack on the tracks of the circuit board as can occur in the Nevin process.
CLAIMS (Filed on 28/7/81)
1. A method of producing a printed circuit board having a printed circuit containing copper tracks and pads on at least one surface thereof and in which in its final form only the pads are solder plated, which method includes the steps of:
a) providing the board on said at least one surface with tracks and pads all of which are solder-plated;
b) applying a photo-resist over said at least one surface;
c) selectively exposing said photo-resist to light to form an etch-resist in the region of each pad;
d) applying a chemical developer to remove the photo-resist except for the etch-resist in the regions of the pads;
e) chemically stripping exposed solder from the tracks with a stripper substantially inert to copper;
f) chemically stripping the etch-resist from the regions of the pads.
2. A method according to claim 1, according to which the photo-resist is one which is exposed to light only in the regions of the pads in order to form the etch resist in said regions, and the developer is one which acts to remove the unexposed area of said photo-resist.
3. A method according to claim 1 or claim 2, according to which the board is washed at least between steps d) and e), steps e) and f) and after step f).
4. A method according to claim 1 or claim 2 or claim 3, including the further final step of applying a solder resist except in the region of the solder plated pads.
5. A method according to any of claims 1 to 4, applied to a double sided printed circuit board having plated-through holes providing circuit connections from one side of the board to the other, wherein the photo-resist is applied over both surfaces of the board and then both said surfaces are exposed to light before application of the chemical developer.
6. A method according to any of claims 1 to 5, according to which the exposure to light is effected through a mask corresponding to a negative of the pad regions on the surface being exposed.
7. A method according to claim 4 or claim 5 when appendant to claim 4, according to which exposure to light is effected by means of a positive photo-tool derived from the artwork used to construct a silk screen used for application of the solder resist.
8. A method according to any of claims 1 to 7, according to which the photo-resist is applied by a laminating machine which laminates a film of photoresist to the surface under heat and pressure.
9. A method according to claim 8, according to which the photo-resist is applied as a film about 1.5 mm thick.
10. A method according to claim 9, according to which the photo-resist is Riston type 3315 "special" photo-resist material (manufactured by Dupont (U.K.) Ltd.).
11. A method according to claim 10, according to which the chemical develop is a one per cent aqueous solution of sodium carbonate.
12. A method according to any of claims 1 to 11, according to which the solder stripper is a liquid chemical known as "T strip" or "STRIPSALL" (the latter manufactured by Robertson Chemicals Ltd.).
13. A method according to any of claims 1 to 12, according to which the resist stripper is an aqueous dry film stripper based on potassium hydroxide.
14. A method according to claim 13, according to which the aqueous dry film stripper is one known as "EP118" or"EP96" (manufactured by Robertson
Chemicals Ltd.).
15. A method according to any of claims 1 to 14, according to which solder stripping is effected in a stripping bath at a stripping rate controlled to maintain the temperature of the stripping chemical below a predetermined level.
16. A method according to claim 15, according to which the solder stripping bath is cooled during the solder stripping step.
17. A method of producing a printed circuit board substantially as hereinbefore descried.
18. A printed circuit board when produced by the method of any of claims 1 to 17.
**WARNING** end of DESC field may overlap start of CLMS **.
Claims (18)
1. A method of producing a printed circuit board having a printed circuit containing copper tracks and pads on at least one surface thereof and in which in its final form only the pads are solder plated, which method includes the steps of:
a) providing the board on said at least one surface with tracks and pads all of which are solder-plated;
b) applying a photo-resist over said at least one surface;
c) selectively exposing said photo-resist to light to form an etch-resist in the region of each pad;
d) applying a chemical developer to remove the photo-resist except for the etch-resist in the regions of the pads;
e) chemically stripping exposed solder from the tracks with a stripper substantially inert to copper;
f) chemically stripping the etch-resist from the regions of the pads.
2. A method according to claim 1, according to which the photo-resist is one which is exposed to light only in the regions of the pads in order to form the etch resist in said regions, and the developer is one which acts to remove the unexposed area of said photo-resist.
3. A method according to claim 1 or claim 2, according to which the board is washed at least between steps d) and e), steps e) and f) and after step f).
4. A method according to claim 1 or claim 2 or claim 3, including the further final step of applying a solder resist except in the region of the solder plated pads.
5. A method according to any of claims 1 to 4, applied to a double sided printed circuit board having plated-through holes providing circuit connections from one side of the board to the other, wherein the photo-resist is applied over both surfaces of the board and then both said surfaces are exposed to light before application of the chemical developer.
6. A method according to any of claims 1 to 5, according to which the exposure to light is effected through a mask corresponding to a negative of the pad regions on the surface being exposed.
7. A method according to claim 4 or claim 5 when appendant to claim 4, according to which exposure to light is effected by means of a positive photo-tool derived from the artwork used to construct a silk screen used for application of the solder resist.
8. A method according to any of claims 1 to 7, according to which the photo-resist is applied by a laminating machine which laminates a film of photoresist to the surface under heat and pressure.
9. A method according to claim 8, according to which the photo-resist is applied as a film about 1.5 mm thick.
10. A method according to claim 9, according to which the photo-resist is Riston type 3315 "special" photo-resist material (manufactured by Dupont (U.K.) Ltd.).
11. A method according to claim 10, according to which the chemical develop is a one per cent aqueous solution of sodium carbonate.
12. A method according to any of claims 1 to 11, according to which the solder stripper is a liquid chemical known as "T strip" or "STRIPSALL" (the latter manufactured by Robertson Chemicals Ltd.).
13. A method according to any of claims 1 to 12, according to which the resist stripper is an aqueous dry film stripper based on potassium hydroxide.
14. A method according to claim 13, according to which the aqueous dry film stripper is one known as "EP118" or"EP96" (manufactured by Robertson
Chemicals Ltd.).
15. A method according to any of claims 1 to 14, according to which solder stripping is effected in a stripping bath at a stripping rate controlled to maintain the temperature of the stripping chemical below a predetermined level.
16. A method according to claim 15, according to which the solder stripping bath is cooled during the solder stripping step.
17. A method of producing a printed circuit board substantially as hereinbefore descried.
18. A printed circuit board when produced by the method of any of claims 1 to 17.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB8041013A GB2087157B (en) | 1980-11-05 | 1980-12-22 | Solder plating printed circuit boards |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB8035492 | 1980-11-05 | ||
GB8041013A GB2087157B (en) | 1980-11-05 | 1980-12-22 | Solder plating printed circuit boards |
Publications (2)
Publication Number | Publication Date |
---|---|
GB2087157A true GB2087157A (en) | 1982-05-19 |
GB2087157B GB2087157B (en) | 1984-06-06 |
Family
ID=26277419
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB8041013A Expired GB2087157B (en) | 1980-11-05 | 1980-12-22 | Solder plating printed circuit boards |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2087157B (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3623505A1 (en) * | 1986-07-09 | 1988-01-21 | Deutsche Telephonwerk Kabel | METHOD FOR PRODUCING CIRCUIT BOARDS WITH GALVANIC LEAD-TIN LAYERS SELECTIVELY APPLIED ON THE SOLUTION EYES AND HOLE WALLS |
EP0361752A2 (en) * | 1988-09-26 | 1990-04-04 | AT&T Corp. | Selective solder formation on printed circuit boards |
GB2300524A (en) * | 1995-05-05 | 1996-11-06 | Compeq Manufacturing Co Limite | Process for making a printed circuit board partially coated with solder |
US7910156B2 (en) * | 2007-03-30 | 2011-03-22 | Endicott Interconnect Technologies, Inc. | Method of making circuitized substrate with selected conductors having solder thereon |
FR2972597A1 (en) * | 2011-03-10 | 2012-09-14 | Thales Sa | Method for manufacturing printed circuit board, involves exposing protective layer to remove wiring areas, and providing photosensitive layer between tracks, where thickness of photosensitive layer is equal to thickness of tracks |
-
1980
- 1980-12-22 GB GB8041013A patent/GB2087157B/en not_active Expired
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3623505A1 (en) * | 1986-07-09 | 1988-01-21 | Deutsche Telephonwerk Kabel | METHOD FOR PRODUCING CIRCUIT BOARDS WITH GALVANIC LEAD-TIN LAYERS SELECTIVELY APPLIED ON THE SOLUTION EYES AND HOLE WALLS |
EP0361752A2 (en) * | 1988-09-26 | 1990-04-04 | AT&T Corp. | Selective solder formation on printed circuit boards |
EP0361752A3 (en) * | 1988-09-26 | 1990-06-13 | American Telephone And Telegraph Company | Selective solder formation on printed circuit boards |
US4978423A (en) * | 1988-09-26 | 1990-12-18 | At&T Bell Laboratories | Selective solder formation on printed circuit boards |
GB2300524A (en) * | 1995-05-05 | 1996-11-06 | Compeq Manufacturing Co Limite | Process for making a printed circuit board partially coated with solder |
US7910156B2 (en) * | 2007-03-30 | 2011-03-22 | Endicott Interconnect Technologies, Inc. | Method of making circuitized substrate with selected conductors having solder thereon |
FR2972597A1 (en) * | 2011-03-10 | 2012-09-14 | Thales Sa | Method for manufacturing printed circuit board, involves exposing protective layer to remove wiring areas, and providing photosensitive layer between tracks, where thickness of photosensitive layer is equal to thickness of tracks |
Also Published As
Publication number | Publication date |
---|---|
GB2087157B (en) | 1984-06-06 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |