GB2078407B - Procedure and apparatus for interprocessor data transfer in a multiprocessor system - Google Patents

Procedure and apparatus for interprocessor data transfer in a multiprocessor system

Info

Publication number
GB2078407B
GB2078407B GB8117915A GB8117915A GB2078407B GB 2078407 B GB2078407 B GB 2078407B GB 8117915 A GB8117915 A GB 8117915A GB 8117915 A GB8117915 A GB 8117915A GB 2078407 B GB2078407 B GB 2078407B
Authority
GB
United Kingdom
Prior art keywords
procedure
data transfer
multiprocessor system
interprocessor data
interprocessor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB8117915A
Other languages
English (en)
Other versions
GB2078407A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kone Corp
Original Assignee
Kone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kone Corp filed Critical Kone Corp
Publication of GB2078407A publication Critical patent/GB2078407A/en
Application granted granted Critical
Publication of GB2078407B publication Critical patent/GB2078407B/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Multi Processors (AREA)
GB8117915A 1980-06-12 1981-06-11 Procedure and apparatus for interprocessor data transfer in a multiprocessor system Expired GB2078407B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FI801897A FI66995C (fi) 1980-06-12 1980-06-12 Foerfarande och anordning foer att oeverfoera data mellanprocessorer i ett flerprocessorsystem

Publications (2)

Publication Number Publication Date
GB2078407A GB2078407A (en) 1982-01-06
GB2078407B true GB2078407B (en) 1984-11-14

Family

ID=8513563

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8117915A Expired GB2078407B (en) 1980-06-12 1981-06-11 Procedure and apparatus for interprocessor data transfer in a multiprocessor system

Country Status (6)

Country Link
BE (1) BE889211A (xx)
DE (1) DE3123382C2 (xx)
FI (1) FI66995C (xx)
FR (1) FR2484669B1 (xx)
GB (1) GB2078407B (xx)
HK (1) HK5890A (xx)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7802079B2 (en) 1999-04-09 2010-09-21 Clearspeed Technology Limited Parallel data processing apparatus
US7925861B2 (en) 1999-04-09 2011-04-12 Rambus Inc. Plural SIMD arrays processing threads fetched in parallel and prioritized by thread manager sequentially transferring instructions to array controller for distribution
US7958332B2 (en) 1999-04-09 2011-06-07 Rambus Inc. Parallel data processing apparatus
US7966475B2 (en) 1999-04-09 2011-06-21 Rambus Inc. Parallel data processing apparatus
US8171263B2 (en) 1999-04-09 2012-05-01 Rambus Inc. Data processing apparatus comprising an array controller for separating an instruction stream processing instructions and data transfer instructions
US8169440B2 (en) 1999-04-09 2012-05-01 Rambus Inc. Parallel data processing apparatus
US8174530B2 (en) 1999-04-09 2012-05-08 Rambus Inc. Parallel date processing apparatus
US8762691B2 (en) 1999-04-09 2014-06-24 Rambus Inc. Memory access consolidation for SIMD processing elements using transaction identifiers

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3278949D1 (en) * 1981-10-07 1988-09-29 Hitachi Ltd Data transmission bus system for a plurality of processors
FR2549621B1 (fr) * 1983-07-19 1988-09-16 Telecommunications Sa Systeme multiprocesseur pour communication des processeurs entre eux
GB2175421B (en) * 1985-05-13 1989-11-29 Singer Link Miles Ltd Computing system
GB2203571B (en) * 1986-11-08 1990-07-25 Trident Trade And Management S Data bank update system
DE3714429A1 (de) * 1987-04-30 1988-11-17 Bergwerksverband Gmbh Multimikrocomputersystem fuer steueranlagen
GB2348974B (en) * 1999-04-09 2004-05-12 Pixelfusion Ltd Parallel data processing systems
US7627736B2 (en) 1999-04-09 2009-12-01 Clearspeed Technology Plc Thread manager to control an array of processing elements
US7506136B2 (en) 1999-04-09 2009-03-17 Clearspeed Technology Plc Parallel data processing apparatus

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3753234A (en) * 1972-02-25 1973-08-14 Reliance Electric Co Multicomputer system with simultaneous data interchange between computers
DE2546202A1 (de) * 1975-10-15 1977-04-28 Siemens Ag Rechnersystem aus mehreren miteinander verbundenen und zusammenwirkenden einzelrechnern und verfahren zum betrieb des rechnersystems
DE2641741C2 (de) * 1976-09-16 1986-01-16 Siemens AG, 1000 Berlin und 8000 München Rechenanlage aus mehreren miteinander über ein Sammelleitungssystem verbundenen und zusammenwirkenden Einzelrechnern und einem Steuerrechner

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7802079B2 (en) 1999-04-09 2010-09-21 Clearspeed Technology Limited Parallel data processing apparatus
US7925861B2 (en) 1999-04-09 2011-04-12 Rambus Inc. Plural SIMD arrays processing threads fetched in parallel and prioritized by thread manager sequentially transferring instructions to array controller for distribution
US7958332B2 (en) 1999-04-09 2011-06-07 Rambus Inc. Parallel data processing apparatus
US7966475B2 (en) 1999-04-09 2011-06-21 Rambus Inc. Parallel data processing apparatus
US8171263B2 (en) 1999-04-09 2012-05-01 Rambus Inc. Data processing apparatus comprising an array controller for separating an instruction stream processing instructions and data transfer instructions
US8169440B2 (en) 1999-04-09 2012-05-01 Rambus Inc. Parallel data processing apparatus
US8174530B2 (en) 1999-04-09 2012-05-08 Rambus Inc. Parallel date processing apparatus
US8762691B2 (en) 1999-04-09 2014-06-24 Rambus Inc. Memory access consolidation for SIMD processing elements using transaction identifiers

Also Published As

Publication number Publication date
DE3123382C2 (de) 1995-04-06
FI66995B (fi) 1984-08-31
HK5890A (en) 1990-02-02
GB2078407A (en) 1982-01-06
FI66995C (fi) 1984-12-10
FR2484669A1 (fr) 1981-12-18
FR2484669B1 (fr) 1988-04-15
BE889211A (fr) 1981-10-01
DE3123382A1 (de) 1982-08-19
FI801897A (fi) 1981-12-13

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Legal Events

Date Code Title Description
732 Registration of transactions, instruments or events in the register (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee

Effective date: 19960611