FI801897A - Foerfarande och anordning foer att oeverfoera data mellan processorer i ett flerprocessorsystem - Google Patents

Foerfarande och anordning foer att oeverfoera data mellan processorer i ett flerprocessorsystem

Info

Publication number
FI801897A
FI801897A FI801897A FI801897A FI801897A FI 801897 A FI801897 A FI 801897A FI 801897 A FI801897 A FI 801897A FI 801897 A FI801897 A FI 801897A FI 801897 A FI801897 A FI 801897A
Authority
FI
Finland
Prior art keywords
flerprocessorsystem
mellan
processor
angle connection
attachment data
Prior art date
Application number
FI801897A
Other languages
English (en)
Other versions
FI66995C (fi
FI66995B (fi
Inventor
Paavo Saeaeksjaervi
Original Assignee
Elevator Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Elevator Gmbh filed Critical Elevator Gmbh
Priority to FI801897A priority Critical patent/FI66995C/fi
Priority to GB8117915A priority patent/GB2078407B/en
Priority to DE19813123382 priority patent/DE3123382C2/de
Priority to FR8111671A priority patent/FR2484669B1/fr
Priority to BE0/205088A priority patent/BE889211A/fr
Publication of FI801897A publication Critical patent/FI801897A/fi
Application granted granted Critical
Publication of FI66995B publication Critical patent/FI66995B/fi
Publication of FI66995C publication Critical patent/FI66995C/fi
Priority to HK5890A priority patent/HK5890A/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Multi Processors (AREA)
FI801897A 1980-06-12 1980-06-12 Foerfarande och anordning foer att oeverfoera data mellanprocessorer i ett flerprocessorsystem FI66995C (fi)

Priority Applications (6)

Application Number Priority Date Filing Date Title
FI801897A FI66995C (fi) 1980-06-12 1980-06-12 Foerfarande och anordning foer att oeverfoera data mellanprocessorer i ett flerprocessorsystem
GB8117915A GB2078407B (en) 1980-06-12 1981-06-11 Procedure and apparatus for interprocessor data transfer in a multiprocessor system
DE19813123382 DE3123382C2 (de) 1980-06-12 1981-06-12 Verfahren und Einrichtung zum Übertragen von Daten in einem Mehrprozessorsystem
FR8111671A FR2484669B1 (fr) 1980-06-12 1981-06-12 Procede et appareil pour le transfert de donnees entre microprocesseurs dans un systeme multiprocesseur
BE0/205088A BE889211A (fr) 1980-06-12 1981-06-12 Procede et appareil de transfert de donnees entre les processeurs d'un systeme a processeurs multiples
HK5890A HK5890A (en) 1980-06-12 1990-01-25 Procedure and apparatus for inter processor data transfer in a multiprocessor system

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI801897 1980-06-12
FI801897A FI66995C (fi) 1980-06-12 1980-06-12 Foerfarande och anordning foer att oeverfoera data mellanprocessorer i ett flerprocessorsystem

Publications (3)

Publication Number Publication Date
FI801897A true FI801897A (fi) 1981-12-13
FI66995B FI66995B (fi) 1984-08-31
FI66995C FI66995C (fi) 1984-12-10

Family

ID=8513563

Family Applications (1)

Application Number Title Priority Date Filing Date
FI801897A FI66995C (fi) 1980-06-12 1980-06-12 Foerfarande och anordning foer att oeverfoera data mellanprocessorer i ett flerprocessorsystem

Country Status (6)

Country Link
BE (1) BE889211A (fi)
DE (1) DE3123382C2 (fi)
FI (1) FI66995C (fi)
FR (1) FR2484669B1 (fi)
GB (1) GB2078407B (fi)
HK (1) HK5890A (fi)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0076494B1 (en) * 1981-10-07 1988-08-24 Hitachi, Ltd. Data transmission bus system for a plurality of processors
FR2549621B1 (fr) * 1983-07-19 1988-09-16 Telecommunications Sa Systeme multiprocesseur pour communication des processeurs entre eux
GB2175421B (en) * 1985-05-13 1989-11-29 Singer Link Miles Ltd Computing system
GB2203571B (en) * 1986-11-08 1990-07-25 Trident Trade And Management S Data bank update system
DE3714429A1 (de) * 1987-04-30 1988-11-17 Bergwerksverband Gmbh Multimikrocomputersystem fuer steueranlagen
US7627736B2 (en) 1999-04-09 2009-12-01 Clearspeed Technology Plc Thread manager to control an array of processing elements
US7506136B2 (en) 1999-04-09 2009-03-17 Clearspeed Technology Plc Parallel data processing apparatus
US7526630B2 (en) 1999-04-09 2009-04-28 Clearspeed Technology, Plc Parallel data processing apparatus
AU3829500A (en) 1999-04-09 2000-11-14 Clearspeed Technology Limited Parallel data processing apparatus
US8169440B2 (en) 1999-04-09 2012-05-01 Rambus Inc. Parallel data processing apparatus
US8762691B2 (en) 1999-04-09 2014-06-24 Rambus Inc. Memory access consolidation for SIMD processing elements using transaction identifiers
GB2348974B (en) * 1999-04-09 2004-05-12 Pixelfusion Ltd Parallel data processing systems
US8171263B2 (en) 1999-04-09 2012-05-01 Rambus Inc. Data processing apparatus comprising an array controller for separating an instruction stream processing instructions and data transfer instructions
US7966475B2 (en) 1999-04-09 2011-06-21 Rambus Inc. Parallel data processing apparatus
US7802079B2 (en) 1999-04-09 2010-09-21 Clearspeed Technology Limited Parallel data processing apparatus
US8174530B2 (en) 1999-04-09 2012-05-08 Rambus Inc. Parallel date processing apparatus

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3753234A (en) * 1972-02-25 1973-08-14 Reliance Electric Co Multicomputer system with simultaneous data interchange between computers
DE2546202A1 (de) * 1975-10-15 1977-04-28 Siemens Ag Rechnersystem aus mehreren miteinander verbundenen und zusammenwirkenden einzelrechnern und verfahren zum betrieb des rechnersystems
DE2641741C2 (de) * 1976-09-16 1986-01-16 Siemens AG, 1000 Berlin und 8000 München Rechenanlage aus mehreren miteinander über ein Sammelleitungssystem verbundenen und zusammenwirkenden Einzelrechnern und einem Steuerrechner

Also Published As

Publication number Publication date
FI66995C (fi) 1984-12-10
GB2078407B (en) 1984-11-14
FR2484669B1 (fr) 1988-04-15
DE3123382A1 (de) 1982-08-19
GB2078407A (en) 1982-01-06
FR2484669A1 (fr) 1981-12-18
DE3123382C2 (de) 1995-04-06
BE889211A (fr) 1981-10-01
FI66995B (fi) 1984-08-31
HK5890A (en) 1990-02-02

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Legal Events

Date Code Title Description
MM Patent lapsed
MM Patent lapsed

Owner name: ELEVATOR GMBH.