HK5890A - Procedure and apparatus for inter processor data transfer in a multiprocessor system - Google Patents

Procedure and apparatus for inter processor data transfer in a multiprocessor system

Info

Publication number
HK5890A
HK5890A HK5890A HK5890A HK5890A HK 5890 A HK5890 A HK 5890A HK 5890 A HK5890 A HK 5890A HK 5890 A HK5890 A HK 5890A HK 5890 A HK5890 A HK 5890A
Authority
HK
Hong Kong
Prior art keywords
procedure
data transfer
multiprocessor system
processor data
inter processor
Prior art date
Application number
HK5890A
Inventor
Paavo Saaksjarvi
Original Assignee
Kone Elevator Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kone Elevator Gmbh filed Critical Kone Elevator Gmbh
Publication of HK5890A publication Critical patent/HK5890A/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Multi Processors (AREA)
HK5890A 1980-06-12 1990-01-25 Procedure and apparatus for inter processor data transfer in a multiprocessor system HK5890A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FI801897A FI66995C (en) 1980-06-12 1980-06-12 OVER ANGLE CONNECTION FOR ATTACHMENT DATA MELLANPROCESSORER I ETT FLERPROCESSORSYSTEM

Publications (1)

Publication Number Publication Date
HK5890A true HK5890A (en) 1990-02-02

Family

ID=8513563

Family Applications (1)

Application Number Title Priority Date Filing Date
HK5890A HK5890A (en) 1980-06-12 1990-01-25 Procedure and apparatus for inter processor data transfer in a multiprocessor system

Country Status (6)

Country Link
BE (1) BE889211A (en)
DE (1) DE3123382C2 (en)
FI (1) FI66995C (en)
FR (1) FR2484669B1 (en)
GB (1) GB2078407B (en)
HK (1) HK5890A (en)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0076494B1 (en) * 1981-10-07 1988-08-24 Hitachi, Ltd. Data transmission bus system for a plurality of processors
FR2549621B1 (en) * 1983-07-19 1988-09-16 Telecommunications Sa MULTIPROCESSOR SYSTEM FOR COMMUNICATION OF PROCESSORS BETWEEN THEM
GB2175421B (en) * 1985-05-13 1989-11-29 Singer Link Miles Ltd Computing system
GB2203571B (en) * 1986-11-08 1990-07-25 Trident Trade And Management S Data bank update system
DE3714429A1 (en) * 1987-04-30 1988-11-17 Bergwerksverband Gmbh Multiple microcomputer system for control systems
US8169440B2 (en) 1999-04-09 2012-05-01 Rambus Inc. Parallel data processing apparatus
US8171263B2 (en) 1999-04-09 2012-05-01 Rambus Inc. Data processing apparatus comprising an array controller for separating an instruction stream processing instructions and data transfer instructions
US7526630B2 (en) 1999-04-09 2009-04-28 Clearspeed Technology, Plc Parallel data processing apparatus
US7802079B2 (en) 1999-04-09 2010-09-21 Clearspeed Technology Limited Parallel data processing apparatus
AU3829500A (en) 1999-04-09 2000-11-14 Clearspeed Technology Limited Parallel data processing apparatus
US7627736B2 (en) 1999-04-09 2009-12-01 Clearspeed Technology Plc Thread manager to control an array of processing elements
US7966475B2 (en) 1999-04-09 2011-06-21 Rambus Inc. Parallel data processing apparatus
US8762691B2 (en) 1999-04-09 2014-06-24 Rambus Inc. Memory access consolidation for SIMD processing elements using transaction identifiers
GB2348974B (en) * 1999-04-09 2004-05-12 Pixelfusion Ltd Parallel data processing systems
US7506136B2 (en) 1999-04-09 2009-03-17 Clearspeed Technology Plc Parallel data processing apparatus
US8174530B2 (en) 1999-04-09 2012-05-08 Rambus Inc. Parallel date processing apparatus

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3753234A (en) * 1972-02-25 1973-08-14 Reliance Electric Co Multicomputer system with simultaneous data interchange between computers
DE2546202A1 (en) * 1975-10-15 1977-04-28 Siemens Ag COMPUTER SYSTEM OF SEVERAL INTERCONNECTED AND INTERACTING INDIVIDUAL COMPUTERS AND PROCEDURES FOR OPERATING THE COMPUTER SYSTEM
DE2641741C2 (en) * 1976-09-16 1986-01-16 Siemens AG, 1000 Berlin und 8000 München Computing system made up of several individual computers connected and interacting with one another via a manifold system and a control computer

Also Published As

Publication number Publication date
FI801897A (en) 1981-12-13
FI66995C (en) 1984-12-10
FR2484669A1 (en) 1981-12-18
BE889211A (en) 1981-10-01
GB2078407B (en) 1984-11-14
FR2484669B1 (en) 1988-04-15
DE3123382C2 (en) 1995-04-06
FI66995B (en) 1984-08-31
DE3123382A1 (en) 1982-08-19
GB2078407A (en) 1982-01-06

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Legal Events

Date Code Title Description
NR Patent deemed never to have been added to the register under section 13(7) of patents (transitional arrangements) rules