GB2065368A

GB2065368A - Thin film transistors

Info

Publication number: GB2065368A
Application number: GB8035859A
Authority: GB
Original assignee: Japan Electronic Industry Development Association; Sharp Corp
Current assignee: Japan Electronic Industry Development Association; Sharp Corp
Priority date: 1979-11-09
Filing date: 1980-11-07
Publication date: 1981-06-24
Also published as: JPS5669864A; DE3042021A1; GB2065368B

Abstract

A thin-film transistor comprises a gate electrode, a source electrode, a drain electrode, an insulating layer formed on the gate electrode and a semiconductor layer overlying the insulating layer and having different portions contacting the source and drain electrodes. The gate electrode and the semiconductor layer are respectively made of tantalum and tellurium. The insulating layer is formed by subjecting the gate electrode, made of tantalum, to an anodization process.

Description

SPECIFICATION Thin film transistors The present invention generally relates to a thin-film transistor (TFT) and, more particularly, to a thin-film transistor which can be used in a liquid crystal display panel for driving a respective one of the picture elements forming the display panel.

In 1972, Westinghouse Research Laboratories of U.S.A. introduced a matrix-type liquid crystal display panel in which a transistor and a parasitic capacitor were used with thin-film technology for each of the picture elements. While the details of the matrix type liquid crystals display panel are discussed in "A 6 x 6 Inch 20 Lines-per-lnch Liquid-Crystal Display Panel" by T.P. Brody, J.A. Asars and G.D. Dixon, which appeared in IEEE TRANSACTIONS ON ELECTRON DEVICES, Vol. ED-20, No. 11, November 1973, pp. 995-1001, and "Operational Characteristics of a 6" X 6", TFT Matrix Array, Liquid Crystal Display" by T.P. Brody, F.C. Luo, D.H. Davies and E.W.Greeneich, which appeared in a symposium of SID 1974 Session held on May 23, 1974, its structure and operating principle will briefly be described with reference to Figs. 1 to 3 of the accompanying drawings to facilitate better understanding of the present invention.

Fig. 1 illustrates a cross sectional view of the matrix type liquid crystal display panel using conventional thin-film transistors. The display panel shown therein comprises a thin-film transistor array substrate 10, which is constituted by thin-film transistors 11, capacitors 12 and a common electrode 13 all deposited on a glass support 14 by a known evaporation method and aligned in the X-Y coordinates with X and Y leads for each of the picture elements, and a counter substrate 15 which is constituted by an entirely transparent conductive film 16 common to all of the picture elements deposited on another glass support 17. Both of the substrates 10 and 15 are subjected to a TN (twisted nematic) alignment process by means of an oblique evaporation or rubbing after transparent insulating layers 18 and 19 of SiO or SiO2 have been deposited thereon.In addition, the substrates 10 and 15 are bonded together with a sealing member 20 positioned therebetween, and a proper liquid crystal material such as TN-FEM (twisted nematic field effect mode) liquid crystal or guest host effect liquid crystal is injected into a space between the substrates 10 and 15. thereby completing the fabrication of a matrix type liquid crystal display panel using TFTs. In use, the display panel so constructed is sandwiched between a pair of polarizing plates 21 and 22, the polarizing plate 21 being in turn backed up by a reflective plate 23.

Each of the thin-film transistors 11 has a gate electrode 24 made of aluminium, a source electrode 25 and a drain electrode 26. In Fig. 1, reference numerals 27 represents an electrode of the capacitor 12, reference numeral 28 represents a gate insulating film of the TFT and a dielectric film of the capacitor 12, and reference numeral 29 represents a semiconductor layer.

In Fig. 2, there is shown an electric equivalent circuit of the display panel of the construction described above, it being, however, to be understood that the display panel shown in the form of the electric equivalent circuit has four picture elements 30. As shown in Fig. 2, the four picture elements 30 are aligned in an X-Y matrix to provide a visual matrix display through a proper wiring system including gate lines G1, G2 and G3 as rows and source lines S1 and S2 as columns. At each intersecting point of these gate and source lines, the respective transistor 11 is disposed with its gate and source electrodes respectively connected to the adjacent gate and source lines, the drain electrode of which is connected to the next adjacent gate line through the corresponding capacitor 12 and also to the ground through the corresponding picture element 30.

The liquid crystal display panel so far described is so designed as to be driven by gate signal VG and source signal V5 fed respectively through the gate lines G1 to G3 and the source lines S1 and S2 in timed relation to each other, the respective waveforms of the gate and source signals VG and V5 being shown by (a) and (b) in Fig. 3. If these gate and source signals VG AND V5 of the waveforms (a) and (b) in Fig. 3 are applied to the transistors 11, the voltages respectively charged on the capacitors 12 and the picture elements 30 vary in respective manners as shown by (c) and (d) in Fig. 3 to implement a visual display of a picture information.

In the liquid crystal display panel so far discussed, the gate insulating layer 28 is required to have a thickness within the range of 5008. to 1 ,000# in order for the corresponding transistor 11 to operate satisfactorily. However, as is well known to those skilled in the art, the gate insulating layer 28 is susceptible to dielectric breakdown if flaws such as pinholes are formed therein during the manufacture thereof, thereby reducing the reliability thereof. The smaller the thickness the gate insulating layer 28 has, the more susceptible it is.

The present invention has been developed with a view to substantially eliminating the above described problem inherent in the prior art thin-film transistor employed in liquid crystal display panels. The essential object of the invention is to provide an improved thin-film transistor which is reliable in performance and which can be manufactured with relatively high reproducibility.

This and other objects of the present invention can be accomplished by suitably selecting a material for each of the gate electrode and gate insulating layer of the thin-film transistor and, concurrently, by employing an anodization technique to form the gate insulating layer on the gate electrode.

Accordingly, the present invention provides a thin-film transistor comprising a gate electrode, a source electrode, a drain electrode, an insulating layer formed on the gate electrode and a semiconductor layer overlying the insulating layer and having different portions contacting the source and drain electrodes, respectively, the gate electrode and the semiconductor layer being made of tantalum and tellurium, respectively, and the insulating layer being formed by subjecting the gate electrode to an anodization process.

The present invention will be further described in a preferred embodiment thereof with reference to the accompanying drawings, in which: Figure 1 is a cross sectional view of the prior art matrix type liquid crystal display unit using thin-film transistors to which the present invention is applicable; Figure 2 is a circuit diagram showing an equivalent circuit of the liquid crystal display unit shown in Fig. 1; Figure 3 is a timing diagram for the illustration of the operation of the circuit of Fig. 2; Figures 4 to 9 are schematic cross sectional views of different types of conventional thin-film transistors; Figure 10 is a schematic diagram showing a method of anodization employed in the present invention to form a gate insulating layer; Figure 11 is a chart showing the change in each of the voltage and current employed during the anodization process;; Figure 12 is a diagram showing, in timed relation, the waveforms of the drive voltages to be applied to the source and gate electrodes of the thin-film transistor employing a p-type semiconductor layer; Figure 13 is a diagram showing, in timed relation, the waveforms of drive voltages to be applied to the source and gate electrodes of the thin-film transistor employing a n-type semiconductor layer; Figure 14 is a chart showing how the ratio of the film thickness relative to the anodizing voltage varies with the change in specific dielectric constant; and Figure 15 is a graph showing the reliability of the thin-film transistor according to the present invention.

In the following description of the present invention like parts are designated by like reference numerals, except for Figs. 1 to 3.

Figs. 4 to 9 illustrate different types ola conventional thin-film transistors. Referring first to Fig.

1, the thin4ilm transistor shown therein comprises an electrically insulative substrate 31 of glass having one planar surface formed with a control gate electrode 32 usually made of Al, Au, Ta or In and formed thereon by the use of either a metal evaporation technique using a patterned mask or a photolithographic technique, a gate insulating layer 33 of Awl203, SiO, SiO2, Cay2, or Si3N4 overlaying the gate electrode 32 and deposited thereon by the use of a vacuum evaporation technique, a sputtering technique or a chemical vapour deposition technique, a semiconductor layer 34 usually of CdSe, CdS or Te deposited on the top of the gate insulating layer 33 by the use of a vacuum evaporation technique or a sputtering technique, and source nd drain electrodes 35 and 36 deposited on the assembly in electrically insulated relation to each other and usually made of such a material, for example, Au or Ni, as capable of exhibiting an ohmic contact with the semiconductor layer 34.

The thin-film transistor shown in Fig. 5 corresponds to that shown in Fig. 4, but the source and drain electrodes 35 and 36 and the semiconductor layer 34 are reversed in position to each other.

In the thin-film transistor shown in Fig. 6, the semiconductor layer 34 and the source and drain electrodes 35 and 36 are placed on the substrate 31 while the gate electrode 32 is placed on the top of the semiconductor layer 34 through the intervention of the gate insulating layer 33.

The thin-film transistor shown in Fig. 7 corresponds to that shown in Fig. 6, but the source and drain electrodes 35 and 36 and the semiconductor layer 34 are reversed in position to each other.

The thin-film transistor shown in Fig. 8 corresponds to that shown in Fig. 5, but the source and drain electrodes 35 and 36 are made to contact the semiconductor layer 34 on the substrate 31. The thinfilm transistor shown in Fig. 9 corresponds to that shown in Fig. 8, but the source and drain electrodes 35 and 36 and the semiconductor layer 34 are reversed in position to each other.

All of the thin-film transistors shown in Figs. 4 to 9, respectively, are well known to those skilled in the art and, therefore, the details of each of them are omitted for the sake of brevity.

However, it is to be noted that the concept of the present invention is applicable to all of the thin-film transistors shown in Figs. 4 to 9, except for the constructions shown in Figs. 6 and 7.

According to existing thin-film transitor technology, two methods are employed to form the gate insulating layer 33. One of these methods is to employ a metal such as Al to Ta as a material for the gate electrode 32 and then to subject the gate electrode 32 to an anodization process, i.e., to anodize the gate electrode 32, to form the gate insulating layer 33. The alternative method is to deposit an insulating material such as SiO, SiO2, Al203 or Si3N4 on themetallic gate electrode 32 by the utilization of a chemical vapour deposition technique, a vacuum deposition technique or a sputtering technique, thereby forming the gate insulating layer 33.

However, where the gate insulating layer 33 is to be formed by the use of the anodization technique, the construction of the thin-film transistor to which the anodization process is applicable is limited to that shown in each of Figs. 4, 5, 8 and 9.

In accordance with the present invention Ta and Te are chosen as the materials for the gate electrode 32 and the semi-conductor layer 34, respectively, and nickel (Ni) is chosen as the material for each of the source and drain electrodes 35 and 36. The gate insulating layer 33 is formed by anodizing the gate tantalum gate electrode 32.

Hereinafter, the reason for the employment of the anodization technique to form the gate insulating layer 33 on the gate electrode 32 while the above desrcibed specific materials are chosen for the gate electrode 32 and the source and drain electrodes 35 and 36 will be described.

First, the anodization process will be discussed. The anodization is known as a method of forming a coating of metal oxide or metal hydroxide by the electrochemical oxidation of a metal anode in an electrolyte. There is a well known a wet method of anodization wherein the anodization is carried out in a bath containing a solution of ammonium borate, sodium borate or ammonium tartrate dissolved in a solvent, such as water or ethylene glycol, in an amount of 1 to 10% by weight relative to the total weight of the solution. A dry method is also known wherein the anodization is carried out in an atmosphere containing 02 plasma.

Referring to Fig. 10, which schematically illustrates an electrolyte bath used in the practice of the wet anodization process, a carrier substrate 37 having an electrode (anode) 38 formed thereon which is to be anodized is immersed in the electrolyte solution 39. This electrode 38 is electrically connected to a positive terminal of a D.C. electric power source 40 while a counter electrode (cathode) 41 also immersed in the electrolyte solution 39 and spaced a certain distance from the electrode 38 to be anodized is electrically connected to a negative terminal of the D.C. power source 40. In carrying out the anodization process, a constant current of 0.2mA/cm2 is first supplied is first supplied with the result that reduction occurs at the anode electrode 38, causing an oxide film to grow on the surface of the anode electrode 38 facing the cathode electrode 41.As the thickness of the oxide film increases, so does its resistance.

More specifically, referring to Fig. 11, the anodization is carried out at constant current density of 0.2mA/cm2 until the anodization voltage V reaches a predetermined value V1, and then continued at this voltage Va until the anodization current I has decreased exponentially to a small fraction of its initial value. At the time the anodization current I has decreased to a small fraction, e.g., some #A/cm2, of its initial value, the anodization is complete, leaving the oxide film on the anode electrode 38 in the form of an insulating layer 42.

In the formation of the insulating layer, the above described anodization process seldom brings about the formation of pinholes in the insulating layer as compared with the formation of the insulating layer by the utilization of a vapour deposition technique, sputtering technique or chemical vapour deposition technique. Therefore, the anodization process is best suited for use in the formation of an insulating layer of relatively small film thickness, that is, within the range of sooA to 1,000 .

The oxide film or insulating layer 42 so formed by the anodization process has a polarity because of the nature of the anodization process. In general, it is well known that the oxide film or insulating layer exhibits better electric insulation when a positive voltage is applied to the metallic electrode which has been subjected to the anodization than when a negative voltage is applied to the same metallic electrode. We have also found that the oxide film or insulating layer formed by the utilization of the anodization process, when subjected to a positive voltage, exhibited a dielectric strength and a leak current which are twice and 1/10, respectively, of that when subjected to a negative voltage.

British Patent Application No. 2,016,780A discloses the waveforms of drive voltages necessary to drive the liquid crystal display panel using the thin-film transistors. According to this specification, it is suggested that, where the semiconductor layer 34 is made of a p-type semiconductor material such as Te, the drive voltages of respective waveforms shown by (a) and (b) in Fig. 12 are applied to the source electrode 35 and the gate electrode 32 of one or more thin-film transistors forming the liquid crystal display panel to effect a visual reproduction of picture information.However, where the semiconductor layer 34 is made of an n-type semiconductor material such as CdSe or CdS, the drive voltages of the respective waveforms shown by (a) and (b) in Fig. 13, which are reversed in polarity to that shown by (a) and (b) in Fig. 12, should be applied to the source and gate electrodes 35 and 32, respectively.

When the drive voltages of the waveforms shown by (a) and (b) in Fig. 12 are respectively applied to the source and gate electrodes 35 and 32 of a thin-film transistor wherein the semiconductor layer 34 is made of p-type semiconductor material, the rates at which the gate potential becomes positive, zero and negative relative to the source potential are shown in Table 1 below when the number of scanned lines of the matrix cell is n in the line-at-a-time operation wherein n is an integer.

On the other hand, when the drive voltages of the waveforms shown by (a) and (b) in Fig. 13 are respectively applied to the source and gate electrodes 35 and 32 of a thin-film transistor wherein the semiconductor layer 34 is made of n-type semiconductor material, the gate potential becomes positive, zero and negative relative to the source potential at the rates shown in Table 2.

TABLE 1 Potential Rate 1/2(1 - 1/n) 1/2 -V 1/2n TABLE 2 Potential Rate +V 1/2n jO 1/2 - V 1/2 (1 - 1/n) It will be readily be seen from a comparison of Tables 1 and 2 that, when p-type semiconductor material is used for the semiconductor layer 34, the rate at which the gate potential becomes positive relative to the source potential is greater than when n-type semiconductor material is used for the same semiconductor layer 34.However, in view of the fact that the better electric insulating characrteristic can be obtained when a positive voltage is applied to the metallic electrode to which anodization has been effected than when a negative voltage is applied to the same metallic electrode as hereinbefore discussed, the use of p-type semiconductor material such as Te is prepared preferred as a material for the semiconductor layer 34.

Popular materials which can be anodized include Al, Ta and Ti. Other than these materials, Nb, Hf, Bi, Zr, V, Y and Si are also known as metals which can be anodized. Fig. 14 illustrates a graph showing the relationship between the dielectric constant E of each of the oxide films, formed by anodizing each of the above listed materials, and the ratio of the film thickness of the ,#nodization voltage used.

In order to manufacture thin-film transistors having excellent performance characteristics, it is feasible to form an oxide film having a relatively large dielectric constant e for a given anodization voltage used during the anodization process. In this respect, the use of any one of Ti, Nb and Ta as a material for the gate electrode results in the formation of oxide films of TiO2, Nub205 or Ta205 when anodized, which oxide film has, as best shown in the chart of Fig. 14, a relatively large dielectric constant and a relatively small ratio of the film thickness to the anodization voltage used. With regard to Fig. 14 the use of Ti, Nb or Ta is considered appropriate and feasible as a material for the gate electrode 32. However, for reasons which will become clear from the subsequent description, the present invention makes use of Ta as the material for the gate electrode 32.

For the purpose of testing, the inventors of the present invention prepared four sample thinfilm transistors using the materials as listed in Table 3 for the semiconductor layer 34, the source and drain electrodes 35 and 36 and the gate electrode 32.

Table 3 Materials Semiconductor Source Sample No. Layer 34 Drain 35 and 36 Gate 32 Te Ni Ti II Te Ni Nb Ill Te Ni Ta IV Te Ni Al Of these four samples, samples ll, Ill and IV were successfully prepared and were submitted to tests to check whether or not they would work satisfactorily at elevated temperature. The results of the tests are shown in the graph of Fig. 15 which illustrate the occurrence of dielectric breakdown of the oxide film or insulating layer 33 in each of the sample transistors.

With regard to sample I, it was found that, during the anodization process to form the oxide layer (TiO2) on the gate electrode, the anodization voltage did not increase with an increment of more than 10 volts, resulting in the formation of an oxide film of 200 in thickness which lacked sufficient dielectric strength. Accordingly, the preparation of the sample I was not successful.

In any event, as can readily be understood from the graph of Fig. 15, where Al or Nb is chosen as the material for the gate electrode 32, the rate of yield decreases with time. On the contrary where Ta is chosen as the material for the gate electrode 32, a substantially 100% yield can be obtained.

It is generally recognized that the drain voltage VD and the drain current 1D of thin-film transistors have the following relationship.

wherein Vg represents the gate voltage, Tox represents the thickness of the insulating layer 33, rio represents the dielectric constant in a vacuum, E1 represents the specific dielectric constant of the insulating layer 33, y represents the mobility of the semiconductor layer 34, w represents the channel width in the thin-film transistor, L represents the channel length in the thin-film transistor, and VD represents the pinchoff voltage.

While Awl205, NB2Os and Ta2O5 in the respective samples IV, II and III were prepared by the application of the same anodization voltage during the anodization process, Al205 exhibited a specific dielectric constant '1 of 9 and Ta205 exhibited a specific dielectric constant '1 of 27 which is three times the specific dielectric constant of Al2O5.

Accordingly, as can be understood from the above equation, it is clear that the gate voltage to be applied to the thin-film transistor wherein Ta205 is used as a material for the insulating layer 33 is one third of that required for the thin-film transistor wherein Al205 is used as a material for the insulating layer 33, in order to obtain the same VD-ID characteristics. In other words, thinfilm transistors in which the insulating layer 33 is made of Ta205 can be driven at a lower gate voltage than that required to drive thin-film transistors in which the insulating layer 33 is made of AI2O5. This in turn shows that the application of the reduced gate voltage is advantageous in avoiding any possible dielectric breakdown of the insulating layer 33.

From the foregoing, it has now become clear that the reliability of thin-film transistors increases if Ta and Te are employed as the respective materials for the gate electrode 32 and the semiconductor layer 34 while the insulating layer 33 is made of Ta205 formed by anodization of the surface of the material of the gate electrode 32.

Although the present invention has fully been described in connection with the preferred embodiments thereof with reference to the accompanying drawings, it is to be noted that various changes and modifications are apparent to those skilled in the art. By way of example, although the source and drain electrodes 35 and 36 have been described as made of Ni, any one of Au, Co, In or In203 may be employed as material for both of the electrodes 35 and 36.

In addition, the thin-film transistors of the present invention may be used not only in liquid crystal display panel, but also in other devices, such as electrochromic display devices.

Claims

1. A thin-film transistor comprising a gate electrode, a source electrode, a drain electrode, an insulating layer formed on the gate electrode and a semiconductor layer overlying the insulating layer and having different portions contacting the source and drain electrodes, respectively, the gate electrode and the semiconductor layer being made of tantalum and tellurium respectively, and the insulating layer being formed by subjecting the gate electrode to an anodization process.

2. A thin-film transistor as claimed in claim 1 wherein the source and drain electrodes are each made of nickel.

3. A thin-film transistor as claimed in claim 1 wherein the source and drain electrodes are each made of gold.

4. A thin-film transistor as claimed in claim 1 wherein the source and drain electrodes are each made of cobalt.

5. A thin-film transistor as claimed in claim 1 wherein the source and drain electrodes are each made of indium.

6. A thin-film transistor as claimed in any one of the preceding claims wherein the insulating layer is made of Ta205 formed by subjecting the surface of the material of the gate electrode to anodization.

7. A thin-film transistor as claimed in claim 1 substantially as hereinbefore described.

8. A device which includes therein a thin-film transistor as claimed in any one of the preceding claims.

9. A device as claimed in claim 8 which is a liquid crystal display panel.