GB2062962A - Production of insulating layers - Google Patents
Production of insulating layers Download PDFInfo
- Publication number
- GB2062962A GB2062962A GB8035287A GB8035287A GB2062962A GB 2062962 A GB2062962 A GB 2062962A GB 8035287 A GB8035287 A GB 8035287A GB 8035287 A GB8035287 A GB 8035287A GB 2062962 A GB2062962 A GB 2062962A
- Authority
- GB
- United Kingdom
- Prior art keywords
- layer
- solution
- semiconductor body
- insulating layer
- approximately
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000004519 manufacturing process Methods 0.000 title description 10
- 239000004065 semiconductor Substances 0.000 claims abstract description 44
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 24
- OKKJLVBELUTLKV-UHFFFAOYSA-N Methanol Chemical compound OC OKKJLVBELUTLKV-UHFFFAOYSA-N 0.000 claims abstract description 18
- 238000009792 diffusion process Methods 0.000 claims abstract description 12
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 12
- 235000012239 silicon dioxide Nutrition 0.000 claims abstract description 11
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 claims abstract description 5
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 claims abstract description 4
- 229910017604 nitric acid Inorganic materials 0.000 claims abstract description 4
- 238000000034 method Methods 0.000 claims description 24
- 238000005496 tempering Methods 0.000 claims description 8
- 229910021419 crystalline silicon Inorganic materials 0.000 claims 1
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 230000000873 masking effect Effects 0.000 description 7
- 238000005530 etching Methods 0.000 description 6
- FGIUAXJPYTZDNR-UHFFFAOYSA-N potassium nitrate Chemical compound [K+].[O-][N+]([O-])=O FGIUAXJPYTZDNR-UHFFFAOYSA-N 0.000 description 4
- 239000000463 material Substances 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 235000010333 potassium nitrate Nutrition 0.000 description 2
- 239000004323 potassium nitrate Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- 230000003746 surface roughness Effects 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- RMAQACBXLXPBSY-UHFFFAOYSA-N silicic acid Chemical class O[Si](O)(O)O RMAQACBXLXPBSY-UHFFFAOYSA-N 0.000 description 1
- 239000007858 starting material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Photovoltaic Devices (AREA)
- Formation Of Insulating Films (AREA)
Abstract
An undoped insulating layer (2) is produced on a semiconductor body (1) by applying a solution to a rotating semiconductor body (1). The solution may comprises tetraethoxysilane, methanol and nitric acid to produce a layer of silicon dioxide on the body. The layer (2) may overlap onto the edges of the body (1) so that it can be used as a diffusion mask for the formation of a doped layer (4). The insulating layer may be removed before applying contacts to form a solar cell. <IMAGE>
Description
SPECIFICATION
Method of producing an insulating layer
The invention relates to a method of producing an insulating layer covering a semiconductor body on one side.
When manufacturing pn-junction which cover large areas in semiconductor bodies, as required for rectifiers and solar cells, a largely automated manufacture with as few as possible manufacturing steps is aimed for. In the past, in order to produce solar cells it was usual to proceed so that, in the first instance, impurities were diffused into a semiconductor disc or chip on all sides while forming a injunction lying close to the surface of the semiconductor. The usually highly doped diffusion layer has to be removed again by means of etching on the rear face of the solar cells. In order to achieve this, the front of the semiconductor disc or chip has to be covered in a mask which is resistant to the etching solution.After etching away the diffused region on the rear of the semiconductor body, the covering mask on the front face of the solar cells has to be removed in a further expensive operation. Only thereafter can the solar cell be provided with the required connecting contacts.
Alternatively a solar cell may also by manufactured with the aid of known planner technology.
Here the doping materials producing the injunction are diffused into the semiconductor body from one surface only. However, this means that the remaining parts of the semiconductor body, more particularly the rear face, have to be covered by a diffusion masking layer. The diffusion masking layer in silicon semiconductor discs or chips comprises a thermally produced silicon dioxide layer. For its manufacture the semiconductor disc or chip is covered in the first instance on all sides with the thermally produced oxide. Then this oxide layer has to be removed again from the front face of the semiconductor disc or chip.
It is necessary therefore to cover the regions of the oxide layer which are not to be removed with an etching mask. After the oxide has been etched away from the front face of the solar cells, in another operation, the etching mask, which covers the oxide layer in the remaining areas, has to be removed again.
The number of operation is the same in both methods which have been described and these are almost as expensive as each other.
The invention seeks to provide a method of manufacturing an insulating layer in which some previously necessary operation may be eliminated and which method allows manufacture to be automated.
According to the invention, there is provided a method of producing an insulating layer covering on one side of a semiconductor body wherein the semiconductor body is rotated and the insulating layer is centrifugally applied to the rotating semiconductor body from an undoped solution.
Preferably the insulating layer is tempered after application.
The solution is selected preferably so that, after centrifugal application and tempering on the semiconductor surface, pure undoped silicon dioxide remains on the semiconductor surface. In particular, it should be pointed out that the insulating layer manufactured in accordance with the invention is not designed to serve as a diffusion source and therefore has to be undoped.
The advantage of the above method lies in the fact that an insulating layer may be applied to the semiconductor disc or chip on one side and diffusion of the pn ju nction may follow on immediately from this operation. Intermediate etching and masking step are thus eliminated.
The thickness of the oxide layer may be determined by the composition of the solution and the rotary speed. A tempering process may follow on after application of the layer and this will also result in concentration of the layer and therefore a reduction in the layer thickness. With semiconductor discs or chips having a relatively high surface roughness it is recommended to centrifugally apply two or more layers successively on to the semiconductor disc or chip, a tempering step then following on in each case after application of a layer. The solution, which is used to produce the so-called silica film, may comprise tetraethoxysilane, methanol and 0.1 molar saltpetre acid for example. Another solution may comprise orthoethyl silicic acid esters, methanol and molar saltpetre for example.
The invention will now be described in greater detail, by way of example, with reference to the drawings, in which:
Figure 1 is a perspective view of a semiconductor body prior to the application of an insulating layer;
Figure 2 is a perspective view of a semiconductor body after the temperature of an insulating layer in accordance with the invention and,
Figure 3 shows a solar cell structure produced from the semiconducotr body of Figure 2.
In Figure 1 a semiconductor disc or chip 1 is shown similar to that required as starting material for manufacturing solar cells. This usually rectangular semiconductor chip either comprises a monocrystalline silicon or a non-monocrystalline material made from the material known as silso, for example, which is available commercially. This semiconductor chip, the edge length or which is 5 to 12 cm for example, is retained on the rotor of a centrifugal device suction.
A small amount of solution is then applied to the rotating semiconductor chip. The semiconductor chip rotates for example, at a speed of approximately 5,000 R/min. The solution comprises 1 part by volume of tetraethoxysilane, 1 part by volume of methanol and 0.44 parts by volume of 0.1 molar nitric acid. The excess solution is centrifuged away by the rotary motion of the semiconductor disc or chip and when, after approximately 15 seconds, the centrifuging process is terminated, a thin silicon dioxide layer 2 remains on the semiconductor chip in accordance with Figure 2 and has already been compacted by the centrifugal force applied to it. As is apparent from Figure 2, the silicon dioxide layer overlaps the surface of the semiconductor disc or chip at the edges, thus ensuring that the region in which diffusion is to take place does not extend to the rear face of the solar cells.
The silicon dioxide layer which has been applied by centrifuging has a thickness of approximately 0.2 to 0.3 calm. If solar cells are produced from semiconductor discs of chips, then the surface roughness is relatively high. It extends to a depth of up to 10 um.
Because of this very rough surface of the silicon discs or chips, there is the danger that a silicon dioxide layer applied in one layer will be thin locally and lose its masking ability in some areas. For this reason it may be advantageous to produce two silicon dioxide layers, one on top of the other by centrifugal application.
In this case, tempering takes place after the first layer has been applied centrifugally.
The temperature is at approximately 600 to 7000C and acts on this centrifuged oxide layer for approximately 15 minutes. Even after manufacture of the second oxide layer tempering is advantageous. If the semiconductor disc or chip is subjected to a diffusion process, however, following manfactureofthe oxide layer, then the second tempering process is
provided automatically by the diffusion temperatures. During the manufacture of several oxide
layers one on top of another, it is advantageous if,
after each layer is produced, the rotary direction of the rotor, to which the semiconductor disc or chip is
fixed, is reversed. In this case, particularly uniform
layers are produced.
In accordance with Figure 2, a thin surface region 4
is diffused into the semiconductor chip 1 using the
oxide layer 2 as a masking layer and the surface
region has the opposite type of conductivity to the
semiconductor base element. The injunction thus
formed separates the two regions 4 and 5. The
inward diffusion of the injunction takes place
conventionally in an open pipe system, a 0.5 um thick n-doped layer being diffused into the p-doped
base element using phosphorus impurity atoms. The
diffusion masking layer 2 is then removed again in a
suitable solvent.
In accordance with Figure 3, the rear face contact 6
comprising aluminium for example, may be
arranged on the rear face of the solar cell which was
previously covered by the masking layer 2. A
comb-like contact structure is arranged on the front
face of the solar cells. It comprises narrow webs 7b
which lead to a busbar 7a perpendicularthereto.
Thus busbar 7a is broadened out at its centre region
for example into a contact connecting region 8
having a larger area. The whole of the front face of
the solar cell is covered preferably with a reflection
reducing layer. This reflection-reducing layer may
also comprise silicon dioxide and be produced by
centrifugal application. The layer thickness should
be selected so that the minimum reflection occurs at
approximately 600 nm. The reflection-reducing layer
9 is therefore only 0.065 Rm thick, for example. This
relatively small layer thickness is obtained by a high
centrifuge speed when applying the solvent.
Claims (15)
1. A method of producing an insualting layer
covering on one side of semiconductor body, wherein the semiconductor body is rotated and the insulating layer is centrifugally applied to the rotating semiconductor body from an undoped solution.
2. A method as claimed in Claim 1, wherein the insulating layer is tempered after application.
3. A method as claimed in Claim 1 or 2, wherein a solution is used in which pure undoped silicon dioxide remains on the surface of the semiconductor after having been centrifugally applied and tempered.
4. A method as claimed in Claim 1,2 or 3, wherein the thickness of the oxide layer is determined by the composition of the solution and the rotary speed selected for centrifugal application.
5. A method as claimed in any one of Claims 1 to 4, wherein two or more layers are centrifugally applied one after the other, to the surface of said semiconductor body from a solution, the first layer being solidified by tempering before a second layer is applied.
6. A method as claimed in Claim 2 or any claim appendent directly or indirectly thereto, wherein tempering is carried out at approximately 600 to 7000C for approximately 15 min.
7. A method as claimed in any one of claims 1 to 6, wherein the undoped solution comprises tetraethoxysilane, methanol and 0.1 molar nitric acid.
8. A method as claimed in Claim 7, wherein the solution comprises 1 part by volume tetraethoxysilane 1 part by volume methanol and about 0.4 parts of volume of 0.1 molar nitric acid.
9. A method as claimed in any one of Claims 1 to 8 wherein, the solution is deposited and centrifugally applied at approximately 5000 R/min for approximately 15 seconds to form a layer of silicon dioxide which is approximately 0.2 to 0.3 um thick.
10. A method as claimed in Claim 5 or any claim appendent directly or indirectly thereto, wherein the direction of rotation of the semiconductor body is changed from one layer to the next when several layers are to be centrifugally applied on top of each other.
11. A method as claimed in any one of claims 1 to 10, wherein the resulting product comprises a solar cell.
12. A method as claimed in any one of Claims 1 to 11, wherein said semiconductor body comprises
monocrystaliine or non-crystalline silicon.
13. A method as claimed in any one of Claims 1 to 12, wherein the insulating layer comprises a
diffusion mask for diffusing a larger-area injunction of a solar cell.
14. A method as claimed in any one of claims 1 to 12, wherein the insulating layer comprises a
reflection-reducing layer on the surface of a solar cell for receiving incident light.
15. A method of producing an insulating layer on
one side of a semiconductor body substantially as
described herein with reference to the drawings.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19792944180 DE2944180A1 (en) | 1979-11-02 | 1979-11-02 | METHOD FOR PRODUCING AN INSULATION LAYER COVERING A SEMICONDUCTOR BODY ON ONE SIDE |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB2062962A true GB2062962A (en) | 1981-05-28 |
Family
ID=6084926
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB8035287A Withdrawn GB2062962A (en) | 1979-11-02 | 1980-11-03 | Production of insulating layers |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JPS5693333A (en) |
| DE (1) | DE2944180A1 (en) |
| FR (1) | FR2468996A1 (en) |
| GB (1) | GB2062962A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0206938A2 (en) * | 1985-06-21 | 1986-12-30 | Fairchild Semiconductor Corporation | Germanosilicate spin-on glasses |
| EP0218117A2 (en) * | 1985-10-11 | 1987-04-15 | Allied Corporation | Cyclosilazane polymers as dielectric films in integrated circuit fabrication technology |
| US4894352A (en) * | 1988-10-26 | 1990-01-16 | Texas Instruments Inc. | Deposition of silicon-containing films using organosilicon compounds and nitrogen trifluoride |
| US4913949A (en) * | 1987-07-29 | 1990-04-03 | Basf Aktiengesellschaft | Planar, multilayered, laser-optical recording material |
| EP0498604A1 (en) * | 1991-02-04 | 1992-08-12 | Motorola, Inc. | Semiconductor device having a teos based spin-on-glass and process for making the same |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5676538A (en) * | 1979-11-28 | 1981-06-24 | Sumitomo Electric Ind Ltd | Formation of insulating film on semiconductor substrate |
| JPS59111329A (en) * | 1982-12-17 | 1984-06-27 | Fuji Electric Corp Res & Dev Ltd | Manufacture of coated thin-film |
| JPH01216544A (en) * | 1988-02-24 | 1989-08-30 | Sharp Corp | Forming method for passivation film of semiconductor element |
| DE3831857A1 (en) * | 1988-09-20 | 1990-03-22 | Meinhard Prof Dr Ing Knoll | Process for producing a light-transmitting dielectric from a doped silicon compound in an inversion-layer solar cell |
| DE3833931A1 (en) * | 1988-10-05 | 1990-04-12 | Texas Instruments Deutschland | Method for producing a doped insulator layer |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US505582A (en) * | 1893-09-26 | Speed-measure | ||
| US3559002A (en) * | 1968-12-09 | 1971-01-26 | Gen Electric | Semiconductor device with multiple shock absorbing and passivation layers |
| US3707944A (en) * | 1970-10-23 | 1973-01-02 | Ibm | Automatic photoresist apply and dry apparatus |
| US3695928A (en) * | 1970-12-07 | 1972-10-03 | Western Electric Co | Selective coating |
| US3889632A (en) * | 1974-05-31 | 1975-06-17 | Ibm | Variable incidence drive for deposition tooling |
| DE2506457C3 (en) * | 1975-02-15 | 1980-01-24 | S.A. Metallurgie Hoboken-Overpelt N.V., Bruessel | Process for the production of a silicate covering layer on a semiconductor wafer or on a layer thereon |
| DE2637105B2 (en) * | 1976-08-18 | 1978-10-05 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Method for evenly distributing a varnish |
| US4068019A (en) * | 1976-11-08 | 1978-01-10 | International Business Machines Corporation | Spin coating process for prevention of edge buildup |
| DE2743011C2 (en) * | 1977-09-23 | 1982-06-03 | Siemens AG, 1000 Berlin und 8000 München | Arrangement for applying a light-sensitive lacquer layer to a semiconductor wafer |
| DD136673A1 (en) * | 1977-10-21 | 1979-07-18 | Manfred Schwan | METHOD OF APPLYING PROTECTION AND ISOLATION LAYERS ON OVAL SEMICONDUCTOR SURFACES |
-
1979
- 1979-11-02 DE DE19792944180 patent/DE2944180A1/en not_active Ceased
-
1980
- 1980-10-31 FR FR8023370A patent/FR2468996A1/en not_active Withdrawn
- 1980-11-03 GB GB8035287A patent/GB2062962A/en not_active Withdrawn
- 1980-11-04 JP JP15397180A patent/JPS5693333A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0206938A2 (en) * | 1985-06-21 | 1986-12-30 | Fairchild Semiconductor Corporation | Germanosilicate spin-on glasses |
| EP0206938A3 (en) * | 1985-06-21 | 1988-02-10 | Fairchild Semiconductor Corporation | Germanosilicate spin-on glasses |
| US4935095A (en) * | 1985-06-21 | 1990-06-19 | National Semiconductor Corporation | Germanosilicate spin-on glasses |
| EP0218117A2 (en) * | 1985-10-11 | 1987-04-15 | Allied Corporation | Cyclosilazane polymers as dielectric films in integrated circuit fabrication technology |
| EP0218117A3 (en) * | 1985-10-11 | 1989-11-23 | Allied Corporation | Cyclosilazane polymers as dielectric films in integrated circuit fabrication technology |
| US4913949A (en) * | 1987-07-29 | 1990-04-03 | Basf Aktiengesellschaft | Planar, multilayered, laser-optical recording material |
| US4894352A (en) * | 1988-10-26 | 1990-01-16 | Texas Instruments Inc. | Deposition of silicon-containing films using organosilicon compounds and nitrogen trifluoride |
| EP0498604A1 (en) * | 1991-02-04 | 1992-08-12 | Motorola, Inc. | Semiconductor device having a teos based spin-on-glass and process for making the same |
Also Published As
| Publication number | Publication date |
|---|---|
| DE2944180A1 (en) | 1981-05-07 |
| FR2468996A1 (en) | 1981-05-08 |
| JPS5693333A (en) | 1981-07-28 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |