GB1577191A - Circuit arrangement including i2l gates - Google Patents
Circuit arrangement including i2l gates Download PDFInfo
- Publication number
- GB1577191A GB1577191A GB22711/77A GB2271177A GB1577191A GB 1577191 A GB1577191 A GB 1577191A GB 22711/77 A GB22711/77 A GB 22711/77A GB 2271177 A GB2271177 A GB 2271177A GB 1577191 A GB1577191 A GB 1577191A
- Authority
- GB
- United Kingdom
- Prior art keywords
- gates
- chil
- gate
- injector path
- arrangement
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 101100439253 Arabidopsis thaliana CHI3 gene Proteins 0.000 claims description 21
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 2
- 229910052710 silicon Inorganic materials 0.000 claims description 2
- 239000010703 silicon Substances 0.000 claims description 2
- 238000009792 diffusion process Methods 0.000 description 10
- 239000000969 carrier Substances 0.000 description 2
- 239000002800 charge carrier Substances 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
- H03K19/091—Integrated injection logic or merged transistor logic
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is DC
- G05F3/10—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/22—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the bipolar type only
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/65—Integrated injection logic
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Nonlinear Science (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Computing Systems (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Logic Circuits (AREA)
- Bipolar Integrated Circuits (AREA)
- Junction Field-Effect Transistors (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19762624584 DE2624584A1 (de) | 1976-06-01 | 1976-06-01 | Anordnung zur versorgung von i hoch 2 l-schaltungen mit verschiedenen stroemen |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1577191A true GB1577191A (en) | 1980-10-22 |
Family
ID=5979537
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB22711/77A Expired GB1577191A (en) | 1976-06-01 | 1977-05-30 | Circuit arrangement including i2l gates |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US4143284A (enExample) |
| JP (1) | JPS5945258B2 (enExample) |
| BE (1) | BE855222A (enExample) |
| DE (1) | DE2624584A1 (enExample) |
| FR (1) | FR2353959A1 (enExample) |
| GB (1) | GB1577191A (enExample) |
| IT (1) | IT1079232B (enExample) |
| NL (1) | NL7705962A (enExample) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA1097752A (en) * | 1978-02-03 | 1981-03-17 | Tohru Nakamura | Current mirror circuit |
| US4199776A (en) * | 1978-08-24 | 1980-04-22 | Rca Corporation | Integrated injection logic with floating reinjectors |
| DE2837519A1 (de) * | 1978-08-28 | 1980-03-20 | Philips Patentverwaltung | Monolithische integrierte halbleiter- schaltungsanordnung |
| JPS5852870A (ja) * | 1981-09-25 | 1983-03-29 | Hitachi Ltd | 半導体集積回路装置 |
| DE3637158A1 (de) * | 1986-10-31 | 1988-08-11 | Telefunken Electronic Gmbh | Kettenfoermige logikschaltung |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2244262B1 (enExample) * | 1973-09-13 | 1978-09-29 | Radiotechnique Compelec | |
| US4013901A (en) * | 1974-02-19 | 1977-03-22 | Texas Instruments Incorporated | Stacked logic design for I2 L watch |
| US4065680A (en) * | 1974-07-11 | 1977-12-27 | Signetics Corporation | Collector-up logic transmission gates |
| US3982266A (en) * | 1974-12-09 | 1976-09-21 | Texas Instruments Incorporated | Integrated injection logic having high inverse current gain |
| DE2509530C2 (de) * | 1975-03-05 | 1985-05-23 | Ibm Deutschland Gmbh, 7000 Stuttgart | Halbleiteranordnung für die Grundbausteine eines hochintegrierbaren logischen Halbleiterschaltungskonzepts basierend auf Mehrfachkollektor-Umkehrtransistoren |
-
1976
- 1976-06-01 DE DE19762624584 patent/DE2624584A1/de not_active Withdrawn
-
1977
- 1977-05-25 FR FR7715912A patent/FR2353959A1/fr active Granted
- 1977-05-26 US US05/800,633 patent/US4143284A/en not_active Expired - Lifetime
- 1977-05-27 IT IT24083/77A patent/IT1079232B/it active
- 1977-05-30 GB GB22711/77A patent/GB1577191A/en not_active Expired
- 1977-05-31 BE BE178057A patent/BE855222A/xx unknown
- 1977-05-31 NL NL7705962A patent/NL7705962A/xx not_active Application Discontinuation
- 1977-06-01 JP JP52064599A patent/JPS5945258B2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| BE855222A (fr) | 1977-09-16 |
| IT1079232B (it) | 1985-05-08 |
| DE2624584A1 (de) | 1977-12-15 |
| US4143284A (en) | 1979-03-06 |
| NL7705962A (nl) | 1977-12-05 |
| JPS5945258B2 (ja) | 1984-11-05 |
| FR2353959B1 (enExample) | 1981-07-03 |
| JPS52149044A (en) | 1977-12-10 |
| FR2353959A1 (fr) | 1977-12-30 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PS | Patent sealed [section 19, patents act 1949] | ||
| PCNP | Patent ceased through non-payment of renewal fee |